opcodes/ChangeLog

   1 2005-12-08  Jan Beulich  <jbeulich@novell.com>
   2
   3         * i386-dis.c (OP_ST): Remove prefix in Intel mode.
   4
   5 2005-12-08  Daniel Jacobowitz  <dan@codesourcery.com>
   6
   7         * i386-dis.c (dofloat): Handle %rip-relative floating point addressing.
   8
   9 2005-12-07  Hans-Peter Nilsson  <hp@axis.com>
  10
  11         * cris-opc.c (cris_opcodes) <"move" "s,P">: Define using
  12         MOVE_M_TO_PREG_OPCODE and MOVE_M_TO_PREG_ZBITS instead of constants.
  13
  14 2005-12-06  H.J. Lu  <hongjiu.lu@intel.com>
  15
  16         PR gas/1874
  17         * i386-dis.c (address_mode): New enum type.
  18         (address_mode): New variable.
  19         (mode_64bit): Removed.
  20         (ckprefix): Updated to check address_mode instead of mode_64bit.
  21         (prefix_name): Likewise.
  22         (print_insn): Likewise.
  23         (putop): Likewise.
  24         (print_operand_value): Likewise.
  25         (intel_operand_size): Likewise.
  26         (OP_E): Likewise.
  27         (OP_G): Likewise.
  28         (set_op): Likewise.
  29         (OP_REG): Likewise.
  30         (OP_I): Likewise.
  31         (OP_I64): Likewise.
  32         (OP_OFF): Likewise.
  33         (OP_OFF64): Likewise.
  34         (ptr_reg): Likewise.
  35         (OP_C): Likewise.
  36         (SVME_Fixup): Likewise.
  37         (print_insn): Set address_mode.
  38         (PNI_Fixup): Add 64bit and address size override support for
  39         monitor and mwait.
  40
  41 2005-12-06  Hans-Peter Nilsson  <hp@axis.com>
  42
  43         * cris-dis.c (bytes_to_skip): Handle new parameter prefix_matchedp.
  44         (print_with_operands): Check for prefix when [PC+] is seen.
  45
  46 2005-12-02  Dave Brolley  <brolley@redhat.com>
  47
  48         * configure.in (cgen_files): Add cgen-bitset.lo.
  49         (ta): Add cgen-bitset.lo when arch==bfd_cris_arch.
  50         * Makefile.am (CFILES): Add cgen-bitset.c.
  51         (ALL_MACHINES): Add cgen-bitset.lo.
  52         (cgen-bitset.lo): New target.
  53         * cgen-opc.c (cgen_bitset_create, cgen_bitset_init, cgen_bitset_clear)
  54         (cgen_bitset_add, cgen_bitset_set, cgen_bitset_contains)
  55         (cgen_bitset_compare, cgen_bitset_intersect_p, cgen_bitset_copy)
  56         (cgen_bitset_union): Moved from here ...
  57         * cgen-bitset.c: ... to here. New file.
  58         * Makefile.in: Regenerated.
  59         * configure: Regenerated.
  60
  61 2005-11-22  James E Wilson  <wilson@specifix.com>
  62
  63         * ia64-gen.c (_opcode_int64_low, _opcode_int64_high,
  64         opcode_fprintf_vma): New.
  65         (print_main_table): New opcode_fprintf_vma instead of fprintf_vma.
  66
  67 2005-11-16  Alan Modra  <amodra@bigpond.net.au>
  68
  69         * ppc-opc.c (powerpc_opcodes): Add frin,friz,frip,frim.  Correct
  70         frsqrtes.
  71
  72 2005-11-14  David Ung  <davidu@mips.com>
  73
  74         * mips16-opc.c: Add MIPS16e save/restore opcodes.
  75         * mips-dis.c (print_mips16_insn_arg): Handle printing of 'm'/'M'
  76         codes for save/restore.
  77
  78 2005-11-10  Andreas Schwab  <schwab@suse.de>
  79
  80         * m68k-dis.c (print_insn_m68k): Only match FPU insns with
  81         coprocessor ID 1.
  82
  83 2005-11-08  H.J. Lu  <hongjiu.lu@intel.com>
  84
  85         * m32c-desc.c: Regenerated.
  86
  87 2005-11-08  Nathan Sidwell  <nathan@codesourcery.com>
  88
  89         Add ms2.
  90         * ms1-asm.c, ms1-desc.c, ms1-desc.h, ms1-dis.c, ms1-ibld.c,
  91         ms1-opc.c, ms1-opc.h: Regenerated.
  92
  93 2005-11-07  Steve Ellcey  <sje@cup.hp.com>
  94
  95         * configure: Regenerate after modifying bfd/warning.m4.
  96
  97 2005-11-07  Alan Modra  <amodra@bigpond.net.au>
  98
  99         * i386-dis.c (ckprefix): Handle rex on fwait.  Don't print
 100         ignored rex prefixes here.
 101         (print_insn): Instead, handle them similarly to fwait followed
 102         by non-fp insns.
 103
 104 2005-11-02  H.J. Lu  <hongjiu.lu@intel.com>
 105
 106         * iq2000-desc.c: Regenerated.
 107         * iq2000-desc.h: Likewise.
 108         * iq2000-dis.c: Likewise.
 109         * iq2000-opc.c: Likewise.
 110
 111 2005-11-02  Paul Brook  <paul@codesourcery.com>
 112
 113         * arm-dis.c (print_insn_thumb32): Word align blx target address.
 114
 115 2005-10-31  Alan Modra  <amodra@bigpond.net.au>
 116
 117         * arm-dis.c (print_insn): Warning fix.
 118
 119 2005-10-30  H.J. Lu  <hongjiu.lu@intel.com>
 120
 121         * Makefile.am: Run "make dep-am".
 122         * Makefile.in: Regenerated.
 123
 124         * dep-in.sed: Replace " ./" with " ".
 125
 126 2005-10-28  Dave Brolley  <brolley@redhat.com>
 127
 128         * All CGEN-generated sources: Regenerate.
 129
 130         Contribute the following changes:
 131         2005-09-19  Dave Brolley  <brolley@redhat.com>
 132
 133         * disassemble.c (disassemble_init_for_target): Add 'break' to case for
 134         bfd_arch_tic4x. Use cgen_bitset_create and cgen_bitset_set for
 135         bfd_arch_m32c case.
 136
 137         2005-02-16  Dave Brolley  <brolley@redhat.com>
 138
 139         * cgen-dis.in: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename
 140         cgen_isa_mask_* to cgen_bitset_*.
 141         * cgen-opc.c: Likewise.
 142
 143         2003-11-28  Richard Sandiford  <rsandifo@redhat.com>
 144
 145         * cgen-dis.in (print_insn_@arch@): Fix comparison with cached isas.
 146         * *-dis.c: Regenerate.
 147
 148         2003-06-05  DJ Delorie  <dj@redhat.com>
 149
 150         * cgen-dis.in (print_insn_@arch@): Copy prev_isas, don't assign
 151         it, as it may point to a reused buffer. Set prev_isas when we
 152         change cpus.
 153
 154         2002-12-13  Dave Brolley  <brolley@redhat.com>
 155
 156         * cgen-opc.c (cgen_isa_mask_create): New support function for
 157         CGEN_ISA_MASK.
 158         (cgen_isa_mask_init): Ditto.
 159         (cgen_isa_mask_clear): Ditto.
 160         (cgen_isa_mask_add): Ditto.
 161         (cgen_isa_mask_set): Ditto.
 162         (cgen_isa_supported): Ditto.
 163         (cgen_isa_mask_compare): Ditto.
 164         (cgen_isa_mask_intersection): Ditto.
 165         (cgen_isa_mask_copy): Ditto.
 166         (cgen_isa_mask_combine): Ditto.
 167         * cgen-dis.in (libiberty.h): #include it.
 168         (isas): Renamed from 'isa' and now (CGEN_ISA_MASK *).
 169         (print_insn_@arch@): Use CGEN_ISA_MASK and support functions.
 170         * Makefile.am (CGENDEPS): Add utils-cgen.scm and attrs.scm.
 171         * Makefile.in: Regenerated.
 172
 173 2005-10-27  DJ Delorie  <dj@redhat.com>
 174
 175         * m32c-asm.c: Regenerate.
 176         * m32c-desc.c: Regenerate.
 177         * m32c-desc.h: Regenerate.
 178         * m32c-dis.c: Regenerate.
 179         * m32c-ibld.c: Regenerate.
 180         * m32c-opc.c: Regenerate.
 181         * m32c-opc.h: Regenerate.
 182
 183 2005-10-26  DJ Delorie  <dj@redhat.com>
 184
 185         * m32c-asm.c: Regenerate.
 186         * m32c-desc.c: Regenerate.
 187         * m32c-desc.h: Regenerate.
 188         * m32c-dis.c: Regenerate.
 189         * m32c-ibld.c: Regenerate.
 190         * m32c-opc.c: Regenerate.
 191         * m32c-opc.h: Regenerate.
 192
 193 2005-10-26  Paul Brook  <paul@codesourcery.com>
 194
 195         * arm-dis.c (arm_opcodes): Correct "sel" entry.
 196
 197 2005-10-26  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 198
 199         * m32r-asm.c: Regenerate.
 200
 201 2005-10-25  DJ Delorie  <dj@redhat.com>
 202
 203         * m32c-asm.c: Regenerate.
 204         * m32c-desc.c: Regenerate.
 205         * m32c-desc.h: Regenerate.
 206         * m32c-dis.c: Regenerate.
 207         * m32c-ibld.c: Regenerate.
 208         * m32c-opc.c: Regenerate.
 209         * m32c-opc.h: Regenerate.
 210
 211 2005-10-25  Arnold Metselaar  <arnold.metselaar@planet.nl>
 212
 213         * configure.in: Add target architecture bfd_arch_z80.
 214         * configure: Regenerated.
 215         * disassemble.c (disassembler)<ARCH_z80>: Add case
 216         bfd_arch_z80.
 217         * z80-dis.c: New file.
 218
 219 2005-10-25  Alan Modra  <amodra@bigpond.net.au>
 220
 221         * po/POTFILES.in: Regenerate.
 222         * po/opcodes.pot: Regenerate.
 223
 224 2005-10-24  Jan Beulich  <jbeulich@novell.com>
 225
 226         * ia64-asmtab.c: Regenerate.
 227
 228 2005-10-21  DJ Delorie  <dj@redhat.com>
 229
 230         * m32c-asm.c: Regenerate.
 231         * m32c-desc.c: Regenerate.
 232         * m32c-desc.h: Regenerate.
 233         * m32c-dis.c: Regenerate.
 234         * m32c-ibld.c: Regenerate.
 235         * m32c-opc.c: Regenerate.
 236         * m32c-opc.h: Regenerate.
 237
 238 2005-10-21  Nick Clifton  <nickc@redhat.com>
 239
 240         * bfin-dis.c: Tidy up code, removing redundant constructs.
 241
 242 2005-10-19  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 243
 244         * s390-opc.txt: Add unnormalized hfp multiply and multiply-and-add
 245         instructions.
 246
 247 2005-10-18  Nick Clifton  <nickc@redhat.com>
 248
 249         * m32r-asm.c: Regenerate after updating m32r.opc.
 250
 251 2005-10-18  Jie Zhang  <jie.zhang@analog.com>
 252
 253         * bfin-dis.c (print_insn_bfin): Do proper endian transform when
 254         reading instruction from memory.
 255
 256 2005-10-18  Nick Clifton  <nickc@redhat.com>
 257
 258         * m32r-asm.c: Regenerate after updating m32r.opc.
 259
 260 2005-10-14  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 261
 262         * m32r-asm.c: Regenerate after updating m32r.opc.
 263
 264 2005-10-08  James Lemke  <jim@wasabisystems.com>
 265
 266         * arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
 267         operations.
 268
 269 2005-10-06  Daniel Jacobowitz  <dan@codesourcery.com>
 270
 271         * ppc-dis.c (struct dis_private): Remove.
 272         (powerpc_dialect): Avoid aliasing warnings.
 273         (print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
 274
 275 2005-09-30  Nick Clifton  <nickc@redhat.com>
 276
 277         * po/ga.po: New Irish translation.
 278         * configure.in (ALL_LINGUAS): Add "ga".
 279         * configure: Regenerate.
 280
 281 2005-09-30  H.J. Lu  <hongjiu.lu@intel.com>
 282
 283         * Makefile.am: Run "make dep-am".
 284         * Makefile.in: Regenerated.
 285         * aclocal.m4: Likewise.
 286         * configure: Likewise.
 287
 288 2005-09-30  Catherine Moore  <clm@cm00re.com>
 289
 290         * Makefile.am: Bfin support.
 291         * Makefile.in: Regenerated.
 292         * aclocal.m4: Regenerated.
 293         * bfin-dis.c: New file.
 294         * configure.in: Bfin support.
 295         * configure: Regenerated.
 296         * disassemble.c (ARCH_bfin): Define.
 297         (disassembler): Add case for bfd_arch_bfin.
 298
 299 2005-09-28  Jan Beulich  <jbeulich@novell.com>
 300
 301         * i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
 302         (indirEv): Use it.
 303         (stackEv): New.
 304         (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
 305         (dis386): Document and use new 'V' meta character. Use it for
 306         single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
 307         opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
 308         (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
 309         data prefix as used whenever DFLAG was examined. Handle 'V'.
 310         (intel_operand_size): Use stack_v_mode.
 311         (OP_E): Use stack_v_mode, but handle only the special case of
 312         64-bit mode without operand size override here; fall through to
 313         v_mode case otherwise.
 314         (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
 315         and no operand size override is present.
 316         (OP_J): Use get32s for obtaining the displacement also when rex64
 317         is present.
 318
 319 2005-09-08  Paul Brook  <paul@codesourcery.com>
 320
 321         * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
 322
 323 2005-09-06  Chao-ying Fu  <fu@mips.com>
 324
 325         * mips-opc.c (MT32): New define.
 326         (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
 327         bottom to avoid opcode collision with "mftr" and "mttr".
 328         Add MT instructions.
 329         * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
 330         (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
 331         formats.
 332
 333 2005-09-02  Paul Brook  <paul@codesourcery.com>
 334
 335         * arm-dis.c (coprocessor_opcodes): Add null terminator.
 336
 337 2005-09-02  Paul Brook  <paul@codesourcery.com>
 338
 339         * arm-dis.c (coprocessor_opcodes): New.
 340         (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
 341         (print_insn_coprocessor): New function.
 342         (print_insn_arm): Use print_insn_coprocessor.  Remove coprocessor
 343         format characters.
 344         (print_insn_thumb32): Use print_insn_coprocessor.
 345
 346 2005-08-30  Paul Brook  <paul@codesourcery.com>
 347
 348         * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
 349
 350 2005-08-26  Jan Beulich  <jbeulich@novell.com>
 351
 352         * i386-dis.c (intel_operand_size): New, broken out from OP_E for
 353         re-use.
 354         (OP_E): Call intel_operand_size, move call site out of mode
 355         dependent code.
 356         (OP_OFF): Call intel_operand_size if suffix_always. Remove
 357         ATTRIBUTE_UNUSED from parameters.
 358         (OP_OFF64): Likewise.
 359         (OP_ESreg): Call intel_operand_size.
 360         (OP_DSreg): Likewise.
 361         (OP_DIR): Use colon rather than semicolon as separator of far
 362         jump/call operands.
 363
 364 2005-08-25  Chao-ying Fu  <fu@mips.com>
 365
 366         * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
 367         (mips_builtin_opcodes): Add DSP instructions.
 368         * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
 369         mips64, mips64r2.
 370         (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
 371         operand formats.
 372
 373 2005-08-23  David Ung  <davidu@mips.com>
 374
 375         * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
 376         instructions to the table.
 377
 378 2005-08-18  Alan Modra  <amodra@bigpond.net.au>
 379
 380         * a29k-dis.c: Delete.
 381         * Makefile.am: Remove a29k support.
 382         * configure.in: Likewise.
 383         * disassemble.c: Likewise.
 384         * Makefile.in: Regenerate.
 385         * configure: Regenerate.
 386         * po/POTFILES.in: Regenerate.
 387
 388 2005-08-15  Daniel Jacobowitz  <dan@codesourcery.com>
 389
 390         * ppc-dis.c (powerpc_dialect): Handle e300.
 391         (print_ppc_disassembler_options): Likewise.
 392         * ppc-opc.c (PPCE300): Define.
 393         (powerpc_opcodes): Mark icbt as available for the e300.
 394
 395 2005-08-13  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
 396
 397         * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
 398         Use "rp" instead of "%r2" in "b,l" insns.
 399
 400 2005-08-12 Martin Schwidefsky  <schwidefsky@de.ibm.com>
 401
 402         * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
 403         * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
 404         (main): Likewise.
 405         * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
 406         and 4 bit optional masks.
 407         (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
 408         INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
 409         (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
 410         MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
 411         (s390_opformats): Likewise.
 412         * s390-opc.txt: Add new instructions for cpu type z9-109.
 413
 414 2005-08-05  John David Anglin  <dave.anglin@nrc-crnc.gc.ca>
 415
 416         * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
 417
 418 2005-07-29  Paul Brook  <paul@codesourcery.com>
 419
 420         * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
 421
 422 2005-07-29  Paul Brook  <paul@codesourcery.com>
 423
 424         * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
 425         (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
 426
 427 2005-07-25  DJ Delorie  <dj@redhat.com>
 428
 429         * m32c-asm.c Regenerate.
 430         * m32c-dis.c Regenerate.
 431
 432 2005-07-20  DJ Delorie  <dj@redhat.com>
 433
 434         * disassemble.c (disassemble_init_for_target): M32C ISAs are
 435         enums, so convert them to bit masks, which attributes are.
 436
 437 2005-07-18  Nick Clifton  <nickc@redhat.com>
 438
 439         * configure.in: Restore alpha ordering to list of arches.
 440         * configure: Regenerate.
 441         * disassemble.c: Restore alpha ordering to list of arches.
 442
 443 2005-07-18  Nick Clifton  <nickc@redhat.com>
 444
 445         * m32c-asm.c: Regenerate.
 446         * m32c-desc.c: Regenerate.
 447         * m32c-desc.h: Regenerate.
 448         * m32c-dis.c: Regenerate.
 449         * m32c-ibld.h: Regenerate.
 450         * m32c-opc.c: Regenerate.
 451         * m32c-opc.h: Regenerate.
 452
 453 2005-07-18  H.J. Lu  <hongjiu.lu@intel.com>
 454
 455         * i386-dis.c (PNI_Fixup): Update comment.
 456         (VMX_Fixup): Properly handle the suffix check.
 457
 458 2005-07-16  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
 459
 460         * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
 461         mfctl disassembly.
 462
 463 2005-07-16  Alan Modra  <amodra@bigpond.net.au>
 464
 465         * Makefile.am: Run "make dep-am".
 466         (stamp-m32c): Fix cpu dependencies.
 467         * Makefile.in: Regenerate.
 468         * ip2k-dis.c: Regenerate.
 469
 470 2007-07-15  H.J. Lu <hongjiu.lu@intel.com>
 471
 472         * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
 473         (VMX_Fixup): New. Fix up Intel VMX Instructions.
 474         (Em): New.
 475         (Gm): New.
 476         (VM): New.
 477         (dis386_twobyte): Updated entries 0x78 and 0x79.
 478         (twobyte_has_modrm): Likewise.
 479         (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
 480         (OP_G): Handle m_mode.
 481
 482 2005-07-14  Jim Blandy  <jimb@redhat.com>
 483
 484         Add support for the Renesas M32C and M16C.
 485         * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
 486         * m32c-desc.h, m32c-opc.h: New.
 487         * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
 488         (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
 489         m32c-opc.c.
 490         (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
 491         m32c-ibld.lo, m32c-opc.lo.
 492         (CLEANFILES): List stamp-m32c.
 493         (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
 494         (CGEN_CPUS): Add m32c.
 495         (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
 496         (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
 497         (m32c_opc_h): New variable.
 498         (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
 499         (m32c-opc.lo): New rules.
 500         * Makefile.in: Regenerated.
 501         * configure.in: Add case for bfd_m32c_arch.
 502         * configure: Regenerated.
 503         * disassemble.c (ARCH_m32c): New.
 504         [ARCH_m32c]: #include "m32c-desc.h".
 505         (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
 506         (disassemble_init_for_target) [ARCH_m32c]: Same.
 507
 508         * cgen-ops.h, cgen-types.h: New files.
 509         * Makefile.am (HFILES): List them.
 510         * Makefile.in: Regenerated.
 511
 512 2005-07-07  Kaveh R. Ghazi  <ghazi@caip.rutgers.edu>
 513
 514         * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
 515         d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
 516         ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
 517         m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
 518         ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
 519         v850-dis.c: Fix format bugs.
 520         * ia64-gen.c (fail, warn): Add format attribute.
 521         * or32-opc.c (debug): Likewise.
 522
 523 2005-07-07  Khem Raj  <kraj@mvista.com>
 524
 525         * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
 526         disassembly pattern.
 527
 528 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 529
 530         * Makefile.am (stamp-m32r): Fix path to cpu files.
 531         (stamp-m32r, stamp-iq2000): Likewise.
 532         * Makefile.in: Regenerate.
 533         * m32r-asm.c: Regenerate.
 534         * po/POTFILES.in: Remove arm-opc.h.  Add ms1-asm.c, ms1-desc.c,
 535         ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
 536
 537 2005-07-05  Nick Clifton  <nickc@redhat.com>
 538
 539         * iq2000-asm.c: Regenerate.
 540         * ms1-asm.c: Regenerate.
 541
 542 2005-07-05  Jan Beulich  <jbeulich@novell.com>
 543
 544         * i386-dis.c (SVME_Fixup): New.
 545         (grps): Use it for the lidt entry.
 546         (PNI_Fixup): Call OP_M rather than OP_E.
 547         (INVLPG_Fixup): Likewise.
 548
 549 2005-07-04  H.J. Lu  <hongjiu.lu@intel.com>
 550
 551         * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
 552
 553 2005-07-01  Nick Clifton  <nickc@redhat.com>
 554
 555         * a29k-dis.c: Update to ISO C90 style function declarations and
 556         fix formatting.
 557         * alpha-opc.c: Likewise.
 558         * arc-dis.c: Likewise.
 559         * arc-opc.c: Likewise.
 560         * avr-dis.c: Likewise.
 561         * cgen-asm.in: Likewise.
 562         * cgen-dis.in: Likewise.
 563         * cgen-ibld.in: Likewise.
 564         * cgen-opc.c: Likewise.
 565         * cris-dis.c: Likewise.
 566         * d10v-dis.c: Likewise.
 567         * d30v-dis.c: Likewise.
 568         * d30v-opc.c: Likewise.
 569         * dis-buf.c: Likewise.
 570         * dlx-dis.c: Likewise.
 571         * h8300-dis.c: Likewise.
 572         * h8500-dis.c: Likewise.
 573         * hppa-dis.c: Likewise.
 574         * i370-dis.c: Likewise.
 575         * i370-opc.c: Likewise.
 576         * m10200-dis.c: Likewise.
 577         * m10300-dis.c: Likewise.
 578         * m68k-dis.c: Likewise.
 579         * m88k-dis.c: Likewise.
 580         * mips-dis.c: Likewise.
 581         * mmix-dis.c: Likewise.
 582         * msp430-dis.c: Likewise.
 583         * ns32k-dis.c: Likewise.
 584         * or32-dis.c: Likewise.
 585         * or32-opc.c: Likewise.
 586         * pdp11-dis.c: Likewise.
 587         * pj-dis.c: Likewise.
 588         * s390-dis.c: Likewise.
 589         * sh-dis.c: Likewise.
 590         * sh64-dis.c: Likewise.
 591         * sparc-dis.c: Likewise.
 592         * sparc-opc.c: Likewise.
 593         * sysdep.h: Likewise.
 594         * tic30-dis.c: Likewise.
 595         * tic4x-dis.c: Likewise.
 596         * tic80-dis.c: Likewise.
 597         * v850-dis.c: Likewise.
 598         * v850-opc.c: Likewise.
 599         * vax-dis.c: Likewise.
 600         * w65-dis.c: Likewise.
 601         * z8kgen.c: Likewise.
 602
 603         * fr30-*: Regenerate.
 604         * frv-*: Regenerate.
 605         * ip2k-*: Regenerate.
 606         * iq2000-*: Regenerate.
 607         * m32r-*: Regenerate.
 608         * ms1-*: Regenerate.
 609         * openrisc-*: Regenerate.
 610         * xstormy16-*: Regenerate.
 611
 612 2005-06-23  Ben Elliston  <bje@gnu.org>
 613
 614         * m68k-dis.c: Use ISC C90.
 615         * m68k-opc.c: Formatting fixes.
 616
 617 2005-06-16  David Ung  <davidu@mips.com>
 618
 619         * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
 620         instructions to the table; seb/seh/sew/zeb/zeh/zew.
 621
 622 2005-06-15  Dave Brolley  <brolley@redhat.com>
 623
 624         Contribute Morpho ms1 on behalf of Red Hat
 625         * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
 626         ms1-opc.h: New files, Morpho ms1 target.
 627
 628         2004-05-14  Stan Cox  <scox@redhat.com>
 629
 630         * disassemble.c (ARCH_ms1): Define.
 631         (disassembler): Handle bfd_arch_ms1
 632
 633         2004-05-13  Michael Snyder  <msnyder@redhat.com>
 634
 635         * Makefile.am, Makefile.in: Add ms1 target.
 636         * configure.in: Ditto.
 637
 638 2005-06-08  Zack Weinberg  <zack@codesourcery.com>
 639
 640         * arm-opc.h: Delete; fold contents into ...
 641         * arm-dis.c: ... here.  Move includes of internal COFF headers
 642         next to includes of internal ELF headers.
 643         (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
 644         (struct arm_opcode): Rename struct opcode32.  Make 'assembler' const.
 645         (struct thumb_opcode): Rename struct opcode16.  Make 'assembler' const.
 646         (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
 647         (iwmmxt_wwnames, iwmmxt_wwssnames):
 648         Make const.
 649         (regnames): Remove iWMMXt coprocessor register sets.
 650         (iwmmxt_regnames, iwmmxt_cregnames): New statics.
 651         (get_arm_regnames): Adjust fourth argument to match above changes.
 652         (set_iwmmxt_regnames): Delete.
 653         (print_insn_arm): Constify 'c'.  Use ISO syntax for function
 654         pointer calls.  Expand sole use of BDISP.  Use iwmmxt_regnames
 655         and iwmmxt_cregnames, not set_iwmmxt_regnames.
 656         (print_insn_thumb16, print_insn_thumb32): Constify 'c'.  Use
 657         ISO syntax for function pointer calls.
 658
 659 2005-06-07  Zack Weinberg  <zack@codesourcery.com>
 660
 661         * arm-dis.c: Split up the comments describing the format codes, so
 662         that the ARM and 16-bit Thumb opcode tables each have comments
 663         preceding them that describe all the codes, and only the codes,
 664         valid in those tables.  (32-bit Thumb table is already like this.)
 665         Reorder the lists in all three comments to match the order in
 666         which the codes are implemented.
 667         Remove all forward declarations of static functions.  Convert all
 668         function definitions to ISO C format.
 669         (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
 670         Return nothing.
 671         (print_insn_thumb16): Remove unused case 'I'.
 672         (print_insn): Update for changed calling convention of subroutines.
 673
 674 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 675
 676         * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
 677         hex (but retain it being displayed as signed). Remove redundant
 678         checks. Add handling of displacements for 16-bit addressing in Intel
 679         mode.
 680
 681 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 682
 683         * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
 684         (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
 685         masking of 'rm' in 16-bit memory address handling.
 686
 687 2005-05-19  Anton Blanchard  <anton@samba.org>
 688
 689         * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
 690         (print_ppc_disassembler_options): Document it.
 691         * ppc-opc.c (SVC_LEV): Define.
 692         (LEV): Allow optional operand.
 693         (POWER5): Define.
 694         (powerpc_opcodes): Extend "sc".  Adjust "svc" and "svcl".  Add
 695         "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
 696
 697 2005-05-19  Kelley Cook  <kcook@gcc.gnu.org>
 698
 699         * Makefile.in:  Regenerate.
 700
 701 2005-05-17  Zack Weinberg  <zack@codesourcery.com>
 702
 703         * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
 704         instructions.  Adjust disassembly of some opcodes to match
 705         unified syntax.
 706         (thumb32_opcodes): New table.
 707         (print_insn_thumb): Rename print_insn_thumb16; don't handle
 708         two-halfword branches here.
 709         (print_insn_thumb32): New function.
 710         (print_insn): Choose among print_insn_arm, print_insn_thumb16,
 711         and print_insn_thumb32.  Be consistent about order of
 712         halfwords when printing 32-bit instructions.
 713
 714 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 715
 716         PR 843
 717         * i386-dis.c (branch_v_mode): New.
 718         (indirEv): Use branch_v_mode instead of v_mode.
 719         (OP_E): Handle branch_v_mode.
 720
 721 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 722
 723         * d10v-dis.c (dis_2_short): Support 64bit host.
 724
 725 2005-05-07  Nick Clifton  <nickc@redhat.com>
 726
 727         * po/nl.po: Updated translation.
 728
 729 2005-05-07  Nick Clifton  <nickc@redhat.com>
 730
 731         * Update the address and phone number of the FSF organization in
 732         the GPL notices in the following files:
 733         a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
 734         arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
 735         avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
 736         cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
 737         crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
 738         d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
 739         fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
 740         fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
 741         frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
 742         h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
 743         i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
 744         ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
 745         ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
 746         ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
 747         ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
 748         iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
 749         iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
 750         m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
 751         m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
 752         m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
 753         maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
 754         mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
 755         openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
 756         openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
 757         or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
 758         pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
 759         s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
 760         sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
 761         tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
 762         v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
 763         xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
 764         xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
 765         xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
 766
 767 2005-05-05  James E Wilson  <wilson@specifixinc.com>
 768
 769         * ia64-opc.c: Include sysdep.h before libiberty.h.
 770
 771 2005-05-05  Nick Clifton  <nickc@redhat.com>
 772
 773         * configure.in (ALL_LINGUAS): Add vi.
 774         * configure: Regenerate.
 775         * po/vi.po: New.
 776
 777 2005-04-26  Jerome Guitton  <guitton@gnat.com>
 778
 779         * configure.in: Fix the check for basename declaration.
 780         * configure: Regenerate.
 781
 782 2005-04-19  Alan Modra  <amodra@bigpond.net.au>
 783
 784         * ppc-opc.c (RTO): Define.
 785         (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
 786         entries to suit PPC440.
 787
 788 2005-04-18  Mark Kettenis  <kettenis@gnu.org>
 789
 790         * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
 791         Add xcrypt-ctr.
 792
 793 2005-04-14  Nick Clifton  <nickc@redhat.com>
 794
 795         * po/fi.po: New translation: Finnish.
 796         * configure.in (ALL_LINGUAS): Add fi.
 797         * configure: Regenerate.
 798
 799 2005-04-14  Alan Modra  <amodra@bigpond.net.au>
 800
 801         * Makefile.am (NO_WERROR): Define.
 802         * configure.in: Invoke AM_BINUTILS_WARNINGS.
 803         * Makefile.in: Regenerate.
 804         * aclocal.m4: Regenerate.
 805         * configure: Regenerate.
 806
 807 2005-04-04  Nick Clifton  <nickc@redhat.com>
 808
 809         * fr30-asm.c: Regenerate.
 810         * frv-asm.c: Regenerate.
 811         * iq2000-asm.c: Regenerate.
 812         * m32r-asm.c: Regenerate.
 813         * openrisc-asm.c: Regenerate.
 814
 815 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 816
 817         * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
 818         visible operands in Intel mode. The first operand of monitor is
 819         %rax in 64-bit mode.
 820
 821 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 822
 823         * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
 824         easier future additions.
 825
 826 2005-03-31  Jerome Guitton  <guitton@gnat.com>
 827
 828         * configure.in: Check for basename.
 829         * configure: Regenerate.
 830         * config.in: Ditto.
 831
 832 2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>
 833
 834         * i386-dis.c (SEG_Fixup): New.
 835         (Sv): New.
 836         (dis386): Use "Sv" for 0x8c and 0x8e.
 837
 838 2005-03-21  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 839             Nick Clifton  <nickc@redhat.com>
 840
 841         * vax-dis.c: (entry_addr): New varible:  An array of user supplied
 842         function entry mask addresses.
 843         (entry_addr_occupied_slots): New variable: The number of occupied
 844         elements in entry_addr.
 845         (entry_addr_total_slots): New variable: The total number of
 846         elements in entry_addr.
 847         (parse_disassembler_options): New function.  Fills in the entry_addr
 848         array.
 849         (free_entry_array): New function.  Release the memory used by the
 850         entry addr array.  Suppressed because there is no way to call it.
 851         (is_function_entry): Check if a given address is a function's
 852         start address by looking at supplied entry mask addresses and
 853         symbol information, if available.
 854         (print_insn_vax): Use parse_disassembler_options and is_function_entry.
 855
 856 2005-03-23  H.J. Lu  <hongjiu.lu@intel.com>
 857
 858         * cris-dis.c (print_with_operands): Use ~31L for long instead
 859         of ~31.
 860
 861 2005-03-20  H.J. Lu  <hongjiu.lu@intel.com>
 862
 863         * mmix-opc.c (O): Revert the last change.
 864         (Z): Likewise.
 865
 866 2005-03-19  H.J. Lu  <hongjiu.lu@intel.com>
 867
 868         * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
 869         (Z): Likewise.
 870
 871 2005-03-19  Hans-Peter Nilsson  <hp@bitrange.com>
 872
 873         * mmix-opc.c (O, Z): Force expression as unsigned long.
 874
 875 2005-03-18  Nick Clifton  <nickc@redhat.com>
 876
 877         * ip2k-asm.c: Regenerate.
 878         * op/opcodes.pot: Regenerate.
 879
 880 2005-03-16  Nick Clifton  <nickc@redhat.com>
 881             Ben Elliston  <bje@au.ibm.com>
 882
 883         * configure.in (werror): New switch: Add -Werror to the
 884         compiler command line.  Enabled by default.  Disable via
 885         --disable-werror.
 886         * configure: Regenerate.
 887
 888 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
 889
 890         * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
 891         BOOKE.
 892
 893 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
 894
 895         * po/es.po: Commit new Spanish translation.
 896
 897         * po/fr.po: Commit new French translation.
 898
 899 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 900
 901         * vax-dis.c: Fix spelling error
 902         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
 903         of just "Entry mask: < r1 ... >"
 904
 905 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
 906
 907         * arm-dis.c (arm_opcodes): Document %E and %V.
 908         Add entries for v6T2 ARM instructions:
 909         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
 910         (print_insn_arm): Add support for %E and %V.
 911         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
 912
 913 2005-03-10  Jeff Baker  <jbaker@qnx.com>
 914             Alan Modra  <amodra@bigpond.net.au>
 915
 916         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
 917         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
 918         (SPRG_MASK): Delete.
 919         (XSPRG_MASK): Mask off extra bits now part of sprg field.
 920         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
 921         mfsprg4..7 after msprg and consolidate.
 922
 923 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 924
 925         * vax-dis.c (entry_mask_bit): New array.
 926         (print_insn_vax): Decode function entry mask.
 927
 928 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
 929
 930         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
 931
 932 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
 933
 934         * po/opcodes.pot: Regenerate.
 935
 936 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
 937
 938         * arc-dis.c (a4_decoding_class): New enum.
 939         (dsmOneArcInst): Use the enum values for the decoding class.
 940         Remove redundant case in the switch for decodingClass value 11.
 941
 942 2005-03-02  Jan Beulich  <jbeulich@novell.com>
 943
 944         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
 945         accesses.
 946         (OP_C): Consider lock prefix in non-64-bit modes.
 947
 948 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 949
 950         * cris-dis.c (format_hex): Remove ineffective warning fix.
 951         * crx-dis.c (make_instruction): Warning fix.
 952         * frv-asm.c: Regenerate.
 953
 954 2005-02-23  Nick Clifton  <nickc@redhat.com>
 955
 956         * cgen-dis.in: Use bfd_byte for buffers that are passed to
 957         read_memory.
 958
 959         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
 960
 961         * crx-dis.c (make_instruction): Move argument structure into inner
 962         scope and ensure that all of its fields are initialised before
 963         they are used.
 964
 965         * fr30-asm.c: Regenerate.
 966         * fr30-dis.c: Regenerate.
 967         * frv-asm.c: Regenerate.
 968         * frv-dis.c: Regenerate.
 969         * ip2k-asm.c: Regenerate.
 970         * ip2k-dis.c: Regenerate.
 971         * iq2000-asm.c: Regenerate.
 972         * iq2000-dis.c: Regenerate.
 973         * m32r-asm.c: Regenerate.
 974         * m32r-dis.c: Regenerate.
 975         * openrisc-asm.c: Regenerate.
 976         * openrisc-dis.c: Regenerate.
 977         * xstormy16-asm.c: Regenerate.
 978         * xstormy16-dis.c: Regenerate.
 979
 980 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 981
 982         * arc-ext.c: Warning fixes.
 983         * arc-ext.h: Likewise.
 984         * cgen-opc.c: Likewise.
 985         * ia64-gen.c: Likewise.
 986         * maxq-dis.c: Likewise.
 987         * ns32k-dis.c: Likewise.
 988         * w65-dis.c: Likewise.
 989         * ia64-asmtab.c: Regenerate.
 990
 991 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 992
 993         * fr30-desc.c: Regenerate.
 994         * fr30-desc.h: Regenerate.
 995         * fr30-opc.c: Regenerate.
 996         * fr30-opc.h: Regenerate.
 997         * frv-desc.c: Regenerate.
 998         * frv-desc.h: Regenerate.
 999         * frv-opc.c: Regenerate.
1000         * frv-opc.h: Regenerate.
1001         * ip2k-desc.c: Regenerate.
1002         * ip2k-desc.h: Regenerate.
1003         * ip2k-opc.c: Regenerate.
1004         * ip2k-opc.h: Regenerate.
1005         * iq2000-desc.c: Regenerate.
1006         * iq2000-desc.h: Regenerate.
1007         * iq2000-opc.c: Regenerate.
1008         * iq2000-opc.h: Regenerate.
1009         * m32r-desc.c: Regenerate.
1010         * m32r-desc.h: Regenerate.
1011         * m32r-opc.c: Regenerate.
1012         * m32r-opc.h: Regenerate.
1013         * m32r-opinst.c: Regenerate.
1014         * openrisc-desc.c: Regenerate.
1015         * openrisc-desc.h: Regenerate.
1016         * openrisc-opc.c: Regenerate.
1017         * openrisc-opc.h: Regenerate.
1018         * xstormy16-desc.c: Regenerate.
1019         * xstormy16-desc.h: Regenerate.
1020         * xstormy16-opc.c: Regenerate.
1021         * xstormy16-opc.h: Regenerate.
1022
1023 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
1024
1025         * Makefile.am: Run "make dep-am"
1026         * Makefile.in: Regenerate.
1027
1028 2005-02-15  Nick Clifton  <nickc@redhat.com>
1029
1030         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
1031         compile time warnings.
1032         (print_keyword): Likewise.
1033         (default_print_insn): Likewise.
1034
1035         * fr30-desc.c: Regenerated.
1036         * fr30-desc.h: Regenerated.
1037         * fr30-dis.c: Regenerated.
1038         * fr30-opc.c: Regenerated.
1039         * fr30-opc.h: Regenerated.
1040         * frv-desc.c: Regenerated.
1041         * frv-dis.c: Regenerated.
1042         * frv-opc.c: Regenerated.
1043         * ip2k-asm.c: Regenerated.
1044         * ip2k-desc.c: Regenerated.
1045         * ip2k-desc.h: Regenerated.
1046         * ip2k-dis.c: Regenerated.
1047         * ip2k-opc.c: Regenerated.
1048         * ip2k-opc.h: Regenerated.
1049         * iq2000-desc.c: Regenerated.
1050         * iq2000-dis.c: Regenerated.
1051         * iq2000-opc.c: Regenerated.
1052         * m32r-asm.c: Regenerated.
1053         * m32r-desc.c: Regenerated.
1054         * m32r-desc.h: Regenerated.
1055         * m32r-dis.c: Regenerated.
1056         * m32r-opc.c: Regenerated.
1057         * m32r-opc.h: Regenerated.
1058         * m32r-opinst.c: Regenerated.
1059         * openrisc-desc.c: Regenerated.
1060         * openrisc-desc.h: Regenerated.
1061         * openrisc-dis.c: Regenerated.
1062         * openrisc-opc.c: Regenerated.
1063         * openrisc-opc.h: Regenerated.
1064         * xstormy16-desc.c: Regenerated.
1065         * xstormy16-desc.h: Regenerated.
1066         * xstormy16-dis.c: Regenerated.
1067         * xstormy16-opc.c: Regenerated.
1068         * xstormy16-opc.h: Regenerated.
1069
1070 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
1071
1072         * dis-buf.c (perror_memory): Use sprintf_vma to print out
1073         address.
1074
1075 2005-02-11  Nick Clifton  <nickc@redhat.com>
1076
1077         * iq2000-asm.c: Regenerate.
1078
1079         * frv-dis.c: Regenerate.
1080
1081 2005-02-07  Jim Blandy  <jimb@redhat.com>
1082
1083         * Makefile.am (CGEN): Load guile.scm before calling the main
1084         application script.
1085         * Makefile.in: Regenerated.
1086         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
1087         Simply pass the cgen-opc.scm path to ${cgen} as its first
1088         argument; ${cgen} itself now contains the '-s', or whatever is
1089         appropriate for the Scheme being used.
1090
1091 2005-01-31  Andrew Cagney  <cagney@gnu.org>
1092
1093         * configure: Regenerate to track ../gettext.m4.
1094
1095 2005-01-31  Jan Beulich  <jbeulich@novell.com>
1096
1097         * ia64-gen.c (NELEMS): Define.
1098         (shrink): Generate alias with missing second predicate register when
1099         opcode has two outputs and these are both predicates.
1100         * ia64-opc-i.c (FULL17): Define.
1101         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
1102         here to generate output template.
1103         (TBITCM, TNATCM): Undefine after use.
1104         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
1105         first input. Add ld16 aliases without ar.csd as second output. Add
1106         st16 aliases without ar.csd as second input. Add cmpxchg aliases
1107         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
1108         ar.ccv as third/fourth inputs. Consolidate through...
1109         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
1110         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
1111         * ia64-asmtab.c: Regenerate.
1112
1113 2005-01-27  Andrew Cagney  <cagney@gnu.org>
1114
1115         * configure: Regenerate to track ../gettext.m4 change.
1116
1117 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
1118
1119         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
1120         * frv-asm.c: Rebuilt.
1121         * frv-desc.c: Rebuilt.
1122         * frv-desc.h: Rebuilt.
1123         * frv-dis.c: Rebuilt.
1124         * frv-ibld.c: Rebuilt.
1125         * frv-opc.c: Rebuilt.
1126         * frv-opc.h: Rebuilt.
1127
1128 2005-01-24  Andrew Cagney  <cagney@gnu.org>
1129
1130         * configure: Regenerate, ../gettext.m4 was updated.
1131
1132 2005-01-21  Fred Fish  <fnf@specifixinc.com>
1133
1134         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
1135         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
1136         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
1137         * mips-dis.c: Ditto.
1138
1139 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
1140
1141         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
1142
1143 2005-01-19  Fred Fish  <fnf@specifixinc.com>
1144
1145         * mips-dis.c (no_aliases): New disassembly option flag.
1146         (set_default_mips_dis_options): Init no_aliases to zero.
1147         (parse_mips_dis_option): Handle no-aliases option.
1148         (print_insn_mips): Ignore table entries that are aliases
1149         if no_aliases is set.
1150         (print_insn_mips16): Ditto.
1151         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
1152         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
1153         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
1154         * mips16-opc.c (mips16_opcodes): Ditto.
1155
1156 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
1157
1158         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
1159         (inheritance diagram): Add missing edge.
1160         (arch_sh1_up): Rename arch_sh_up to match external name to make life
1161         easier for the testsuite.
1162         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
1163         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
1164         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
1165         arch_sh2a_or_sh4_up child.
1166         (sh_table): Do renaming as above.
1167         Correct comment for ldc.l for gas testsuite to read.
1168         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
1169         Correct comments for movy.w and movy.l for gas testsuite to read.
1170         Correct comments for fmov.d and fmov.s for gas testsuite to read.
1171
1172 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
1173
1174         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
1175
1176 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
1177
1178         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
1179
1180 2005-01-10  Andreas Schwab  <schwab@suse.de>
1181
1182         * disassemble.c (disassemble_init_for_target) <case
1183         bfd_arch_ia64>: Set skip_zeroes to 16.
1184         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
1185
1186 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
1187
1188         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
1189
1190 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
1191
1192         * avr-dis.c: Prettyprint. Added printing of symbol names in all
1193         memory references. Convert avr_operand() to C90 formatting.
1194
1195 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
1196
1197         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
1198
1199 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
1200
1201         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
1202         (no_op_insn): Initialize array with instructions that have no
1203         operands.
1204         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
1205
1206 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
1207
1208         * arm-dis.c: Correct top-level comment.
1209
1210 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
1211
1212         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
1213         architecuture defining the insn.
1214         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
1215         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
1216         field.
1217         Also include opcode/arm.h.
1218         * Makefile.am (arm-dis.lo): Update dependency list.
1219         * Makefile.in: Regenerate.
1220
1221 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
1222
1223         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
1224         reflect the change to the short immediate syntax.
1225
1226 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
1227
1228         * or32-opc.c (debug): Warning fix.
1229         * po/POTFILES.in: Regenerate.
1230
1231         * maxq-dis.c: Formatting.
1232         (print_insn): Warning fix.
1233
1234 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
1235
1236         * arm-dis.c (WORD_ADDRESS): Define.
1237         (print_insn): Use it.  Correct big-endian end-of-section handling.
1238
1239 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
1240             Vineet Sharma      <vineets@noida.hcltech.com>
1241
1242         * maxq-dis.c: New file.
1243         * disassemble.c (ARCH_maxq): Define.
1244         (disassembler): Add 'print_insn_maxq_little' for handling maxq
1245         instructions..
1246         * configure.in: Add case for bfd_maxq_arch.
1247         * configure: Regenerate.
1248         * Makefile.am: Add support for maxq-dis.c
1249         * Makefile.in: Regenerate.
1250         * aclocal.m4: Regenerate.
1251
1252 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
1253
1254         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
1255         mode.
1256         * crx-dis.c: Likewise.
1257
1258 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
1259
1260         Generally, handle CRISv32.
1261         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
1262         (struct cris_disasm_data): New type.
1263         (format_reg, format_hex, cris_constraint, print_flags)
1264         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
1265         callers changed.
1266         (format_sup_reg, print_insn_crisv32_with_register_prefix)
1267         (print_insn_crisv32_without_register_prefix)
1268         (print_insn_crisv10_v32_with_register_prefix)
1269         (print_insn_crisv10_v32_without_register_prefix)
1270         (cris_parse_disassembler_options): New functions.
1271         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
1272         parameter.  All callers changed.
1273         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
1274         failure.
1275         (cris_constraint) <case 'Y', 'U'>: New cases.
1276         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
1277         for constraint 'n'.
1278         (print_with_operands) <case 'Y'>: New case.
1279         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
1280         <case 'N', 'Y', 'Q'>: New cases.
1281         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
1282         (print_insn_cris_with_register_prefix)
1283         (print_insn_cris_without_register_prefix): Call
1284         cris_parse_disassembler_options.
1285         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
1286         for CRISv32 and the size of immediate operands.  New v32-only
1287         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
1288         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
1289         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
1290         Change brp to be v3..v10.
1291         (cris_support_regs): New vector.
1292         (cris_opcodes): Update head comment.  New format characters '[',
1293         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
1294         Add new opcodes for v32 and adjust existing opcodes to accommodate
1295         differences to earlier variants.
1296         (cris_cond15s): New vector.
1297
1298 2004-11-04 Jan Beulich <jbeulich@novell.com>
1299
1300         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
1301         (indirEb): Remove.
1302         (Mp): Use f_mode rather than none at all.
1303         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
1304         replaces what previously was x_mode; x_mode now means 128-bit SSE
1305         operands.
1306         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
1307         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
1308         pinsrw's second operand is Edqw.
1309         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
1310         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
1311         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
1312         mode when an operand size override is present or always suffixing.
1313         More instructions will need to be added to this group.
1314         (putop): Handle new macro chars 'C' (short/long suffix selector),
1315         'I' (Intel mode override for following macro char), and 'J' (for
1316         adding the 'l' prefix to far branches in AT&T mode). When an
1317         alternative was specified in the template, honor macro character when
1318         specified for Intel mode.
1319         (OP_E): Handle new *_mode values. Correct pointer specifications for
1320         memory operands. Consolidate output of index register.
1321         (OP_G): Handle new *_mode values.
1322         (OP_I): Handle const_1_mode.
1323         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
1324         respective opcode prefix bits have been consumed.
1325         (OP_EM, OP_EX): Provide some default handling for generating pointer
1326         specifications.
1327
1328 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
1329
1330         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
1331         COP_INST macro.
1332
1333 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
1334
1335         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
1336         (getregliststring): Support HI/LO and user registers.
1337         * crx-opc.c (crx_instruction): Update data structure according to the
1338         rearrangement done in CRX opcode header file.
1339         (crx_regtab):  Likewise.
1340         (crx_optab):  Likewise.
1341         (crx_instruction): Reorder load/stor instructions, remove unsupported
1342         formats.
1343         support new Co-Processor instruction 'cpi'.
1344
1345 2004-10-27  Nick Clifton  <nickc@redhat.com>
1346
1347         * opcodes/iq2000-asm.c: Regenerate.
1348         * opcodes/iq2000-desc.c: Regenerate.
1349         * opcodes/iq2000-desc.h: Regenerate.
1350         * opcodes/iq2000-dis.c: Regenerate.
1351         * opcodes/iq2000-ibld.c: Regenerate.
1352         * opcodes/iq2000-opc.c: Regenerate.
1353         * opcodes/iq2000-opc.h: Regenerate.
1354
1355 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
1356
1357         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1358         us4, us5 (respectively).
1359         Remove unsupported 'popa' instruction.
1360         Reverse operands order in store co-processor instructions.
1361
1362 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
1363
1364         * Makefile.am: Run "make dep-am"
1365         * Makefile.in: Regenerate.
1366
1367 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
1368
1369         * xtensa-dis.c: Use ISO C90 formatting.
1370
1371 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
1372
1373         * ppc-opc.c: Revert 2004-09-09 change.
1374
1375 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
1376
1377         * xtensa-dis.c (state_names): Delete.
1378         (fetch_data): Use xtensa_isa_maxlength.
1379         (print_xtensa_operand): Replace operand parameter with opcode/operand
1380         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
1381         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
1382         instruction bundles.  Use xmalloc instead of malloc.
1383
1384 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
1385
1386         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1387         initializers.
1388
1389 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
1390
1391         * crx-opc.c (crx_instruction): Support Co-processor insns.
1392         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1393         (getregliststring): Change function to use the above enum.
1394         (print_arg): Handle CO-Processor insns.
1395         (crx_cinvs): Add 'b' option to invalidate the branch-target
1396         cache.
1397
1398 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
1399
1400         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1401         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1402         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1403         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1404         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1405
1406 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
1407
1408         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1409         rather than add it.
1410
1411 2004-09-30  Paul Brook  <paul@codesourcery.com>
1412
1413         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1414         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
1415
1416 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
1417
1418         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1419         (CONFIG_STATUS_DEPENDENCIES): New.
1420         (Makefile): Removed.
1421         (config.status): Likewise.
1422         * Makefile.in: Regenerated.
1423
1424 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
1425
1426         * Makefile.am: Run "make dep-am".
1427         * Makefile.in: Regenerate.
1428         * aclocal.m4: Regenerate.
1429         * configure: Regenerate.
1430         * po/POTFILES.in: Regenerate.
1431         * po/opcodes.pot: Regenerate.
1432
1433 2004-09-11  Andreas Schwab  <schwab@suse.de>
1434
1435         * configure: Rebuild.
1436
1437 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
1438
1439         * ppc-opc.c (L): Make this field not optional.
1440
1441 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
1442
1443         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1444         Fix parameter to 'm[t|f]csr' insns.
1445
1446 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
1447
1448         * configure.in: Autoupdate to autoconf 2.59.
1449         * aclocal.m4: Rebuild with aclocal 1.4p6.
1450         * configure: Rebuild with autoconf 2.59.
1451         * Makefile.in: Rebuild with automake 1.4p6 (picking up
1452         bfd changes for autoconf 2.59 on the way).
1453         * config.in: Rebuild with autoheader 2.59.
1454
1455 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
1456
1457         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1458
1459 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
1460
1461         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1462         (GRPPADLCK2): New define.
1463         (twobyte_has_modrm): True for 0xA6.
1464         (grps): GRPPADLCK2 for opcode 0xA6.
1465
1466 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
1467
1468         Introduce SH2a support.
1469         * sh-opc.h (arch_sh2a_base): Renumber.
1470         (arch_sh2a_nofpu_base): Remove.
1471         (arch_sh_base_mask): Adjust.
1472         (arch_opann_mask): New.
1473         (arch_sh2a, arch_sh2a_nofpu): Adjust.
1474         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1475         (sh_table): Adjust whitespace.
1476         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
1477         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
1478         instruction list throughout.
1479         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
1480         of arch_sh2a in instruction list throughout.
1481         (arch_sh2e_up): Accomodate above changes.
1482         (arch_sh2_up): Ditto.
1483         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
1484         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1485         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
1486         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1487         * sh-opc.h (arch_sh2a_nofpu): New.
1488         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1489         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1490         instruction.
1491         2004-01-20  DJ Delorie  <dj@redhat.com>
1492         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1493         2003-12-29  DJ Delorie  <dj@redhat.com>
1494         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1495         sh_opcode_info, sh_table): Add sh2a support.
1496         (arch_op32): New, to tag 32-bit opcodes.
1497         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1498         2003-12-02  Michael Snyder  <msnyder@redhat.com>
1499         * sh-opc.h (arch_sh2a): Add.
1500         * sh-dis.c (arch_sh2a): Handle.
1501         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1502
1503 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
1504
1505         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1506
1507 2004-07-22  Nick Clifton  <nickc@redhat.com>
1508
1509         PR/280
1510         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1511         insns - this is done by objdump itself.
1512         * h8500-dis.c (print_insn_h8500): Likewise.
1513
1514 2004-07-21  Jan Beulich <jbeulich@novell.com>
1515
1516         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1517         regardless of address size prefix in effect.
1518         (ptr_reg): Size or address registers does not depend on rex64, but
1519         on the presence of an address size override.
1520         (OP_MMX): Use rex.x only for xmm registers.
1521         (OP_EM): Use rex.z only for xmm registers.
1522
1523 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1524
1525         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1526         move/branch operations to the bottom so that VR5400 multimedia
1527         instructions take precedence in disassembly.
1528
1529 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1530
1531         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1532         ISA-specific "break" encoding.
1533
1534 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
1535
1536         * arm-opc.h: Fix typo in comment.
1537
1538 2004-07-11  Andreas Schwab  <schwab@suse.de>
1539
1540         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1541
1542 2004-07-09  Andreas Schwab  <schwab@suse.de>
1543
1544         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1545
1546 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
1547
1548         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1549         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1550         (crx-dis.lo): New target.
1551         (crx-opc.lo): Likewise.
1552         * Makefile.in: Regenerate.
1553         * configure.in: Handle bfd_crx_arch.
1554         * configure: Regenerate.
1555         * crx-dis.c: New file.
1556         * crx-opc.c: New file.
1557         * disassemble.c (ARCH_crx): Define.
1558         (disassembler): Handle ARCH_crx.
1559
1560 2004-06-29  James E Wilson  <wilson@specifixinc.com>
1561
1562         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1563         * ia64-asmtab.c: Regnerate.
1564
1565 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
1566
1567         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1568         (extract_fxm): Don't test dialect.
1569         (XFXFXM_MASK): Include the power4 bit.
1570         (XFXM): Add p4 param.
1571         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
1572
1573 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
1574
1575         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
1576         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1577
1578 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
1579
1580         * ppc-opc.c (BH, XLBH_MASK): Define.
1581         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1582
1583 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
1584
1585         * i386-dis.c (x_mode): Comment.
1586         (two_source_ops): File scope.
1587         (float_mem): Correct fisttpll and fistpll.
1588         (float_mem_mode): New table.
1589         (dofloat): Use it.
1590         (OP_E): Correct intel mode PTR output.
1591         (ptr_reg): Use open_char and close_char.
1592         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
1593         operands.  Set two_source_ops.
1594
1595 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
1596
1597         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1598         instead of _raw_size.
1599
1600 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
1601
1602         * ia64-gen.c (in_iclass): Handle more postinc st
1603         and ld variants.
1604         * ia64-asmtab.c: Rebuilt.
1605
1606 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
1607
1608         * s390-opc.txt: Correct architecture mask for some opcodes.
1609         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1610         in the esa mode as well.
1611
1612 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
1613
1614         * sh-dis.c (target_arch): Make unsigned.
1615         (print_insn_sh): Replace (most of) switch with a call to
1616         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1617         * sh-opc.h: Redefine architecture flags values.
1618         Add sh3-nommu architecture.
1619         Reorganise <arch>_up macros so they make more visual sense.
1620         (SH_MERGE_ARCH_SET): Define new macro.
1621         (SH_VALID_BASE_ARCH_SET): Likewise.
1622         (SH_VALID_MMU_ARCH_SET): Likewise.
1623         (SH_VALID_CO_ARCH_SET): Likewise.
1624         (SH_VALID_ARCH_SET): Likewise.
1625         (SH_MERGE_ARCH_SET_VALID): Likewise.
1626         (SH_ARCH_SET_HAS_FPU): Likewise.
1627         (SH_ARCH_SET_HAS_DSP): Likewise.
1628         (SH_ARCH_UNKNOWN_ARCH): Likewise.
1629         (sh_get_arch_from_bfd_mach): Add prototype.
1630         (sh_get_arch_up_from_bfd_mach): Likewise.
1631         (sh_get_bfd_mach_from_arch_set): Likewise.
1632         (sh_merge_bfd_arc): Likewise.
1633
1634 2004-05-24  Peter Barada  <peter@the-baradas.com>
1635
1636         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1637         into new match_insn_m68k function.  Loop over canidate
1638         matches and select first that completely matches.
1639         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1640         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1641         to verify addressing for MAC/EMAC.
1642         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1643         reigster halves since 'fpu' and 'spl' look misleading.
1644         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1645         * m68k-opc.c: Rearragne mac/emac cases to use longest for
1646         first, tighten up match masks.
1647         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
1648         'size' from special case code in print_insn_m68k to
1649         determine decode size of insns.
1650
1651 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
1652
1653         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1654         well as when -mpower4.
1655
1656 2004-05-13  Nick Clifton  <nickc@redhat.com>
1657
1658         * po/fr.po: Updated French translation.
1659
1660 2004-05-05  Peter Barada  <peter@the-baradas.com>
1661
1662         * m68k-dis.c(print_insn_m68k): Add new chips, use core
1663         variants in arch_mask.  Only set m68881/68851 for 68k chips.
1664         * m68k-op.c: Switch from ColdFire chips to core variants.
1665
1666 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
1667
1668         PR 147.
1669         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1670
1671 2004-04-29  Ben Elliston  <bje@au.ibm.com>
1672
1673         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1674         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1675
1676 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
1677
1678         * sh-dis.c (print_insn_sh): Print the value in constant pool
1679         as a symbol if it looks like a symbol.
1680
1681 2004-04-22  Peter Barada <peter@the-baradas.com>
1682
1683         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1684         appropriate ColdFire architectures.
1685         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1686         mask addressing.
1687         Add EMAC instructions, fix MAC instructions. Remove
1688         macmw/macml/msacmw/msacml instructions since mask addressing now
1689         supported.
1690
1691 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
1692
1693         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1694         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1695         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
1696         macro.  Adjust all users.
1697
1698 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
1699
1700         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1701         separately.
1702
1703 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1704
1705         * m32r-asm.c: Regenerate.
1706
1707 2004-03-29  Stan Shebs  <shebs@apple.com>
1708
1709         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1710         used.
1711
1712 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
1713
1714         * aclocal.m4: Regenerate.
1715         * config.in: Regenerate.
1716         * configure: Regenerate.
1717         * po/POTFILES.in: Regenerate.
1718         * po/opcodes.pot: Regenerate.
1719
1720 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
1721
1722         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
1723         PPC_OPERANDS_GPR_0.
1724         * ppc-opc.c (RA0): Define.
1725         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1726         (RAOPT): Rename from RAO.  Update all uses.
1727         (powerpc_opcodes): Use RA0 as appropriate.
1728
1729 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
1730
1731         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1732
1733 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
1734
1735         * sparc-dis.c (print_insn_sparc): Update getword prototype.
1736
1737 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1738
1739         * i386-dis.c (GRPPLOCK): Delete.
1740         (grps): Delete GRPPLOCK entry.
1741
1742 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1743
1744         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1745         (M, Mp): Use OP_M.
1746         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1747         (GRPPADLCK): Define.
1748         (dis386): Use NOP_Fixup on "nop".
1749         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1750         (twobyte_has_modrm): Set for 0xa7.
1751         (padlock_table): Delete.  Move to..
1752         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
1753         and clflush.
1754         (print_insn): Revert PADLOCK_SPECIAL code.
1755         (OP_E): Delete sfence, lfence, mfence checks.
1756
1757 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
1758
1759         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1760         (INVLPG_Fixup): New function.
1761         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1762
1763 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1764
1765         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1766         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1767         (padlock_table): New struct with PadLock instructions.
1768         (print_insn): Handle PADLOCK_SPECIAL.
1769
1770 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1771
1772         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1773         (OP_E): Twiddle clflush to sfence here.
1774
1775 2004-03-08  Nick Clifton  <nickc@redhat.com>
1776
1777         * po/de.po: Updated German translation.
1778
1779 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
1780
1781         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1782         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
1783         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1784         accordingly.
1785
1786 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1787
1788         * frv-asm.c: Regenerate.
1789         * frv-desc.c: Regenerate.
1790         * frv-desc.h: Regenerate.
1791         * frv-dis.c: Regenerate.
1792         * frv-ibld.c: Regenerate.
1793         * frv-opc.c: Regenerate.
1794         * frv-opc.h: Regenerate.
1795
1796 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1797
1798         * frv-desc.c, frv-opc.c: Regenerate.
1799
1800 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1801
1802         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1803
1804 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
1805
1806         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1807         Also correct mistake in the comment.
1808
1809 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
1810
1811         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1812         ensure that double registers have even numbers.
1813         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1814         that reserved instruction 0xfffd does not decode the same
1815         as 0xfdfd (ftrv).
1816         * sh-opc.h: Add REG_N_D nibble type and use it whereever
1817         REG_N refers to a double register.
1818         Add REG_N_B01 nibble type and use it instead of REG_NM
1819         in ftrv.
1820         Adjust the bit patterns in a few comments.
1821
1822 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
1823
1824         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1825
1826 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1827
1828         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1829
1830 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1831
1832         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1833
1834 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1835
1836         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1837         mtivor32, mtivor33, mtivor34.
1838
1839 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
1840
1841         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1842
1843 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
1844
1845         * arm-opc.h Maverick accumulator register opcode fixes.
1846
1847 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
1848
1849         * m32r-dis.c: Regenerate.
1850
1851 2004-01-27  Michael Snyder  <msnyder@redhat.com>
1852
1853         * sh-opc.h (sh_table): "fsrra", not "fssra".
1854
1855 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
1856
1857         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1858         contraints.
1859
1860 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
1861
1862         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1863
1864 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
1865
1866         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1867         1.  Don't print scale factor on AT&T mode when index missing.
1868
1869 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
1870
1871         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1872         when loaded into XR registers.
1873
1874 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1875
1876         * frv-desc.h: Regenerate.
1877         * frv-desc.c: Regenerate.
1878         * frv-opc.c: Regenerate.
1879
1880 2004-01-13  Michael Snyder  <msnyder@redhat.com>
1881
1882         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1883
1884 2004-01-09  Paul Brook  <paul@codesourcery.com>
1885
1886         * arm-opc.h (arm_opcodes): Move generic mcrr after known
1887         specific opcodes.
1888
1889 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
1890
1891         * Makefile.am (libopcodes_la_DEPENDENCIES)
1892         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1893         comment about the problem.
1894         * Makefile.in: Regenerate.
1895
1896 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1897
1898         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1899         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1900         cut&paste errors in shifting/truncating numerical operands.
1901         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1902         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1903         (parse_uslo16): Likewise.
1904         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1905         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1906         (parse_s12): Likewise.
1907         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1908         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1909         (parse_uslo16): Likewise.
1910         (parse_uhi16): Parse gothi and gotfuncdeschi.
1911         (parse_d12): Parse got12 and gotfuncdesc12.
1912         (parse_s12): Likewise.
1913
1914 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1915
1916         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1917         instruction which looks similar to an 'rla' instruction.
1918
1919 For older changes see ChangeLog-0203
1920 \f
1921 Local Variables:
1922 mode: change-log
1923 left-margin: 8
1924 fill-column: 74
1925 version-control: never
1926 End: