opcodes/ChangeLog

   1 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
   2
   3         * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
   4         extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
   5         (s390_crb_extensions): New extensions table.
   6         (insertExpandedMnemonic): Handle '$' tag.
   7         * s390-opc.txt: Remove conditional jump variants which can now
   8         be expanded automatically.
   9         Replace '*' tag with '$' in the compare and branch instructions.
  10
  11 2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
  12
  13         * i386-dis.c (PREFIX_VEX_38XX): Add a tab.
  14         (PREFIX_VEX_3AXX): Likewis.
  15
  16 2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
  17
  18         * i386-opc.tbl: Remove 4 extra blank lines.
  19
  20 2008-04-04  H.J. Lu  <hongjiu.lu@intel.com>
  21
  22         * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
  23         with CPU_PCLMUL_FLAGS/CpuPCLMUL.
  24         (cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
  25         * i386-opc.tbl: Likewise.
  26
  27         * i386-opc.h (CpuCLMUL): Renamed to ...
  28         (CpuPCLMUL): This.
  29         (CpuFMA): Updated.
  30         (i386_cpu_flags): Replace cpuclmul with cpupclmul.
  31
  32         * i386-init.h: Regenerated.
  33
  34 2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>
  35
  36         * i386-dis.c (OP_E_register): New.
  37         (OP_E_memory): Likewise.
  38         (OP_VEX): Likewise.
  39         (OP_EX_Vex): Likewise.
  40         (OP_EX_VexW): Likewise.
  41         (OP_XMM_Vex): Likewise.
  42         (OP_XMM_VexW): Likewise.
  43         (OP_REG_VexI4): Likewise.
  44         (PCLMUL_Fixup): Likewise.
  45         (VEXI4_Fixup): Likewise.
  46         (VZERO_Fixup): Likewise.
  47         (VCMP_Fixup): Likewise.
  48         (VPERMIL2_Fixup): Likewise.
  49         (rex_original): Likewise.
  50         (rex_ignored): Likewise.
  51         (Mxmm): Likewise.
  52         (XMM): Likewise.
  53         (EXxmm): Likewise.
  54         (EXxmmq): Likewise.
  55         (EXymmq): Likewise.
  56         (Vex): Likewise.
  57         (Vex128): Likewise.
  58         (Vex256): Likewise.
  59         (VexI4): Likewise.
  60         (EXdVex): Likewise.
  61         (EXqVex): Likewise.
  62         (EXVexW): Likewise.
  63         (EXdVexW): Likewise.
  64         (EXqVexW): Likewise.
  65         (XMVex): Likewise.
  66         (XMVexW): Likewise.
  67         (XMVexI4): Likewise.
  68         (PCLMUL): Likewise.
  69         (VZERO): Likewise.
  70         (VCMP): Likewise.
  71         (VPERMIL2): Likewise.
  72         (xmm_mode): Likewise.
  73         (xmmq_mode): Likewise.
  74         (ymmq_mode): Likewise.
  75         (vex_mode): Likewise.
  76         (vex128_mode): Likewise.
  77         (vex256_mode): Likewise.
  78         (USE_VEX_C4_TABLE): Likewise.
  79         (USE_VEX_C5_TABLE): Likewise.
  80         (USE_VEX_LEN_TABLE): Likewise.
  81         (VEX_C4_TABLE): Likewise.
  82         (VEX_C5_TABLE): Likewise.
  83         (VEX_LEN_TABLE): Likewise.
  84         (REG_VEX_XX): Likewise.
  85         (MOD_VEX_XXX): Likewise.
  86         (PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
  87         (PREFIX_0F3A44): Likewise.
  88         (PREFIX_0F3ADF): Likewise.
  89         (PREFIX_VEX_XXX): Likewise.
  90         (VEX_OF): Likewise.
  91         (VEX_OF38): Likewise.
  92         (VEX_OF3A): Likewise.
  93         (VEX_LEN_XXX): Likewise.
  94         (vex): Likewise.
  95         (need_vex): Likewise.
  96         (need_vex_reg): Likewise.
  97         (vex_i4_done): Likewise.
  98         (vex_table): Likewise.
  99         (vex_len_table): Likewise.
 100         (OP_REG_VexI4): Likewise.
 101         (vex_cmp_op): Likewise.
 102         (pclmul_op): Likewise.
 103         (vpermil2_op): Likewise.
 104         (m_mode): Updated.
 105         (es_reg): Likewise.
 106         (PREFIX_0F38F0): Likewise.
 107         (PREFIX_0F3A60): Likewise.
 108         (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
 109         (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
 110         and PREFIX_VEX_XXX entries.
 111         (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
 112         (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
 113         PREFIX_0F3ADF.
 114         (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
 115         Add MOD_VEX_XXX entries.
 116         (ckprefix): Initialize rex_original and rex_ignored.  Store the
 117         REX byte in rex_original.
 118         (get_valid_dis386): Handle the implicit prefix in VEX prefix
 119         bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
 120         (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
 121         calling get_valid_dis386.  Use rex_original and rex_ignored when
 122         printing out REX.
 123         (putop): Handle "XY".
 124         (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
 125         ymmq_mode.
 126         (OP_E_extended): Updated to use OP_E_register and
 127         OP_E_memory.
 128         (OP_XMM): Handle VEX.
 129         (OP_EX): Likewise.
 130         (XMM_Fixup): Likewise.
 131         (CMP_Fixup): Use ARRAY_SIZE.
 132
 133         * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
 134         CPU_FMA_FLAGS and CPU_AVX_FLAGS.
 135         (operand_type_init): Add OPERAND_TYPE_REGYMM and
 136         OPERAND_TYPE_VEX_IMM4.
 137         (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
 138         (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
 139         VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
 140         VexImmExt and SSE2AVX.
 141         (operand_types): Add RegYMM, Ymmword and Vex_Imm4.
 142
 143         * i386-opc.h (CpuAVX): New.
 144         (CpuAES): Likewise.
 145         (CpuCLMUL): Likewise.
 146         (CpuFMA): Likewise.
 147         (Vex): Likewise.
 148         (Vex256): Likewise.
 149         (VexNDS): Likewise.
 150         (VexNDD): Likewise.
 151         (VexW0): Likewise.
 152         (VexW1): Likewise.
 153         (Vex0F): Likewise.
 154         (Vex0F38): Likewise.
 155         (Vex0F3A): Likewise.
 156         (Vex3Sources): Likewise.
 157         (VexImmExt): Likewise.
 158         (SSE2AVX): Likewise.
 159         (RegYMM): Likewise.
 160         (Ymmword): Likewise.
 161         (Vex_Imm4): Likewise.
 162         (Implicit1stXmm0): Likewise.
 163         (CpuXsave): Updated.
 164         (CpuLM): Likewise.
 165         (ByteOkIntel): Likewise.
 166         (OldGcc): Likewise.
 167         (Control): Likewise.
 168         (Unspecified): Likewise.
 169         (OTMax): Likewise.
 170         (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
 171         (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
 172         vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
 173         vex3sources, veximmext and sse2avx.
 174         (i386_operand_type): Add regymm, ymmword and vex_imm4.
 175
 176         * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
 177
 178         * i386-reg.tbl: Add AVX registers, ymm0..ymm15.
 179
 180         * i386-init.h: Regenerated.
 181         * i386-tbl.h: Likewise.
 182
 183 2008-03-26  Bernd Schmidt  <bernd.schmidt@analog.com>
 184
 185         From  Robin Getz  <robin.getz@analog.com>
 186         * bfin-dis.c (bu32): Typedef.
 187         (enum const_forms_t): Add c_uimm32 and c_huimm32.
 188         (constant_formats[]): Add uimm32 and huimm16.
 189         (fmtconst_val): New.
 190         (uimm32): Define.
 191         (huimm32): Define.
 192         (imm16_val): Define.
 193         (luimm16_val): Define.
 194         (struct saved_state): Define.
 195         (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
 196         A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
 197         LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
 198         (get_allreg): New.
 199         (decode_LDIMMhalf_0): Print out the whole register value.
 200
 201         From Jie Zhang  <jie.zhang@analog.com>
 202         * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
 203         multiply and multiply-accumulate to data register instruction.
 204
 205         * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
 206         c_imm32, c_huimm32e): Define.
 207         (constant_formats): Add flags for printing decimal, leading spaces, and
 208         exact symbols.
 209         (comment, parallel): Add global flags in all disassembly.
 210         (fmtconst): Take advantage of new flags, and print default in hex.
 211         (fmtconst_val): Likewise.
 212         (decode_macfunc): Be consistant with spaces, tabs, comments,
 213         capitalization in disassembly, fix minor coding style issues.
 214         (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
 215         (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
 216         decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
 217         decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
 218         decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
 219         decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
 220         decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
 221         decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
 222         decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
 223         decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
 224         _print_insn_bfin, print_insn_bfin): Likewise.
 225
 226 2008-03-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 227
 228         * aclocal.m4: Regenerate.
 229         * configure: Likewise.
 230         * Makefile.in: Likewise.
 231
 232 2008-03-13  Alan Modra  <amodra@bigpond.net.au>
 233
 234         * Makefile.am: Run "make dep-am".
 235         * Makefile.in: Regenerate.
 236         * configure: Regenerate.
 237
 238 2008-03-07  Alan Modra  <amodra@bigpond.net.au>
 239
 240         * ppc-opc.c (powerpc_opcodes): Order and format.
 241
 242 2008-03-01  H.J. Lu  <hongjiu.lu@intel.com>
 243
 244         * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
 245         * i386-tbl.h: Regenerated.
 246
 247 2008-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 248
 249         * i386-opc.tbl: Disallow 16-bit near indirect branches for
 250         x86-64.
 251         * i386-tbl.h: Regenerated.
 252
 253 2008-02-21  Jan Beulich  <jbeulich@novell.com>
 254
 255         * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
 256         and Fword for far indirect jmp. Allow Reg16 and Word for near
 257         indirect jmp on x86-64. Disallow Fword for lcall.
 258         * i386-tbl.h: Re-generate.
 259
 260 2008-02-18  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 261
 262         * cr16-opc.c  (cr16_num_optab): Defined
 263
 264 2008-02-16  H.J. Lu  <hongjiu.lu@intel.com>
 265
 266         * i386-gen.c  (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
 267         * i386-init.h: Regenerated.
 268
 269 2008-02-14  Nick Clifton  <nickc@redhat.com>
 270
 271         PR binutils/5524
 272         * configure.in (SHARED_LIBADD): Select the correct host specific
 273         file extension for shared libraries.
 274         * configure: Regenerate.
 275
 276 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 277
 278         * i386-opc.h (RegFlat): New.
 279         * i386-reg.tbl (flat): Add.
 280         * i386-tbl.h: Re-generate.
 281
 282 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 283
 284         * i386-dis.c (a_mode): New.
 285         (cond_jump_mode): Adjust.
 286         (Ma): Change to a_mode.
 287         (intel_operand_size): Handle a_mode.
 288         * i386-opc.tbl: Allow Dword and Qword for bound.
 289         * i386-tbl.h: Re-generate.
 290
 291 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 292
 293         * i386-gen.c (process_i386_registers): Process new fields.
 294         * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
 295         unsigned char. Add dw2_regnum and Dw2Inval.
 296         * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
 297         register names.
 298         * i386-tbl.h: Re-generate.
 299
 300 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 301
 302         * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
 303         * i386-init.h: Updated.
 304
 305 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 306
 307         * i386-gen.c (cpu_flags): Add CpuXsave.
 308
 309         * i386-opc.h (CpuXsave): New.
 310         (CpuLM): Updated.
 311         (i386_cpu_flags): Add cpuxsave.
 312
 313         * i386-dis.c (MOD_0FAE_REG_4): New.
 314         (RM_0F01_REG_2): Likewise.
 315         (MOD_0FAE_REG_5): Updated.
 316         (RM_0F01_REG_3): Likewise.
 317         (reg_table): Use MOD_0FAE_REG_4.
 318         (mod_table): Use RM_0F01_REG_2.  Add MOD_0FAE_REG_4.  Updated
 319         for xrstor.
 320         (rm_table): Add RM_0F01_REG_2.
 321
 322         * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
 323         * i386-init.h: Regenerated.
 324         * i386-tbl.h: Likewise.
 325
 326 2008-02-11  Jan Beulich  <jbeulich@novell.com>
 327
 328         * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
 329         Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
 330         * i386-tbl.h: Re-generate.
 331
 332 2008-02-04  H.J. Lu  <hongjiu.lu@intel.com>
 333
 334         PR 5715
 335         * configure: Regenerated.
 336
 337 2008-02-04  Adam Nemet  <anemet@caviumnetworks.com>
 338
 339         * mips-dis.c: Update copyright.
 340         (mips_arch_choices): Add Octeon.
 341         * mips-opc.c: Update copyright.
 342         (IOCT): New macro.
 343         (mips_builtin_opcodes): Add Octeon instruction synciobdma.
 344
 345 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 346
 347         * ppc-opc.c: Support optional L form mtmsr.
 348
 349 2008-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 350
 351         * i386-dis.c (OP_E_extended): Handle r12 like rsp.
 352
 353 2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 354
 355         * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
 356         * i386-init.h: Regenerated.
 357
 358 2008-01-23  Tristan Gingold  <gingold@adacore.com>
 359
 360         * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
 361         ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
 362
 363 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 364
 365         * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
 366         (cpu_flags): Likewise.
 367
 368         * i386-opc.h (CpuMMX2): Removed.
 369         (CpuSSE): Updated.
 370
 371         * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
 372         * i386-init.h: Regenerated.
 373         * i386-tbl.h: Likewise.
 374
 375 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 376
 377         * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
 378         CPU_SMX_FLAGS.
 379         * i386-init.h: Regenerated.
 380
 381 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 382
 383         * i386-opc.tbl: Use Qword on movddup.
 384         * i386-tbl.h: Regenerated.
 385
 386 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 387
 388         * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
 389         * i386-tbl.h: Regenerated.
 390
 391 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 392
 393         * i386-dis.c (Mx): New.
 394         (PREFIX_0FC3): Likewise.
 395         (PREFIX_0FC7_REG_6): Updated.
 396         (dis386_twobyte): Use PREFIX_0FC3.
 397         (prefix_table): Add PREFIX_0FC3.  Use Mq on movntq and movntsd.
 398         Use Mx on movntps, movntpd, movntdq and movntdqa.  Use Md on
 399         movntss.
 400
 401 2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 402
 403         * i386-gen.c (opcode_modifiers): Add IntelSyntax.
 404         (operand_types): Add Mem.
 405
 406         * i386-opc.h (IntelSyntax): New.
 407         * i386-opc.h (Mem): New.
 408         (Byte): Updated.
 409         (Opcode_Modifier_Max): Updated.
 410         (i386_opcode_modifier): Add intelsyntax.
 411         (i386_operand_type): Add mem.
 412
 413         * i386-opc.tbl: Remove Reg16 from movnti.  Add sizes to more
 414         instructions.
 415
 416         * i386-reg.tbl: Add size for accumulator.
 417
 418         * i386-init.h: Regenerated.
 419         * i386-tbl.h: Likewise.
 420
 421 2008-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 422
 423         * i386-opc.h (Byte): Fix a typo.
 424
 425 2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 426
 427         PR gas/5534
 428         * i386-gen.c (operand_type_init): Add Dword to
 429         OPERAND_TYPE_ACC32.  Add Qword to OPERAND_TYPE_ACC64.
 430         (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
 431         Qword and Xmmword.
 432         (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
 433         Xmmword, Unspecified and Anysize.
 434         (set_bitfield): Make Mmword an alias of Qword.  Make Oword
 435         an alias of Xmmword.
 436
 437         * i386-opc.h (CheckSize): Removed.
 438         (Byte): Updated.
 439         (Word): Likewise.
 440         (Dword): Likewise.
 441         (Qword): Likewise.
 442         (Xmmword): Likewise.
 443         (FWait): Updated.
 444         (OTMax): Likewise.
 445         (i386_opcode_modifier): Remove checksize, byte, word, dword,
 446         qword and xmmword.
 447         (Fword): New.
 448         (TBYTE): Likewise.
 449         (Unspecified): Likewise.
 450         (Anysize): Likewise.
 451         (i386_operand_type): Add byte, word, dword, fword, qword,
 452         tbyte xmmword, unspecified and anysize.
 453
 454         * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
 455         Tbyte, Xmmword, Unspecified and Anysize.
 456
 457         * i386-reg.tbl: Add size for accumulator.
 458
 459         * i386-init.h: Regenerated.
 460         * i386-tbl.h: Likewise.
 461
 462 2008-01-10  H.J. Lu  <hongjiu.lu@intel.com>
 463
 464         * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
 465         (REG_0F18): Updated.
 466         (reg_table): Updated.
 467         (dis386_twobyte): Updated.  Use "nopQ" on 0x19 to 0x1e.
 468         (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
 469
 470 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 471
 472         * i386-gen.c (set_bitfield): Use fail () on error.
 473
 474 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 475
 476         * i386-gen.c (lineno): New.
 477         (filename): Likewise.
 478         (set_bitfield): Report filename and line numer on error.
 479         (process_i386_opcodes): Set filename and update lineno.
 480         (process_i386_registers): Likewise.
 481
 482 2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>
 483
 484         * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
 485         ATTSyntax.
 486
 487         * i386-opc.h (IntelMnemonic): Renamed to ..
 488         (ATTSyntax): This
 489         (Opcode_Modifier_Max): Updated.
 490         (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
 491         and intelsyntax.
 492
 493         * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
 494         on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
 495         * i386-tbl.h: Regenerated.
 496
 497 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 498
 499         * i386-gen.c: Update copyright to 2008.
 500         * i386-opc.h: Likewise.
 501         * i386-opc.tbl: Likewise.
 502
 503         * i386-init.h: Regenerated.
 504         * i386-tbl.h: Likewise.
 505
 506 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 507
 508         * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
 509         pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
 510         * i386-tbl.h: Regenerated.
 511
 512 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
 513
 514         * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
 515         CpuSSE4_2_Or_ABM.
 516         (cpu_flags): Likewise.
 517
 518         * i386-opc.h (CpuSSE4_1_Or_5): Removed.
 519         (CpuSSE4_2_Or_ABM): Likewise.
 520         (CpuLM): Updated.
 521         (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
 522
 523         * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
 524         Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
 525         and CpuPadLock, respectively.
 526         * i386-init.h: Regenerated.
 527         * i386-tbl.h: Likewise.
 528
 529 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
 530
 531         * i386-gen.c (opcode_modifiers): Remove No_xSuf.
 532
 533         * i386-opc.h (No_xSuf): Removed.
 534         (CheckSize): Updated.
 535
 536         * i386-tbl.h: Regenerated.
 537
 538 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 539
 540         * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
 541         CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
 542         CPU_SSE5_FLAGS.
 543         (cpu_flags): Add CpuSSE4_2_Or_ABM.
 544
 545         * i386-opc.h (CpuSSE4_2_Or_ABM): New.
 546         (CpuLM): Updated.
 547         (i386_cpu_flags): Add cpusse4_2_or_abm.
 548
 549         * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
 550         CpuABM|CpuSSE4_2 on popcnt.
 551         * i386-init.h: Regenerated.
 552         * i386-tbl.h: Likewise.
 553
 554 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 555
 556         * i386-opc.h: Update comments.
 557
 558 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 559
 560         * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
 561         * i386-opc.h: Likewise.
 562         * i386-opc.tbl: Likewise.
 563
 564 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 565
 566         PR gas/5534
 567         * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
 568         Byte, Word, Dword, QWord and Xmmword.
 569
 570         * i386-opc.h (No_xSuf): New.
 571         (CheckSize): Likewise.
 572         (Byte): Likewise.
 573         (Word): Likewise.
 574         (Dword): Likewise.
 575         (QWord): Likewise.
 576         (Xmmword): Likewise.
 577         (FWait): Updated.
 578         (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
 579         Dword, QWord and Xmmword.
 580
 581         * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
 582         used.
 583         * i386-tbl.h: Regenerated.
 584
 585 2008-01-02  Mark Kettenis  <kettenis@gnu.org>
 586
 587         * m88k-dis.c (instructions): Fix fcvt.* instructions.
 588         From Miod Vallat.
 589
 590 For older changes see ChangeLog-2007
 591 \f
 592 Local Variables:
 593 mode: change-log
 594 left-margin: 8
 595 fill-column: 74
 596 version-control: never
 597 End: