opcodes/ChangeLog

   1 2020-02-10  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
   2             Matthew Malcomson  <matthew.malcomson@arm.com>
   3
   4         * arm-dis.c (struct cdeopcode32): New.
   5         (CDE_OPCODE): New macro.
   6         (cde_opcodes): New disassembly table.
   7         (regnames): New option to table.
   8         (cde_coprocs): New global variable.
   9         (print_insn_cde): New
  10         (print_insn_thumb32): Use print_insn_cde.
  11         (parse_arm_disassembler_options): Parse coprocN args.
  12
  13 2020-02-10  H.J. Lu  <hongjiu.lu@intel.com>
  14
  15         PR gas/25516
  16         * i386-gen.c (opcode_modifiers): Replace AMD64 and Intel64
  17         with ISA64.
  18         * i386-opc.h (AMD64): Removed.
  19         (Intel64): Likewose.
  20         (AMD64): New.
  21         (INTEL64): Likewise.
  22         (INTEL64ONLY): Likewise.
  23         (i386_opcode_modifier): Replace amd64 and intel64 with isa64.
  24         * i386-opc.tbl (Amd64): New.
  25         (Intel64): Likewise.
  26         (Intel64Only): Likewise.
  27         Replace AMD64 with Amd64.  Update sysenter/sysenter with
  28         Cpu64 and Intel64Only.  Remove AMD64 from sysenter/sysenter.
  29         * i386-tbl.h: Regenerated.
  30
  31 2020-02-07  Sergey Belyashov  <sergey.belyashov@gmail.com>
  32
  33         PR 25469
  34         * z80-dis.c: Add support for GBZ80 opcodes.
  35
  36 2020-02-04  Alan Modra  <amodra@gmail.com>
  37
  38         * d30v-dis.c (print_insn): Make "val" and "opnum" unsigned.
  39
  40 2020-02-03  Alan Modra  <amodra@gmail.com>
  41
  42         * m32c-ibld.c: Regenerate.
  43
  44 2020-02-01  Alan Modra  <amodra@gmail.com>
  45
  46         * frv-ibld.c: Regenerate.
  47
  48 2020-01-31  Jan Beulich  <jbeulich@suse.com>
  49
  50         * i386-dis.c (EXxmm_mdq, xmm_mdq_mode): Delete.
  51         (intel_operand_size, OP_EX): Drop xmm_mdq_mode case label.
  52         (OP_E_memory): Replace xmm_mdq_mode case label by
  53         vex_scalar_w_dq_mode one.
  54         * i386-dis-evex-prefix.h: Replace EXxmm_mdq by EXVexWdqScalar.
  55
  56 2020-01-31  Jan Beulich  <jbeulich@suse.com>
  57
  58         * i386-dis.c (EXVexWdq, vex_w_dq_mode): Delete.
  59         (vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode,
  60         vex_scalar_w_dq_mode): Don't refer to vex_w_dq_mode in comments.
  61         (intel_operand_size): Drop vex_w_dq_mode case label.
  62
  63 2020-01-31  Richard Sandiford  <richard.sandiford@arm.com>
  64
  65         * aarch64-tbl.h (aarch64_opcode): Set C_MAX_ELEM for SVE bfcvt.
  66         Remove C_SCAN_MOVPRFX for SVE bfcvtnt.
  67
  68 2020-01-30  Alan Modra  <amodra@gmail.com>
  69
  70         * m32c-ibld.c: Regenerate.
  71
  72 2020-01-30  Jose E. Marchesi  <jose.marchesi@oracle.com>
  73
  74         * bpf-opc.c: Regenerate.
  75
  76 2020-01-30  Jan Beulich  <jbeulich@suse.com>
  77
  78         * i386-dis.c (X86_64_C2, X86_64_C3): New enumerators.
  79         (dis386): Use them to replace C2/C3 table entries.
  80         (x86_64_table): Add X86_64_C2 and X86_64_C3 entries.
  81         * i386-opc.tbl (ret): Split Cpu64 entries into AMD64 and Intel64
  82         ones. Use Size64 instead of DefaultSize on Intel64 ones.
  83         * i386-tbl.h: Re-generate.
  84
  85 2020-01-30  Jan Beulich  <jbeulich@suse.com>
  86
  87         * i386-opc.tbl (call): Drop DefaultSize from Intel64 JumpDword
  88         forms.
  89         (fldenv, fnstenv, fstenv, fnsave, fsave, frstor): Drop
  90         DefaultSize.
  91         * i386-tbl.h: Re-generate.
  92
  93 2020-01-30  Alan Modra  <amodra@gmail.com>
  94
  95         * tic4x-dis.c (tic4x_dp): Make unsigned.
  96
  97 2020-01-27  H.J. Lu  <hongjiu.lu@intel.com>
  98             Jan Beulich  <jbeulich@suse.com>
  99
 100         PR binutils/25445
 101         * i386-dis.c (MOVSXD_Fixup): New function.
 102         (movsxd_mode): New enum.
 103         (x86_64_table): Use MOVSXD_Fixup and movsxd_mode on movsxd.
 104         (intel_operand_size): Handle movsxd_mode.
 105         (OP_E_register): Likewise.
 106         (OP_G): Likewise.
 107         * i386-opc.tbl: Remove Rex64 and allow 32-bit destination
 108         register on movsxd.  Add movsxd with 16-bit destination register
 109         for AMD64 and Intel64 ISAs.
 110         * i386-tbl.h: Regenerated.
 111
 112 2020-01-27  Tamar Christina  <tamar.christina@arm.com>
 113
 114         PR 25403
 115         * aarch64-tbl.h (struct aarch64_opcode): Re-order cfinv.
 116         * aarch64-asm-2.c: Regenerate
 117         * aarch64-dis-2.c: Likewise.
 118         * aarch64-opc-2.c: Likewise.
 119
 120 2020-01-21  Jan Beulich  <jbeulich@suse.com>
 121
 122         * i386-opc.tbl (sysret): Drop DefaultSize.
 123         * i386-tbl.h: Re-generate.
 124
 125 2020-01-21  Jan Beulich  <jbeulich@suse.com>
 126
 127         * i386-opc.tbl (vcvtneps2bf16x): Add Broadcast, Xmmword, and
 128         Dword.
 129         (vcvtneps2bf16y): Add Broadcast, Ymmword, and Dword.
 130         * i386-tbl.h: Re-generate.
 131
 132 2020-01-20  Nick Clifton  <nickc@redhat.com>
 133
 134         * po/de.po: Updated German translation.
 135         * po/pt_BR.po: Updated Brazilian Portuguese translation.
 136         * po/uk.po: Updated Ukranian translation.
 137
 138 2020-01-20  Alan Modra  <amodra@gmail.com>
 139
 140         * hppa-dis.c (fput_const): Remove useless cast.
 141
 142 2020-01-20  Alan Modra  <amodra@gmail.com>
 143
 144         * arm-dis.c (print_insn_arm): Wrap 'T' value.
 145
 146 2020-01-18  Nick Clifton  <nickc@redhat.com>
 147
 148         * configure: Regenerate.
 149         * po/opcodes.pot: Regenerate.
 150
 151 2020-01-18  Nick Clifton  <nickc@redhat.com>
 152
 153         Binutils 2.34 branch created.
 154
 155 2020-01-17  Christian Biesinger  <cbiesinger@google.com>
 156
 157         * opintl.h: Fix spelling error (seperate).
 158
 159 2020-01-17  H.J. Lu  <hongjiu.lu@intel.com>
 160
 161         * i386-opc.tbl: Add {vex} pseudo prefix.
 162         * i386-tbl.h: Regenerated.
 163
 164 2020-01-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
 165
 166         PR 25376
 167         * opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
 168         (neon_opcodes): Likewise.
 169         (select_arm_features): Make sure we enable MVE bits when selecting
 170         armv8.1-m.main.  Make sure we do not enable MVE bits when not selecting
 171         any architecture.
 172
 173 2020-01-16  Jan Beulich  <jbeulich@suse.com>
 174
 175         * i386-opc.tbl: Drop stale comment from XOP section.
 176
 177 2020-01-16  Jan Beulich  <jbeulich@suse.com>
 178
 179         * i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
 180         (extractps): Add VexWIG to SSE2AVX forms.
 181         * i386-tbl.h: Re-generate.
 182
 183 2020-01-16  Jan Beulich  <jbeulich@suse.com>
 184
 185         * i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
 186         Size64 from and use VexW1 on SSE2AVX forms.
 187         (vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
 188         VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
 189         * i386-tbl.h: Re-generate.
 190
 191 2020-01-15  Alan Modra  <amodra@gmail.com>
 192
 193         * tic4x-dis.c (tic4x_version): Make unsigned long.
 194         (optab, optab_special, registernames): New file scope vars.
 195         (tic4x_print_register): Set up registernames rather than
 196         malloc'd registertable.
 197         (tic4x_disassemble): Delete optable and optable_special.  Use
 198         optab and optab_special instead.  Throw away old optab,
 199         optab_special and registernames when info->mach changes.
 200
 201 2020-01-14  Sergey Belyashov  <sergey.belyashov@gmail.com>
 202
 203         PR 25377
 204         * z80-dis.c (suffix): Use .db instruction to generate double
 205         prefix.
 206
 207 2020-01-14  Alan Modra  <amodra@gmail.com>
 208
 209         * z8k-dis.c (unpack_instr): Formatting.  Cast unsigned short
 210         values to unsigned before shifting.
 211
 212 2020-01-13  Thomas Troeger  <tstroege@gmx.de>
 213
 214         * arm-dis.c (print_insn_arm): Fill in insn info fields for control
 215         flow instructions.
 216         (print_insn_thumb16, print_insn_thumb32): Likewise.
 217         (print_insn): Initialize the insn info.
 218         * i386-dis.c (print_insn): Initialize the insn info fields, and
 219         detect jumps.
 220
 221 2012-01-13  Claudiu Zissulescu <claziss@gmail.com>
 222
 223         * arc-opc.c (C_NE): Make it required.
 224
 225 2012-01-13  Claudiu Zissulescu <claziss@gmail.com>
 226
 227         * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
 228         reserved register name.
 229
 230 2020-01-13  Alan Modra  <amodra@gmail.com>
 231
 232         * ns32k-dis.c (Is_gen): Use strchr, add 'f'.
 233         (print_insn_ns32k): Adjust ioffset for 'f' index_offset.
 234
 235 2020-01-13  Alan Modra  <amodra@gmail.com>
 236
 237         * wasm32-dis.c (print_insn_wasm32): Localise variables.  Store
 238         result of wasm_read_leb128 in a uint64_t and check that bits
 239         are not lost when copying to other locals.  Use uint32_t for
 240         most locals.  Use PRId64 when printing int64_t.
 241
 242 2020-01-13  Alan Modra  <amodra@gmail.com>
 243
 244         * score-dis.c: Formatting.
 245         * score7-dis.c: Formatting.
 246
 247 2020-01-13  Alan Modra  <amodra@gmail.com>
 248
 249         * score-dis.c (print_insn_score48): Use unsigned variables for
 250         unsigned values.  Don't left shift negative values.
 251         (print_insn_score32): Likewise.
 252         * score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
 253
 254 2020-01-13  Alan Modra  <amodra@gmail.com>
 255
 256         * tic4x-dis.c (tic4x_print_register): Remove dead code.
 257
 258 2020-01-13  Alan Modra  <amodra@gmail.com>
 259
 260         * fr30-ibld.c: Regenerate.
 261
 262 2020-01-13  Alan Modra  <amodra@gmail.com>
 263
 264         * xgate-dis.c (print_insn): Don't left shift signed value.
 265         (ripBits): Formatting, use 1u.
 266
 267 2020-01-10  Alan Modra  <amodra@gmail.com>
 268
 269         * tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
 270         * tilegx-opc.c (parse_insn_tilegx): Likewise.  Delete raw_opval.
 271
 272 2020-01-10  Alan Modra  <amodra@gmail.com>
 273
 274         * m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
 275         and XRREG value earlier to avoid a shift with negative exponent.
 276         * m10200-dis.c (disassemble): Similarly.
 277
 278 2020-01-09  Nick Clifton  <nickc@redhat.com>
 279
 280         PR 25224
 281         * z80-dis.c (ld_ii_ii): Use correct cast.
 282
 283 2020-01-03  Sergey Belyashov  <sergey.belyashov@gmail.com>
 284
 285         PR 25224
 286         * z80-dis.c (ld_ii_ii): Use character constant when checking
 287         opcode byte value.
 288
 289 2020-01-09  Jan Beulich  <jbeulich@suse.com>
 290
 291         * i386-dis.c (SEP_Fixup): New.
 292         (SEP): Define.
 293         (dis386_twobyte): Use it for sysenter/sysexit.
 294         (enum x86_64_isa): Change amd64 enumerator to value 1.
 295         (OP_J): Compare isa64 against intel64 instead of amd64.
 296         * i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
 297         forms.
 298         * i386-tbl.h: Re-generate.
 299
 300 2020-01-08  Alan Modra  <amodra@gmail.com>
 301
 302         * z8k-dis.c: Include libiberty.h
 303         (instr_data_s): Make max_fetched unsigned.
 304         (z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
 305         Don't exceed byte_info bounds.
 306         (output_instr): Make num_bytes unsigned.
 307         (unpack_instr): Likewise for nibl_count and loop.
 308         * z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
 309         idx unsigned.
 310         * z8k-opc.h: Regenerate.
 311
 312 2020-01-07  Shahab Vahedi  <shahab@synopsys.com>
 313
 314         * arc-tbl.h (llock): Use 'LLOCK' as class.
 315         (llockd): Likewise.
 316         (scond): Use 'SCOND' as class.
 317         (scondd): Likewise.
 318         (llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
 319         (scondd): Likewise.
 320
 321 2020-01-06  Alan Modra  <amodra@gmail.com>
 322
 323         * m32c-ibld.c: Regenerate.
 324
 325 2020-01-06  Alan Modra  <amodra@gmail.com>
 326
 327         PR 25344
 328         * z80-dis.c (suffix): Don't use a local struct buffer copy.
 329         Peek at next byte to prevent recursion on repeated prefix bytes.
 330         Ensure uninitialised "mybuf" is not accessed.
 331         (print_insn_z80): Don't zero n_fetch and n_used here,..
 332         (print_insn_z80_buf): ..do it here instead.
 333
 334 2020-01-04  Alan Modra  <amodra@gmail.com>
 335
 336         * m32r-ibld.c: Regenerate.
 337
 338 2020-01-04  Alan Modra  <amodra@gmail.com>
 339
 340         * cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
 341
 342 2020-01-04  Alan Modra  <amodra@gmail.com>
 343
 344         * crx-dis.c (match_opcode): Avoid shift left of signed value.
 345
 346 2020-01-04  Alan Modra  <amodra@gmail.com>
 347
 348         * d30v-dis.c (print_insn): Avoid signed overflow in left shift.
 349
 350 2020-01-03  Jan Beulich  <jbeulich@suse.com>
 351
 352         * aarch64-tbl.h (aarch64_opcode_table): Use
 353         SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
 354
 355 2020-01-03  Jan Beulich  <jbeulich@suse.com>
 356
 357         * aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
 358         forms of SUDOT and USDOT.
 359
 360 2020-01-03  Jan Beulich  <jbeulich@suse.com>
 361
 362         * aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
 363         uzip{1,2}.
 364         * opcodes/aarch64-dis-2.c: Re-generate.
 365
 366 2020-01-03  Jan Beulich  <jbeulich@suse.com>
 367
 368         * aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
 369         FMMLA encoding.
 370         * opcodes/aarch64-dis-2.c: Re-generate.
 371
 372 2020-01-02  Sergey Belyashov  <sergey.belyashov@gmail.com>
 373
 374         * z80-dis.c: Add support for eZ80 and Z80 instructions.
 375
 376 2020-01-01  Alan Modra  <amodra@gmail.com>
 377
 378         Update year range in copyright notice of all files.
 379
 380 For older changes see ChangeLog-2019
 381 \f
 382 Copyright (C) 2020 Free Software Foundation, Inc.
 383
 384 Copying and distribution of this file, with or without modification,
 385 are permitted in any medium without royalty provided the copyright
 386 notice and this notice are preserved.
 387
 388 Local Variables:
 389 mode: change-log
 390 left-margin: 8
 391 fill-column: 74
 392 version-control: never
 393 End: