opcodes/ChangeLog

   1 2006-05-24  Nick Clifton  <nickc@redhat.com>
   2
   3         * po/ga.po: Updated Irish translation.
   4
   5 2006-05-22  Nick Clifton  <nickc@redhat.com>
   6
   7         * crx-dis.c (EXTRACT): Make macro work on 64-bit hosts.
   8
   9 2006-05-22  Nick Clifton  <nickc@redhat.com>
  10
  11         * po/nl.po: Updated translation.
  12
  13 2006-05-18  Alan Modra  <amodra@bigpond.net.au>
  14
  15         * avr-dis.c: Formatting fix.
  16
  17 2006-05-14  Thiemo Seufer  <ths@mips.com>
  18
  19         * mips16-opc.c (I1, I32, I64): New shortcut defines.
  20         (mips16_opcodes): Change membership of instructions to their
  21         lowest baseline ISA.
  22
  23 2006-05-09  H.J. Lu  <hongjiu.lu@intel.com>
  24
  25         * i386-dis.c (grps): Update sgdt/sidt for 64bit.
  26
  27 2006-05-05  Julian Brown  <julian@codesourcery.com>
  28
  29         * arm-dis.c (coprocessor_opcodes): Don't interpret fldmx/fstmx as
  30         vldm/vstm.
  31
  32 2006-05-05  Thiemo Seufer  <ths@mips.com>
  33             David Ung  <davidu@mips.com>
  34
  35         * mips-opc.c: Add macro for cache instruction.
  36
  37 2006-05-04  Thiemo Seufer  <ths@mips.com>
  38             Nigel Stephens  <nigel@mips.com>
  39             David Ung  <davidu@mips.com>
  40
  41         * mips-dis.c (mips_arch_choices): Add smartmips instruction
  42         decoding to MIPS32 and MIPS32R2.  Limit DSP decoding to release
  43         2 ISAs.  Add MIPS3D decoding to MIPS32R2.  Add MT decoding to
  44         MIPS64R2.
  45         * mips-opc.c: fix random typos in comments.
  46         (INSN_SMARTMIPS): New defines.
  47         (mips_builtin_opcodes): Add paired single support for MIPS32R2.
  48         Move bc3f, bc3fl, bc3t, bc3tl downwards.  Move flushi, flushd,
  49         flushid, wb upwards.  Move cfc3, ctc3 downwards.  Rework the
  50         FP_S and FP_D flags to denote single and double register
  51         accesses separately.  Move dmfc3, dmtc3, mfc3, mtc3 downwards.
  52         Allow jr.hb and jalr.hb for release 1 ISAs.  Allow luxc1, suxc1
  53         for MIPS32R2.  Add SmartMIPS instructions.  Add two-argument
  54         variants of bc2f, bc2fl, bc2t, bc2tl.  Add mfhc2, mthc2 to
  55         release 2 ISAs.
  56         * mips16-opc.c (mips16_opcodes): Add sdbbp instruction.
  57
  58 2006-05-03  Thiemo Seufer  <ths@mips.com>
  59
  60         * mips-opc.c (mips_builtin_opcodes): Fix mftr argument order.
  61
  62 2006-05-02  Thiemo Seufer  <ths@mips.com>
  63             Nigel Stephens  <nigel@mips.com>
  64             David Ung  <davidu@mips.com>
  65
  66         * mips-dis.c (print_insn_args): Force mips16 to odd addresses.
  67         (print_mips16_insn_arg): Force mips16 to odd addresses.
  68
  69 2006-04-30  Thiemo Seufer  <ths@mips.com>
  70             David Ung  <davidu@mips.com>
  71
  72         * mips-opc.c (mips_builtin_opcodes): Add udi instructions
  73         "udi0" to "udi15".
  74         * mips-dis.c (print_insn_args): Adds udi argument handling.
  75
  76 2006-04-28  James E Wilson  <wilson@specifix.com>
  77
  78         * m68k-dis.c (match_insn_m68k): Restore fprintf_func before printing
  79         error message.
  80
  81 2006-04-28  Thiemo Seufer  <ths@mips.com>
  82             David Ung  <davidu@mips.com>
  83             Nigel Stephens  <nigel@mips.com>
  84
  85         * mips-dis.c (mips_cp0sel_names_mips3264r2): Add MT register
  86         names.
  87
  88 2006-04-28  Thiemo Seufer  <ths@mips.com>
  89             Nigel Stephens  <nigel@mips.com>
  90             David Ung  <davidu@mips.com>
  91
  92         * mips-dis.c (print_insn_args): Add mips_opcode argument.
  93         (print_insn_mips):  Adjust print_insn_args call.
  94
  95 2006-04-28  Thiemo Seufer  <ths@mips.com>
  96             Nigel Stephens  <nigel@mips.com>
  97
  98         * mips-dis.c (print_insn_args): Print $fcc only for FP
  99         instructions, use $cc elsewise.
 100
 101 2006-04-28  Thiemo Seufer  <ths@mips.com>
 102             Nigel Stephens  <nigel@mips.com>
 103
 104         * opcodes/mips-dis.c (mips16_to_32_reg_map, mips16_reg_names):
 105         Map MIPS16 registers to O32 names.
 106         (print_mips16_insn_arg): Use mips16_reg_names.
 107
 108 2006-04-26  Julian Brown  <julian@codesourcery.com>
 109
 110         * arm-dis.c (print_insn_neon): Disassemble floating-point constant
 111         VMOV.
 112
 113 2006-04-26  Nathan Sidwell  <nathan@codesourcery.com>
 114             Julian Brown  <julian@codesourcery.com>
 115
 116         * opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert
 117         %<code>[zy] into %[zy]<code>.  Expand meaning of %<bitfield>['`?].
 118         Add unified load/store instruction names.
 119         (neon_opcode_table): New.
 120         (arm_opcodes): Expand meaning of %<bitfield>['`?].
 121         (arm_decode_bitfield): New.
 122         (print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
 123         Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
 124         (print_insn_neon): New.
 125         (print_insn_arm): Adjust print_insn_coprocessor call. Call
 126         print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
 127         (print_insn_thumb32): Likewise.
 128
 129 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 130
 131         * Makefile.am: Run "make dep-am".
 132         * Makefile.in: Regenerate.
 133
 134 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 135
 136         * avr-dis.c (avr_operand): Warning fix.
 137
 138         * configure: Regenerate.
 139
 140 2006-04-16  Daniel Jacobowitz  <dan@codesourcery.com>
 141
 142         * po/POTFILES.in: Regenerated.
 143
 144 2006-04-12   Hochstein  <hochstein@algo.informatik.tu-darmstadt.de>
 145
 146         PR binutils/2454
 147         * avr-dis.c (avr_operand): Arrange for a comment to appear before
 148         the symolic form of an address, so that the output of objdump -d
 149         can be reassembled.
 150
 151 2006-04-10  DJ Delorie  <dj@redhat.com>
 152
 153         * m32c-asm.c: Regenerate.
 154
 155 2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>
 156
 157         * Makefile.am: Add install-html target.
 158         * Makefile.in: Regenerate.
 159
 160 2006-04-06  Nick Clifton  <nickc@redhat.com>
 161
 162         * po/vi/po: Updated Vietnamese translation.
 163
 164 2006-03-31  Paul Koning  <ni1d@arrl.net>
 165
 166         * pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.
 167
 168 2006-03-16  Bernd Schmidt  <bernd.schmidt@analog.com>
 169
 170         * bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
 171         logic to identify halfword shifts.
 172
 173 2006-03-16  Paul Brook  <paul@codesourcery.com>
 174
 175         * arm-dis.c (arm_opcodes): Rename swi to svc.
 176         (thumb_opcodes): Ditto.
 177
 178 2006-03-13  DJ Delorie  <dj@redhat.com>
 179
 180         * m32c-asm.c: Regenerate.
 181         * m32c-desc.c: Likewise.
 182         * m32c-desc.h: Likewise.
 183         * m32c-dis.c: Likewise.
 184         * m32c-ibld.c: Likewise.
 185         * m32c-opc.c: Likewise.
 186         * m32c-opc.h: Likewise.
 187
 188 2006-03-10  DJ Delorie  <dj@redhat.com>
 189
 190         * m32c-desc.c: Regenerate with mul.l, mulu.l.
 191         * m32c-opc.c: Likewise.
 192         * m32c-opc.h: Likewise.
 193
 194
 195 2006-03-09  Nick Clifton  <nickc@redhat.com>
 196
 197         * po/sv.po: Updated Swedish translation.
 198
 199 2006-03-07  H.J. Lu  <hongjiu.lu@intel.com>
 200
 201         PR binutils/2428
 202         * i386-dis.c (REP_Fixup): New function.
 203         (AL): Remove duplicate.
 204         (Xbr): New.
 205         (Xvr): Likewise.
 206         (Ybr): Likewise.
 207         (Yvr): Likewise.
 208         (indirDXr): Likewise.
 209         (ALr): Likewise.
 210         (eAXr): Likewise.
 211         (dis386): Updated entries of ins, outs, movs, lods and stos.
 212
 213 2006-03-05  Nick Clifton  <nickc@redhat.com>
 214
 215         * cgen-ibld.in (insert_normal): Cope with attempts to insert a
 216         signed 32-bit value into an unsigned 32-bit field when the host is
 217         a 64-bit machine.
 218         * fr30-ibld.c: Regenerate.
 219         * frv-ibld.c: Regenerate.
 220         * ip2k-ibld.c: Regenerate.
 221         * iq2000-asm.c: Regenerate.
 222         * iq2000-ibld.c: Regenerate.
 223         * m32c-ibld.c: Regenerate.
 224         * m32r-ibld.c: Regenerate.
 225         * openrisc-ibld.c: Regenerate.
 226         * xc16x-ibld.c: Regenerate.
 227         * xstormy16-ibld.c: Regenerate.
 228
 229 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
 230
 231         * xc16x-asm.c: Regenerate.
 232         * xc16x-dis.c: Regenerate.
 233
 234 2006-02-27  Carlos O'Donell  <carlos@codesourcery.com>
 235
 236         * po/Make-in: Add html target.
 237
 238 2006-02-27  H.J. Lu <hongjiu.lu@intel.com>
 239
 240         * i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
 241         Intel Merom New Instructions.
 242         (THREE_BYTE_0): Likewise.
 243         (THREE_BYTE_1): Likewise.
 244         (three_byte_table): Likewise.
 245         (dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
 246         THREE_BYTE_1 for entry 0x3a.
 247         (twobyte_has_modrm): Updated.
 248         (twobyte_uses_SSE_prefix): Likewise.
 249         (print_insn): Handle 3-byte opcodes used by Intel Merom New
 250         Instructions.
 251
 252 2006-02-24  David S. Miller  <davem@sunset.davemloft.net>
 253
 254         * sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
 255         (v9_hpriv_reg_names): New table.
 256         (print_insn_sparc): Allow values up to 16 for '?' and '!'.
 257         New cases '$' and '%' for read/write hyperprivileged register.
 258         * sparc-opc.c (sparc_opcodes): Add new entries for UA2005
 259         window handling and rdhpr/wrhpr instructions.
 260
 261 2006-02-24  DJ Delorie  <dj@redhat.com>
 262
 263         * m32c-desc.c: Regenerate with linker relaxation attributes.
 264         * m32c-desc.h: Likewise.
 265         * m32c-dis.c: Likewise.
 266         * m32c-opc.c: Likewise.
 267
 268 2006-02-24  Paul Brook  <paul@codesourcery.com>
 269
 270         * arm-dis.c (arm_opcodes): Add V7 instructions.
 271         (thumb32_opcodes): Ditto.  Handle V7M MSR/MRS variants.
 272         (print_arm_address): New function.
 273         (print_insn_arm): Use it.  Add 'P' and 'U' cases.
 274         (psr_name): New function.
 275         (print_insn_thumb32): Add 'U', 'C' and 'D' cases.
 276
 277 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 278
 279         * ia64-opc-i.c (bXc): New.
 280         (mXc): Likewise.
 281         (OpX2TaTbYaXcC): Likewise.
 282         (TF). Likewise.
 283         (TFCM). Likewise.
 284         (ia64_opcodes_i): Add instructions for tf.
 285
 286         * ia64-opc.h (IMMU5b): New.
 287
 288         * ia64-asmtab.c: Regenerated.
 289
 290 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 291
 292         * ia64-gen.c: Update copyright years.
 293         * ia64-opc-b.c: Likewise.
 294
 295 2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>
 296
 297         * ia64-gen.c (lookup_regindex): Handle ".vm".
 298         (print_dependency_table): Handle '\"'.
 299
 300         * ia64-ic.tbl: Updated from SDM 2.2.
 301         * ia64-raw.tbl: Likewise.
 302         * ia64-waw.tbl: Likewise.
 303         * ia64-asmtab.c: Regenerated.
 304
 305         * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
 306
 307 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 308             Anil Paranjape   <anilp1@kpitcummins.com>
 309             Shilin Shakti    <shilins@kpitcummins.com>
 310
 311         * xc16x-desc.h: New file
 312         * xc16x-desc.c: New file
 313         * xc16x-opc.h: New file
 314         * xc16x-opc.c: New file
 315         * xc16x-ibld.c: New file
 316         * xc16x-asm.c: New file
 317         * xc16x-dis.c: New file
 318         * Makefile.am: Entries for xc16x
 319         * Makefile.in: Regenerate
 320         * cofigure.in: Add xc16x target information.
 321         * configure: Regenerate.
 322         * disassemble.c: Add xc16x target information.
 323
 324 2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 325
 326         * i386-dis.c (dis386_twobyte): Use "movZ" for debug register
 327         moves.
 328
 329 2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 330
 331         * i386-dis.c ('Z'): Add a new macro.
 332         (dis386_twobyte): Use "movZ" for control register moves.
 333
 334 2006-02-10  Nick Clifton  <nickc@redhat.com>
 335
 336         * iq2000-asm.c: Regenerate.
 337
 338 2006-02-07  Nathan Sidwell  <nathan@codesourcery.com>
 339
 340         * m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
 341
 342 2006-01-26  David Ung  <davidu@mips.com>
 343
 344         * mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
 345         ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
 346         floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
 347         nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
 348         rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
 349
 350 2006-01-18  Arnold Metselaar  <arnoldm@sourceware.org>
 351
 352         * z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
 353         ld_d_r, pref_xd_cb): Use signed char to hold data to be
 354         disassembled.
 355         * z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
 356         buffer overflows when disassembling instructions like
 357         ld (ix+123),0x23
 358         * z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
 359         operand, if the offset is negative.
 360
 361 2006-01-17  Arnold Metselaar  <arnoldm@sourceware.org>
 362
 363         * z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
 364         unsigned char to hold data to be disassembled.
 365
 366 2006-01-17  Andreas Schwab  <schwab@suse.de>
 367
 368         PR binutils/1486
 369         * disassemble.c (disassemble_init_for_target): Set
 370         disassembler_needs_relocs for bfd_arch_arm.
 371
 372 2006-01-16  Paul Brook  <paul@codesourcery.com>
 373
 374         * m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
 375         f?add?, and f?sub? instructions.
 376
 377 2006-01-16  Nick Clifton  <nickc@redhat.com>
 378
 379         * po/zh_CN.po: New Chinese (simplified) translation.
 380         * configure.in (ALL_LINGUAS): Add "zh_CH".
 381         * configure: Regenerate.
 382
 383 2006-01-05  Paul Brook  <paul@codesourcery.com>
 384
 385         * m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
 386
 387 2006-01-06  DJ Delorie  <dj@redhat.com>
 388
 389         * m32c-desc.c: Regenerate.
 390         * m32c-opc.c: Regenerate.
 391         * m32c-opc.h: Regenerate.
 392
 393 2006-01-03  DJ Delorie  <dj@redhat.com>
 394
 395         * cgen-ibld.in (extract_normal): Avoid memory range errors.
 396         * m32c-ibld.c: Regenerated.
 397
 398 For older changes see ChangeLog-2005
 399 \f
 400 Local Variables:
 401 mode: change-log
 402 left-margin: 8
 403 fill-column: 74
 404 version-control: never
 405 End: