opcodes/ChangeLog

   1 2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>
   2
   3         * arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
   4         instructions.
   5         * arc-opc.c (insert_nps_cmem_uimm16): New function.
   6         (extract_nps_cmem_uimm16): New function.
   7         (arc_operands): Add NPS_XLDST_UIMM16 operand.
   8
   9 2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>
  10
  11         * arc-dis.c (arc_insn_length): New function.
  12         (print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
  13         (find_format): Change insnLen parameter to unsigned.
  14
  15 2016-04-13  Nick Clifton  <nickc@redhat.com>
  16
  17         PR target/19937
  18         * v850-opc.c (v850_opcodes): Correct masks for long versions of
  19         the LD.B and LD.BU instructions.
  20
  21 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
  22
  23         * arc-dis.c (find_format): Check for extension flags.
  24         (print_flags): New function.
  25         (print_insn_arc): Update for .extCondCode, .extCoreRegister and
  26         .extAuxRegister.
  27         * arc-ext.c (arcExtMap_coreRegName): Use
  28         LAST_EXTENSION_CORE_REGISTER.
  29         (arcExtMap_coreReadWrite): Likewise.
  30         (dump_ARC_extmap): Update printing.
  31         * arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
  32         (arc_aux_regs): Add cpu field.
  33         * arc-regs.h: Add cpu field, lower case name aux registers.
  34
  35 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
  36
  37         * arc-tbl.h: Add rtsc, sleep with no arguments.
  38
  39 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
  40
  41         * arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
  42         Initialize.
  43         (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
  44         (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
  45         (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
  46         (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
  47         (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
  48         (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
  49         (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
  50         (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
  51         (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
  52         (arc_opcode arc_opcodes): Null terminate the array.
  53         (arc_num_opcodes): Remove.
  54         * arc-ext.h (INSERT_XOP): Define.
  55         (extInstruction_t): Likewise.
  56         (arcExtMap_instName): Delete.
  57         (arcExtMap_insn): New function.
  58         (arcExtMap_genOpcode): Likewise.
  59         * arc-ext.c (ExtInstruction): Remove.
  60         (create_map): Zero initialize instruction fields.
  61         (arcExtMap_instName): Remove.
  62         (arcExtMap_insn): New function.
  63         (dump_ARC_extmap): More info while debuging.
  64         (arcExtMap_genOpcode): New function.
  65         * arc-dis.c (find_format): New function.
  66         (print_insn_arc): Use find_format.
  67         (arc_get_disassembler): Enable dump_ARC_extmap only when
  68         debugging.
  69
  70 2016-04-11  Maciej W. Rozycki  <macro@imgtec.com>
  71
  72         * mips-dis.c (print_mips16_insn_arg): Mask unused extended
  73         instruction bits out.
  74
  75 2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>
  76
  77         * arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
  78         * arc-opc.c (arc_flag_operands): Add new flags.
  79         (arc_flag_classes): Add new classes.
  80
  81 2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>
  82
  83         * arc-opc.c (arc_opcodes): Extend comment to discus table layout.
  84
  85 2016-04-05  Andrew Burgess  <andrew.burgess@embecosm.com>
  86
  87         * arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
  88         encode1, rflt, crc16, and crc32 instructions.
  89         * arc-opc.c (arc_flag_operands): Add F_NPS_R.
  90         (arc_flag_classes): Add C_NPS_R.
  91         (insert_nps_bitop_size_2b): New function.
  92         (extract_nps_bitop_size_2b): Likewise.
  93         (insert_nps_bitop_uimm8): Likewise.
  94         (extract_nps_bitop_uimm8): Likewise.
  95         (arc_operands): Add new operand entries.
  96
  97 2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>
  98
  99         * arc-regs.h: Add a new subclass field.  Add double assist
 100         accumulator register values.
 101         * arc-tbl.h: Use DPA subclass to mark the double assist
 102         instructions.  Use DPX/SPX subclas to mark the FPX instructions.
 103         * arc-opc.c (RSP): Define instead of SP.
 104         (arc_aux_regs): Add the subclass field.
 105
 106 2016-04-05  Jiong Wang  <jiong.wang@arm.com>
 107
 108         * arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
 109
 110 2016-03-31  Andrew Burgess  <andrew.burgess@embecosm.com>
 111
 112         * arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
 113         NPS_R_SRC1.
 114
 115 2016-03-30  Andrew Burgess  <andrew.burgess@embecosm.com>
 116
 117         * arc-nps400-tbl.h: Add a header comment, and fix some whitespace
 118         issues.  No functional changes.
 119
 120 2016-03-30  Claudiu Zissulescu  <claziss@synopsys.com>
 121
 122         * arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
 123         (AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
 124         (RTT): Remove duplicate.
 125         (LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
 126         (PCT_CONFIG*): Remove.
 127         (D1L, D1H, D2H, D2L): Define.
 128
 129 2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>
 130
 131         * arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
 132
 133 2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>
 134
 135         * arc-tbl.h (invld07): Remove.
 136         * arc-ext-tbl.h: New file.
 137         * arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
 138         * arc-opc.c (arc_opcodes): Add ext-tbl include.
 139
 140 2016-03-24  Jan Kratochvil  <jan.kratochvil@redhat.com>
 141
 142         Fix -Wstack-usage warnings.
 143         * aarch64-dis.c (print_operands): Substitute size.
 144         * aarch64-opc.c (print_register_offset_address): Substitute tblen.
 145
 146 2016-03-22  Jose E. Marchesi  <jose.marchesi@oracle.com>
 147
 148         * sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
 149         to get a proper diagnostic when an invalid ASR register is used.
 150
 151 2016-03-22  Nick Clifton  <nickc@redhat.com>
 152
 153         * configure: Regenerate.
 154
 155 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 156
 157         * arc-nps400-tbl.h: New file.
 158         * arc-opc.c: Add top level comment.
 159         (insert_nps_3bit_dst): New function.
 160         (extract_nps_3bit_dst): New function.
 161         (insert_nps_3bit_src2): New function.
 162         (extract_nps_3bit_src2): New function.
 163         (insert_nps_bitop_size): New function.
 164         (extract_nps_bitop_size): New function.
 165         (arc_flag_operands): Add nps400 entries.
 166         (arc_flag_classes): Add nps400 entries.
 167         (arc_operands): Add nps400 entries.
 168         (arc_opcodes): Add nps400 include.
 169
 170 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 171
 172         * arc-opc.c (arc_flag_classes): Convert all flag classes to use
 173         the new class enum values.
 174
 175 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 176
 177         * arc-dis.c (print_insn_arc): Handle nps400.
 178
 179 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 180
 181         * arc-opc.c (BASE): Delete.
 182
 183 2016-03-18  Nick Clifton  <nickc@redhat.com>
 184
 185         PR target/19721
 186         * aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
 187         of MOV insn that aliases an ORR insn.
 188
 189 2016-03-16  Jiong Wang  <jiong.wang@arm.com>
 190
 191         * arm-dis.c (neon_opcodes): Support new FP16 instructions.
 192
 193 2016-03-07  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 194
 195         * mcore-opc.h: Add const qualifiers.
 196         * microblaze-opc.h (struct op_code_struct): Likewise.
 197         * sh-opc.h: Likewise.
 198         * tic4x-dis.c (tic4x_print_indirect): Likewise.
 199         (tic4x_print_op): Likewise.
 200
 201 2016-03-02  Alan Modra  <amodra@gmail.com>
 202
 203         * or1k-desc.h: Regenerate.
 204         * fr30-ibld.c: Regenerate.
 205         * rl78-decode.c: Regenerate.
 206
 207 2016-03-01  Nick Clifton  <nickc@redhat.com>
 208
 209         PR target/19747
 210         * rl78-dis.c (print_insn_rl78_common): Fix typo.
 211
 212 2016-02-24  Renlin Li  <renlin.li@arm.com>
 213
 214         * arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
 215         (print_insn_coprocessor): Support fp16 instructions.
 216
 217 2016-02-24  Renlin Li  <renlin.li@arm.com>
 218
 219         * arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
 220         vminnm, vrint(mpna).
 221
 222 2016-02-24  Renlin Li  <renlin.li@arm.com>
 223
 224         * arm-dis.c (print_insn_coprocessor): Check co-processor number for
 225         cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
 226
 227 2016-02-15  H.J. Lu  <hongjiu.lu@intel.com>
 228
 229         * i386-dis.c (print_insn): Parenthesize expression to prevent
 230         truncated addresses.
 231         (OP_J): Likewise.
 232
 233 2016-02-10  Claudiu Zissulescu  <claziss@synopsys.com>
 234             Janek van Oirschot  <jvanoirs@synopsys.com>
 235
 236         * arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
 237         variable.
 238
 239 2016-02-04  Nick Clifton  <nickc@redhat.com>
 240
 241         PR target/19561
 242         * msp430-dis.c (print_insn_msp430): Add a special case for
 243         decoding an RRC instruction with the ZC bit set in the extension
 244         word.
 245
 246 2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 247
 248         * cgen-ibld.in (insert_normal): Rework calculation of shift.
 249         * epiphany-ibld.c: Regenerate.
 250         * fr30-ibld.c: Regenerate.
 251         * frv-ibld.c: Regenerate.
 252         * ip2k-ibld.c: Regenerate.
 253         * iq2000-ibld.c: Regenerate.
 254         * lm32-ibld.c: Regenerate.
 255         * m32c-ibld.c: Regenerate.
 256         * m32r-ibld.c: Regenerate.
 257         * mep-ibld.c: Regenerate.
 258         * mt-ibld.c: Regenerate.
 259         * or1k-ibld.c: Regenerate.
 260         * xc16x-ibld.c: Regenerate.
 261         * xstormy16-ibld.c: Regenerate.
 262
 263 2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 264
 265         * epiphany-dis.c: Regenerated from latest cpu files.
 266
 267 2016-02-01  Michael McConville  <mmcco@mykolab.com>
 268
 269         * cgen-dis.c (count_decodable_bits): Use unsigned value for mask
 270         test bit.
 271
 272 2016-01-25  Renlin Li  <renlin.li@arm.com>
 273
 274         * arm-dis.c (mapping_symbol_for_insn): New function.
 275         (find_ifthen_state): Call mapping_symbol_for_insn().
 276
 277 2016-01-20  Matthew Wahab  <matthew.wahab@arm.com>
 278
 279         * aarch64-opc.c (operand_general_constraint_met_p): Check validity
 280         of MSR UAO immediate operand.
 281
 282 2016-01-18  Maciej W. Rozycki  <macro@imgtec.com>
 283
 284         * mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
 285         instruction support.
 286
 287 2016-01-17  Alan Modra  <amodra@gmail.com>
 288
 289         * configure: Regenerate.
 290
 291 2016-01-14  Nick Clifton  <nickc@redhat.com>
 292
 293         * rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
 294         instructions that can support stack pointer operations.
 295         * rl78-decode.c: Regenerate.
 296         * rl78-dis.c: Fix display of stack pointer in MOVW based
 297         instructions.
 298
 299 2016-01-14  Matthew Wahab  <matthew.wahab@arm.com>
 300
 301         * aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
 302         testing for RAS support.  Add checks for erxfr_el1, erxctlr_el1,
 303         erxtatus_el1 and erxaddr_el1.
 304
 305 2016-01-12  Matthew Wahab  <matthew.wahab@arm.com>
 306
 307         * arm-dis.c (arm_opcodes): Add "esb".
 308         (thumb_opcodes): Likewise.
 309
 310 2016-01-11  Peter Bergner <bergner@vnet.ibm.com>
 311
 312         * ppc-opc.c <xscmpnedp>: Delete.
 313         <xvcmpnedp>: Likewise.
 314         <xvcmpnedp.>: Likewise.
 315         <xvcmpnesp>: Likewise.
 316         <xvcmpnesp.>: Likewise.
 317
 318 2016-01-08  Andreas Schwab  <schwab@linux-m68k.org>
 319
 320         PR gas/13050
 321         * m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
 322         addition to ISA_A.
 323
 324 2016-01-01  Alan Modra  <amodra@gmail.com>
 325
 326         Update year range in copyright notice of all files.
 327
 328 For older changes see ChangeLog-2015
 329 \f
 330 Copyright (C) 2016 Free Software Foundation, Inc.
 331
 332 Copying and distribution of this file, with or without modification,
 333 are permitted in any medium without royalty provided the copyright
 334 notice and this notice are preserved.
 335
 336 Local Variables:
 337 mode: change-log
 338 left-margin: 8
 339 fill-column: 74
 340 version-control: never
 341 End: