opcodes/ChangeLog

   1 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
   2
   3         * arm-dis.c (neon_opcodes): Handle VMULL.P64.
   4
   5 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
   6
   7         * arm-dis.c (neon_opcodes): Add support for AES instructions.
   8
   9 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  10
  11         * arm-dis.c (coprocessor_opcodes): Add support for HP/DP
  12         conversions.
  13
  14 2012-08-24  Matthew  Gretton-Dann  <matthew.gretton-dann@arm.com>
  15
  16         * arm-dis.c (coprocessor_opcodes): Add VRINT.
  17         (neon_opcodes): Likewise.
  18
  19 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  20
  21         * arm-dis.c (coprocessor_opcodes): Add support for new VCVT
  22         variants.
  23         (neon_opcodes): Likewise.
  24
  25 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  26
  27         * arm-dis.c (coprocessor_opcodes): Add VMAXNM/VMINNM.
  28         (neon_opcodes): Likewise.
  29
  30 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  31
  32         * arm-dis.c (coprocessor_opcodes): Add VSEL.
  33         (print_insn_coprocessor): Add new %<>c bitfield format
  34         specifier.
  35
  36 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  37
  38         * arm-dis.c (arm_opcodes): Add LDRA/STRL instructions.
  39         (thumb32_opcodes): Likewise.
  40         (print_arm_insn): Add support for %<>T formatter.
  41
  42 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  43
  44         * arm-dis.c (arm_opcodes): Add HLT.
  45         (thumb_opcodes): Likewise.
  46
  47 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  48
  49         * arm-dis.c (thumb32_opcodes): Add DCPS instruction.
  50
  51 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  52
  53         * arm-dis.c (arm_opcodes): Add SEVL.
  54         (thumb_opcodes): Likewise.
  55         (thumb32_opcodes): Likewise.
  56
  57 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  58
  59         * arm-dis.c (data_barrier_option): New function.
  60         (print_insn_arm): Use data_barrier_option.
  61         (print_insn_thumb32): Use data_barrier_option.
  62
  63 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com
  64
  65         * arm-dis.c (COND_UNCOND): New constant.
  66         (print_insn_coprocessor): Add support for %u format specifier.
  67         (print_insn_neon): Likewise.
  68
  69 2012-08-21  David S. Miller  <davem@davemloft.net>
  70
  71         * sparc-opc.c (4-argument crypto instructions): Fix encoding using
  72         F3F4 macro.
  73
  74 2012-08-20  Edmar Wienskoski  <edmar@freescale.com>
  75
  76         * ppc-opc.c (powerpc_opcodes): Changed opcode for vabsdub,
  77         vabsduh, vabsduw, mviwsplt.
  78
  79 2012-08-17  Nagajyothi Eggone  <nagajyothi.eggone@amd.com>
  80
  81         * i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and
  82         CPU_BTVER2_FLAGS.
  83
  84         * i386-opc.h: Update CpuPRFCHW comment.
  85
  86         * i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW.
  87         * i386-init.h: Regenerated.
  88         * i386-tbl.h: Likewise.
  89
  90 2012-08-17  Nick Clifton  <nickc@redhat.com>
  91
  92         * po/uk.po: New Ukranian translation.
  93         * configure.in (ALL_LINGUAS): Add uk.
  94         * configure: Regenerate.
  95
  96 2012-08-16  Peter Bergner  <bergner@vnet.ibm.com>
  97
  98         * ppc-opc.c (powerpc_opcodes) <"lswx">: Use RAX for the second and
  99         RBX for the third operand.
 100         <"lswi">: Use RAX for second and NBI for the third operand.
 101
 102 2012-08-15  DJ Delorie  <dj@redhat.com>
 103
 104         * rl78-decode.opc (rl78_decode_opcode): Merge %e and %[01]
 105         operands, so that data addresses can be corrected when not
 106         ES-overridden.
 107         * rl78-decode.c: Regenerate.
 108         * rl78-dis.c (print_insn_rl78): Make order of modifiers
 109         irrelevent.  When the 'e' specifier is used on an operand and no
 110         ES prefix is provided, adjust address to make it absolute.
 111
 112 2012-08-15  Peter Bergner  <bergner@vnet.ibm.com>
 113
 114         * ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR.
 115
 116 2012-08-15  Peter Bergner  <bergner@vnet.ibm.com>
 117
 118         * ppc-opc.c <xnop, yield, mdoio, mdoom>: New extended mnemonics.
 119
 120 2012-08-14  Maciej W. Rozycki  <macro@codesourcery.com>
 121
 122         * mips-dis.c (print_insn_args): Add GET_OP and GET_OP_S local
 123         macros, use local variables for info struct member accesses,
 124         update the type of the variable used to hold the instruction
 125         word.
 126         (print_insn_mips, print_mips16_insn_arg): Likewise.
 127         (print_insn_mips16): Add GET_OP and GET_OP_S local macros, use
 128         local variables for info struct member accesses.
 129         (print_insn_micromips): Add GET_OP_S local macro.
 130         (_print_insn_mips): Update the type of the variable used to hold
 131         the instruction word.
 132
 133 2012-08-13  Ian Bolton  <ian.bolton@arm.com>
 134             Laurent Desnogues  <laurent.desnogues@arm.com>
 135             Jim MacArthur  <jim.macarthur@arm.com>
 136             Marcus Shawcroft  <marcus.shawcroft@arm.com>
 137             Nigel Stephens  <nigel.stephens@arm.com>
 138             Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 139             Richard Earnshaw  <rearnsha@arm.com>
 140             Sofiane Naci  <sofiane.naci@arm.com>
 141             Tejas Belagod  <tejas.belagod@arm.com>
 142             Yufeng Zhang  <yufeng.zhang@arm.com>
 143
 144         * Makefile.am: Add AArch64.
 145         * Makefile.in: Regenerate.
 146         * aarch64-asm.c: New file.
 147         * aarch64-asm.h: New file.
 148         * aarch64-dis.c: New file.
 149         * aarch64-dis.h: New file.
 150         * aarch64-gen.c: New file.
 151         * aarch64-opc.c: New file.
 152         * aarch64-opc.h: New file.
 153         * aarch64-tbl.h: New file.
 154         * configure.in: Add AArch64.
 155         * configure: Regenerate.
 156         * disassemble.c: Add AArch64.
 157         * aarch64-asm-2.c: New file (automatically generated).
 158         * aarch64-dis-2.c: New file (automatically generated).
 159         * aarch64-opc-2.c: New file (automatically generated).
 160         * po/POTFILES.in: Regenerate.
 161
 162 2012-08-13  Maciej W. Rozycki  <macro@codesourcery.com>
 163
 164         * micromips-opc.c (micromips_opcodes): Update comment.
 165         * mips-opc.c (mips_builtin_opcodes): Likewise.  Mark coprocessor
 166         instructions for IOCT as appropriate.
 167         * mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with
 168         opcode_is_member.
 169         * configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with
 170         the result of a check for the -Wno-missing-field-initializers
 171         GCC option.
 172         * Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable.
 173         (mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to
 174         compilation.
 175         (mips16-opc.lo): Likewise.
 176         (micromips-opc.lo): Likewise.
 177         * aclocal.m4: Regenerate.
 178         * configure: Regenerate.
 179         * Makefile.in: Regenerate.
 180
 181 2012-08-11  Saravanan Ekanathan <saravanan.ekanathan@amd.com>
 182
 183         PR gas/14423
 184         * i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS.
 185         * i386-init.h: Regenerated.
 186
 187 2012-08-09  Nick Clifton  <nickc@redhat.com>
 188
 189         * po/vi.po: Updated Vietnamese translation.
 190
 191 2012-08-07  Roland McGrath  <mcgrathr@google.com>
 192
 193         * i386-dis.c (reg_table): Fill out REG_0F0D table with
 194         AMD-reserved cases as "prefetch".
 195         (MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants.
 196         (MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise.
 197         (reg_table): Use those under REG_0F18.
 198         (mod_table): Add those cases as "nop/reserved".
 199
 200 2012-08-07  Jan Beulich <jbeulich@suse.com>
 201
 202         * i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
 203
 204 2012-08-06  Roland McGrath  <mcgrathr@google.com>
 205
 206         * i386-dis.c (print_insn): Print spaces between multiple excess
 207         prefixes.  Return actual number of excess prefixes consumed,
 208         not always one.
 209
 210         * i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
 211
 212 2012-08-06  Roland McGrath  <mcgrathr@google.com>
 213             Victor Khimenko  <khim@google.com>
 214             H.J. Lu  <hongjiu.lu@intel.com>
 215
 216         * i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG.
 217         (putop): For 'T', 'U', and 'V', treat REX_W like DFLAG.
 218         (intel_operand_size): For stack_v_mode, treat REX_W like DFLAG.
 219         (OP_E_register): Likewise.
 220         (OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
 221
 222 2012-08-02  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 223
 224         * configure.in: Formatting.
 225         * configure: Regenerate.
 226
 227 2012-08-01  Alan Modra  <amodra@gmail.com>
 228
 229         * h8300-dis.c: Fix printf arg warnings.
 230         * i960-dis.c: Likewise.
 231         * mips-dis.c: Likewise.
 232         * pdp11-dis.c: Likewise.
 233         * sh-dis.c: Likewise.
 234         * v850-dis.c: Likewise.
 235         * configure.in: Formatting.
 236         * configure: Regenerate.
 237         * rl78-decode.c: Regenerate.
 238         * po/POTFILES.in: Regenerate.
 239
 240 2012-07-31  Chao-Ying Fu  <fu@mips.com>
 241             Catherine Moore  <clm@codesourcery.com>
 242             Maciej W. Rozycki  <macro@codesourcery.com>
 243
 244         * micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
 245         (DSP_VOLA): Likewise.
 246         (D32, D33): Likewise.
 247         (micromips_opcodes): Add DSP ASE instructions.
 248         * mips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
 249         <'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
 250
 251 2012-07-31  Jan Beulich <jbeulich@suse.com>
 252
 253         * i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2
 254         instruction group. Mark as requiring AVX2.
 255         * i386-tbl.h: Re-generate.
 256
 257 2012-07-30  Nick Clifton  <nickc@redhat.com>
 258
 259         * po/opcodes.pot: Updated template.
 260         * po/es.po: Updated Spanish translation.
 261         * po/fi.po: Updated Finnish translation.
 262
 263 2012-07-27  Mike Frysinger  <vapier@gentoo.org>
 264
 265         * configure.in (BFD_VERSION): Run bfd/configure --version and
 266         parse the output of that.
 267         * configure: Regenerate.
 268
 269 2012-07-25  James Lemke  <jwlemke@codesourcery.com>
 270
 271         * ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
 272
 273 2012-07-24  Stephan McCamant  <smcc@cs.berkeley.edu>
 274             Dr David Alan Gilbert  <dave@treblig.org>
 275
 276         PR binutils/13135
 277         * arm-dis.c: Add necessary casts for printing integer values.
 278         Use %s when printing string values.
 279         * hppa-dis.c: Likewise.
 280         * m68k-dis.c: Likewise.
 281         * microblaze-dis.c: Likewise.
 282         * mips-dis.c: Likewise.
 283         * sparc-dis.c: Likewise.
 284
 285 2012-07-19  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 286
 287         PR binutils/14355
 288         * i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
 289         (VEX_LEN_0FXOP_08_CD): Likewise.
 290         (VEX_LEN_0FXOP_08_CE): Likewise.
 291         (VEX_LEN_0FXOP_08_CF): Likewise.
 292         (VEX_LEN_0FXOP_08_EC): Likewise.
 293         (VEX_LEN_0FXOP_08_ED): Likewise.
 294         (VEX_LEN_0FXOP_08_EE): Likewise.
 295         (VEX_LEN_0FXOP_08_EF): Likewise.
 296         (xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
 297         vpcomub, vpcomuw, vpcomud, vpcomuq.
 298         (vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
 299         VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
 300         VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
 301         VEX_LEN_0FXOP_08_EF.
 302
 303 2012-07-16  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 304
 305         * i386-dis.c (PREFIX_0F38F6): New.
 306         (prefix_table): Add adcx, adox instructions.
 307         (three_byte_table): Use PREFIX_0F38F6.
 308         (mod_table): Add rdseed instruction.
 309         * i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
 310         (cpu_flags): Likewise.
 311         * i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
 312         (i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
 313         * i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
 314         prefetchw.
 315         * i386-tbl.h: Regenerate.
 316         * i386-init.h: Likewise.
 317
 318 2012-07-05  Thomas Schwinge  <thomas@codesourcery.com>
 319
 320         * mips-dis.c: Remove gratuitous newline.
 321
 322 2012-07-05  Sean Keys  <skeys@ipdatasys.com>
 323
 324         * xgate-dis.c: Removed an IF statement that will
 325         always be false due to overlapping operand masks.
 326         * xgate-opc.c: Corrected 'com' opcode entry and
 327         fixed spacing.
 328
 329 2012-07-02  Roland McGrath  <mcgrathr@google.com>
 330
 331         * i386-opc.tbl: Add RepPrefixOk to nop.
 332         * i386-tbl.h: Regenerate.
 333
 334 2012-06-28  Nick Clifton  <nickc@redhat.com>
 335
 336         * po/vi.po: Updated Vietnamese translation.
 337
 338 2012-06-22  Roland McGrath  <mcgrathr@google.com>
 339
 340         * i386-opc.tbl: Add RepPrefixOk to ret.
 341         * i386-tbl.h: Regenerate.
 342
 343         * i386-opc.h (RepPrefixOk): New enum constant.
 344         (i386_opcode_modifier): New bitfield 'repprefixok'.
 345         * i386-gen.c (opcode_modifiers): Add RepPrefixOk.
 346         * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
 347         instructions that have IsString.
 348         * i386-tbl.h: Regenerate.
 349
 350 2012-06-11  Andreas Schwab  <schwab@linux-m68k.org>
 351
 352         * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
 353         (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
 354         (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
 355         (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
 356         (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
 357         (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
 358         (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
 359         (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
 360         (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
 361
 362 2012-05-19  Alan Modra  <amodra@gmail.com>
 363
 364         * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
 365         (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
 366
 367 2012-05-18  Alan Modra  <amodra@gmail.com>
 368
 369         * ia64-opc.c: Remove #include "ansidecl.h".
 370         * z8kgen.c: Include sysdep.h first.
 371
 372         * arc-dis.c: Include sysdep.h first, remove some redundant includes.
 373         * bfin-dis.c: Likewise.
 374         * i860-dis.c: Likewise.
 375         * ia64-dis.c: Likewise.
 376         * ia64-gen.c: Likewise.
 377         * m68hc11-dis.c: Likewise.
 378         * mmix-dis.c: Likewise.
 379         * msp430-dis.c: Likewise.
 380         * or32-dis.c: Likewise.
 381         * rl78-dis.c: Likewise.
 382         * rx-dis.c: Likewise.
 383         * tic4x-dis.c: Likewise.
 384         * tilegx-opc.c: Likewise.
 385         * tilepro-opc.c: Likewise.
 386         * rx-decode.c: Regenerate.
 387
 388 2012-05-17  James Lemke  <jwlemke@codesourcery.com>
 389
 390         * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
 391
 392 2012-05-17  James Lemke  <jwlemke@codesourcery.com>
 393
 394         * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
 395
 396 2012-05-17  Daniel Richard G.  <skunk@iskunk.org>
 397             Nick Clifton  <nickc@redhat.com>
 398
 399         PR 14072
 400         * configure.in: Add check that sysdep.h has been included before
 401         any system header files.
 402         * configure: Regenerate.
 403         * config.in: Regenerate.
 404         * sysdep.h: Generate an error if included before config.h.
 405         * alpha-opc.c: Include sysdep.h before any other header file.
 406         * alpha-dis.c: Likewise.
 407         * avr-dis.c: Likewise.
 408         * cgen-opc.c: Likewise.
 409         * cr16-dis.c: Likewise.
 410         * cris-dis.c: Likewise.
 411         * crx-dis.c: Likewise.
 412         * d10v-dis.c: Likewise.
 413         * d10v-opc.c: Likewise.
 414         * d30v-dis.c: Likewise.
 415         * d30v-opc.c: Likewise.
 416         * h8500-dis.c: Likewise.
 417         * i370-dis.c: Likewise.
 418         * i370-opc.c: Likewise.
 419         * m10200-dis.c: Likewise.
 420         * m10300-dis.c: Likewise.
 421         * micromips-opc.c: Likewise.
 422         * mips-opc.c: Likewise.
 423         * mips61-opc.c: Likewise.
 424         * moxie-dis.c: Likewise.
 425         * or32-opc.c: Likewise.
 426         * pj-dis.c: Likewise.
 427         * ppc-dis.c: Likewise.
 428         * ppc-opc.c: Likewise.
 429         * s390-dis.c: Likewise.
 430         * sh-dis.c: Likewise.
 431         * sh64-dis.c: Likewise.
 432         * sparc-dis.c: Likewise.
 433         * sparc-opc.c: Likewise.
 434         * spu-dis.c: Likewise.
 435         * tic30-dis.c: Likewise.
 436         * tic54x-dis.c: Likewise.
 437         * tic80-dis.c: Likewise.
 438         * tic80-opc.c: Likewise.
 439         * tilegx-dis.c: Likewise.
 440         * tilepro-dis.c: Likewise.
 441         * v850-dis.c: Likewise.
 442         * v850-opc.c: Likewise.
 443         * vax-dis.c: Likewise.
 444         * w65-dis.c: Likewise.
 445         * xgate-dis.c: Likewise.
 446         * xtensa-dis.c: Likewise.
 447         * rl78-decode.opc: Likewise.
 448         * rl78-decode.c: Regenerate.
 449         * rx-decode.opc: Likewise.
 450         * rx-decode.c: Regenerate.
 451
 452 2012-05-17  Alan Modra  <amodra@gmail.com>
 453
 454         * ppc_dis.c: Don't include elf/ppc.h.
 455
 456 2012-05-16  Meador Inge  <meadori@codesourcery.com>
 457
 458         * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
 459         to PUSH/POP {reg}.
 460
 461 2012-05-15  James Murray <jsm@jsm-net.demon.co.uk>
 462             Stephane Carrez <stcarrez@nerim.fr>
 463
 464         * configure.in: Add S12X and XGATE co-processor support to m68hc11
 465         target.
 466         * disassemble.c: Likewise.
 467         * configure: Regenerate.
 468         * m68hc11-dis.c: Make objdump output more consistent, use hex
 469         instead of decimal and use 0x prefix for hex.
 470         * m68hc11-opc.c: Add S12X and XGATE opcodes.
 471
 472 2012-05-14  James Lemke  <jwlemke@codesourcery.com>
 473
 474         * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
 475         (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
 476         (vle_opcd_indices): New array.
 477         (lookup_vle): New function.
 478         (disassemble_init_powerpc): Revise for second (VLE) opcode table.
 479         (print_insn_powerpc): Likewise.
 480         * ppc-opc.c: Likewise.
 481
 482 2012-05-14  Catherine Moore  <clm@codesourcery.com>
 483             Maciej W. Rozycki  <macro@codesourcery.com>
 484             Rhonda Wittels  <rhonda@codesourcery.com>
 485             Nathan Froyd <froydnj@codesourcery.com>
 486
 487         * ppc-opc.c (insert_arx, extract_arx): New functions.
 488         (insert_ary, extract_ary): New functions.
 489         (insert_li20, extract_li20): New functions.
 490         (insert_rx, extract_rx): New functions.
 491         (insert_ry, extract_ry): New functions.
 492         (insert_sci8, extract_sci8): New functions.
 493         (insert_sci8n, extract_sci8n): New functions.
 494         (insert_sd4h, extract_sd4h): New functions.
 495         (insert_sd4w, extract_sd4w): New functions.
 496         (insert_vlesi, extract_vlesi): New functions.
 497         (insert_vlensi, extract_vlensi): New functions.
 498         (insert_vleui, extract_vleui): New functions.
 499         (insert_vleil, extract_vleil): New functions.
 500         (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
 501         (BI16, BI32, BO32, B8): New.
 502         (B15, B24, CRD32, CRS): New.
 503         (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
 504         (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
 505         (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
 506         (SH6_MASK): Use PPC_OPSHIFT_INV.
 507         (SI8, UI5, OIMM5, UI7, BO16): New.
 508         (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
 509         (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
 510         (ALLOW8_SPRG): New.
 511         (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
 512         (OPVUP, OPVUP_MASK OPVUP): New
 513         (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
 514         (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
 515         (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
 516         (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
 517         (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
 518         (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
 519         (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
 520         (SE_IM5, SE_IM5_MASK): New.
 521         (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
 522         (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
 523         (BO32DNZ, BO32DZ): New.
 524         (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
 525         (PPCVLE): New.
 526         (powerpc_opcodes): Add new VLE instructions.  Update existing
 527         instruction to include PPCVLE if supported.
 528         * ppc-dis.c (ppc_opts): Add vle entry.
 529         (get_powerpc_dialect): New function.
 530         (powerpc_init_dialect): VLE support.
 531         (print_insn_big_powerpc): Call get_powerpc_dialect.
 532         (print_insn_little_powerpc): Likewise.
 533         (operand_value_powerpc): Handle negative shift counts.
 534         (print_insn_powerpc): Handle 2-byte instruction lengths.
 535
 536 2012-05-11  Daniel Richard G.  <skunk@iskunk.org>
 537
 538         PR binutils/14028
 539         * configure.in: Invoke ACX_HEADER_STRING.
 540         * configure: Regenerate.
 541         * config.in: Regenerate.
 542         * sysdep.h: If STRINGS_WITH_STRING is defined then include both
 543         string.h and strings.h.
 544
 545 2012-05-11  Nick Clifton  <nickc@redhat.com>
 546
 547         PR binutils/14006
 548         * arm-dis.c (print_insn): Fix detection of instruction mode in
 549         files containing multiple executable sections.
 550
 551 2012-05-03  Sean Keys  <skeys@ipdatasys.com>
 552
 553         * Makefile.in, configure: regenerate
 554         * disassemble.c (disassembler): Recognize ARCH_XGATE.
 555         * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
 556         New functions.
 557         * configure.in: Recognize xgate.
 558         * xgate-dis.c, xgate-opc.c: New files for support of xgate
 559         * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
 560         and opcode generation for xgate.
 561
 562 2012-04-30  DJ Delorie  <dj@redhat.com>
 563
 564         * rx-decode.opc (MOV): Do not sign-extend immediates which are
 565         already the maximum bit size.
 566         * rx-decode.c: Regenerate.
 567
 568 2012-04-27  David S. Miller  <davem@davemloft.net>
 569
 570         * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
 571         * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
 572
 573         * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
 574         * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
 575
 576         * sparc-opc.c (CBCOND): New define.
 577         (CBCOND_XCC): Likewise.
 578         (cbcond): New helper macro.
 579         (sparc_opcodes): Add compare-and-branch instructions.
 580
 581         * sparc-dis.c (print_insn_sparc): Handle ')'.
 582         * sparc-opc.c (sparc_opcodes): Add crypto instructions.
 583
 584         * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
 585         into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
 586
 587 2012-04-12  David S. Miller  <davem@davemloft.net>
 588
 589         * sparc-dis.c (X_DISP10): Define.
 590         (print_insn_sparc): Handle '='.
 591
 592 2012-04-01  Mike Frysinger  <vapier@gentoo.org>
 593
 594         * bfin-dis.c (fmtconst): Replace decimal handling with a single
 595         sprintf call and the '*' field width.
 596
 597 2012-03-23  Maxim Kuvyrkov  <maxim@codesourcery.com>
 598
 599         * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
 600
 601 2012-03-16  Alan Modra  <amodra@gmail.com>
 602
 603         * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
 604         (powerpc_opcd_indices): Bump array size.
 605         (disassemble_init_powerpc): Set powerpc_opcd_indices entries
 606         corresponding to unused opcodes to following entry.
 607         (lookup_powerpc): New function, extracted and optimised from..
 608         (print_insn_powerpc): ..here.
 609
 610 2012-03-15  Alan Modra  <amodra@gmail.com>
 611             James Lemke  <jwlemke@codesourcery.com>
 612
 613         * disassemble.c (disassemble_init_for_target): Handle ppc init.
 614         * ppc-dis.c (private): New var.
 615         (powerpc_init_dialect): Don't return calloc failure, instead use
 616         private.
 617         (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
 618         (powerpc_opcd_indices): New array.
 619         (disassemble_init_powerpc): New function.
 620         (print_insn_big_powerpc): Don't init dialect here.
 621         (print_insn_little_powerpc): Likewise.
 622         (print_insn_powerpc): Start search using powerpc_opcd_indices.
 623
 624 2012-03-10  Edmar Wienskoski  <edmar@freescale.com>
 625
 626         * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
 627         * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
 628         (PPCVEC2, PPCTMR, E6500): New short names.
 629         (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
 630         mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
 631         lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
 632         lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
 633         lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
 634         optional operands on sync instruction for E6500 target.
 635
 636 2012-03-08  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 637
 638         * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
 639
 640 2012-02-27  Alan Modra  <amodra@gmail.com>
 641
 642         * mt-dis.c: Regenerate.
 643
 644 2012-02-27  Alan Modra  <amodra@gmail.com>
 645
 646         * v850-opc.c (extract_v8): Rearrange to make it obvious this
 647         is the inverse of corresponding insert function.
 648         (extract_d22, extract_u9, extract_r4): Likewise.
 649         (extract_d9): Correct sign extension.
 650         (extract_d16_15): Don't assume "long" is 32 bits, and don't
 651         rely on implementation defined behaviour for shift right of
 652         signed types.
 653         (extract_d16_16, extract_d17_16, extract_i9): Likewise.
 654         (extract_d23): Likewise, and correct mask.
 655
 656 2012-02-27  Alan Modra  <amodra@gmail.com>
 657
 658         * crx-dis.c (print_arg): Mask constant to 32 bits.
 659         * crx-opc.c (cst4_map): Use int array.
 660
 661 2012-02-27  Alan Modra  <amodra@gmail.com>
 662
 663         * arc-dis.c (BITS): Don't use shifts to mask off bits.
 664         (FIELDD): Sign extend with xor,sub.
 665
 666 2012-02-25  Walter Lee  <walt@tilera.com>
 667
 668         * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
 669         * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
 670         TILEPRO_OPC_LW_TLS_SN.
 671
 672 2012-02-21  H.J. Lu  <hongjiu.lu@intel.com>
 673
 674         * i386-opc.h (HLEPrefixNone): New.
 675         (HLEPrefixLock): Likewise.
 676         (HLEPrefixAny): Likewise.
 677         (HLEPrefixRelease): Likewise.
 678
 679 2012-02-08  H.J. Lu  <hongjiu.lu@intel.com>
 680
 681         * i386-dis.c (HLE_Fixup1): New.
 682         (HLE_Fixup2): Likewise.
 683         (HLE_Fixup3): Likewise.
 684         (Ebh1): Likewise.
 685         (Evh1): Likewise.
 686         (Ebh2): Likewise.
 687         (Evh2): Likewise.
 688         (Ebh3): Likewise.
 689         (Evh3): Likewise.
 690         (MOD_C6_REG_7): Likewise.
 691         (MOD_C7_REG_7): Likewise.
 692         (RM_C6_REG_7): Likewise.
 693         (RM_C7_REG_7): Likewise.
 694         (XACQUIRE_PREFIX): Likewise.
 695         (XRELEASE_PREFIX): Likewise.
 696         (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
 697         cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
 698         Ebh2/Evh2 on xchg.  Use Ebh3/Evh3 on mov.
 699         (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
 700         not, or, sbb, sub and xor.  Use Ebh3/Evh3 on mov.  Use
 701         MOD_C6_REG_7 and MOD_C7_REG_7.
 702         (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
 703         (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7.  Add xend and
 704         xtest.
 705         (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
 706         (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
 707
 708         * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
 709         CPU_RTM_FLAGS.
 710         (cpu_flags): Add CpuHLE and CpuRTM.
 711         (opcode_modifiers): Add HLEPrefixOk.
 712
 713         * i386-opc.h (CpuHLE): New.
 714         (CpuRTM): Likewise.
 715         (HLEPrefixOk): Likewise.
 716         (i386_cpu_flags): Add cpuhle and cpurtm.
 717         (i386_opcode_modifier): Add hleprefixok.
 718
 719         * i386-opc.tbl: Add HLEPrefixOk=3 to mov.  Add HLEPrefixOk to
 720         add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
 721         sbb, sub, xor and xadd.  Add HLEPrefixOk=2 to xchg with memory
 722         operand.  Add xacquire, xrelease, xabort, xbegin, xend and
 723         xtest.
 724         * i386-init.h: Regenerated.
 725         * i386-tbl.h: Likewise.
 726
 727 2012-01-24  DJ Delorie  <dj@redhat.com>
 728
 729         * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
 730         * rl78-decode.c: Regenerate.
 731
 732 2012-01-17  James Murray  <jsm@jsm-net.demon.co.uk>
 733
 734         PR binutils/10173
 735         * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
 736
 737 2012-01-17  Andreas Schwab  <schwab@linux-m68k.org>
 738
 739         * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
 740         register and move them after pmove with PSR/PCSR register.
 741
 742 2012-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 743
 744         * i386-dis.c (mod_table): Add vmfunc.
 745
 746         * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
 747         (cpu_flags): CpuVMFUNC.
 748
 749         * i386-opc.h (CpuVMFUNC): New.
 750         (i386_cpu_flags): Add cpuvmfunc.
 751
 752         * i386-opc.tbl: Add vmfunc.
 753         * i386-init.h: Regenerated.
 754         * i386-tbl.h: Likewise.
 755
 756 For older changes see ChangeLog-2011
 757 \f
 758 Local Variables:
 759 mode: change-log
 760 left-margin: 8
 761 fill-column: 74
 762 version-control: never
 763 End: