opcodes/ChangeLog

   1 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
   2
   3         * bfin-dis.c (constant_formats): Constify the whole structure.
   4         (fmtconst): Add const to return value.
   5         (reg_names): Mark const.
   6         (decode_multfunc): Mark s0/s1 as const.
   7         (decode_macfunc): Mark a/sop as const.
   8
   9 2010-09-17  Tejas Belagod  <tejas.belagod@arm.com>
  10
  11         * arm_dis.c (coprocessor_opcodes): Add MRC entry for APSR_nzcv.
  12
  13 2010-09-14  Maciej W. Rozycki  <macro@codesourcery.com>
  14
  15         * mips-opc.c (mips_builtin_opcodes): Add "sync_acquire",
  16         "sync_mb", "sync_release", "sync_rmb" and "sync_wmb".
  17
  18 2010-09-10  Pierre Muller  <muller@ics.u-strasbg.fr>
  19
  20         * src/opcodes/dlx-dis.c (print_insn_dlx): Use dlx_insn type for
  21         dlx_insn_type array.
  22
  23 2010-08-31  H.J. Lu  <hongjiu.lu@intel.com>
  24
  25         PR binutils/11960
  26         * i386-dis.c (sIv): New.
  27         (dis386): Replace Iq with sIv on "pushT".
  28         (reg_table): Replace T with {T|} on callT, JcallT, jmpT and JjmpT.
  29         (x86_64_table): Replace {T|}/{P|} with P.
  30         (putop): Add 'w' to 'T'/'P' if needed for Intel syntax.
  31         (OP_sI): Update v_mode.  Remove w_mode.
  32
  33 2010-08-27  Nathan Froyd  <froydnj@codesourcery.com>
  34
  35         * ppc-opc.c (powerpc_opcodes) [lswx,lswi,stswx,stswi]: Deprecate
  36         on E500 and E500MC.
  37
  38 2010-08-17  H.J. Lu  <hongjiu.lu@intel.com>
  39
  40         * i386-dis.c (reg_table): Replace Eb with Mb on prefetch and
  41         prefetchw.
  42
  43 2010-08-06  Quentin Neill <quentin.neill@amd.com>
  44
  45         * i386-gen.c (cpu_flag_init): Define CpuNop extension flag, add
  46         to processor flags for PENTIUMPRO processors and later.
  47         * i386-opc.h (enum): Add CpuNop.
  48         (i386_cpu_flags): Add cpunop bit.
  49         * i386-opc.tbl: Change nop cpu_flags.
  50         * i386-init.h: Regenerated.
  51         * i386-tbl.h: Likewise.
  52
  53 2010-08-06  Quentin Neill <quentin.neill@amd.com>
  54
  55         * i386-opc.h (enum): Fix typos in comments.
  56
  57 2010-08-06  Alan Modra  <amodra@gmail.com>
  58
  59         * disassemble.c: Formatting.
  60         (disassemble_init_for_target <ARCH_m32c>): Comment on endian.
  61
  62 2010-08-05  H.J. Lu  <hongjiu.lu@intel.com>
  63
  64         * i386-opc.tbl: Add Cpu186 to ud1/ud2/ud2a/ud2b.
  65         * i386-tbl.h: Regenerated.
  66
  67 2010-08-05  H.J. Lu  <hongjiu.lu@intel.com>
  68
  69         * i386-dis.c (dis386_twobyte): Replace ud2a/ud2b with ud2/ud1.
  70
  71         * i386-opc.tbl: Add ud1.  Remove Cpu686 from ud2/ud2a/ud2b.
  72         * i386-tbl.h: Regenerated.
  73
  74 2010-07-29  DJ Delorie  <dj@redhat.com>
  75
  76         * rx-decode.opc (SRR): New.
  77         (rx_decode_opcode): Use it for movbi and movbir.  Decode NOP2 (mov
  78         r0,r0) and NOP3 (max r0,r0) special cases.
  79         * rx-decode.c: Regenerate.
  80
  81 2010-07-28  H.J. Lu  <hongjiu.lu@intel.com>
  82
  83         * i386-dis.c: Add 0F to VEX opcode enums.
  84
  85 2010-07-27  DJ Delorie  <dj@redhat.com>
  86
  87         * rx-decode.opc (store_flags): Remove, replace with F_* macros.
  88         (rx_decode_opcode): Likewise.
  89         * rx-decode.c: Regenerate.
  90
  91 2010-07-23  Naveen.H.S  <naveen.S@kpitcummins.com>
  92             Ina Pandit  <ina.pandit@kpitcummins.com>
  93
  94         * v850-dis.c (v850_sreg_names): Updated structure for system
  95         registers.
  96         (float_cc_names): new structure for condition codes.
  97         (print_value): Update the function that prints value.
  98         (get_operand_value): New function to get the operand value.
  99         (disassemble): Updated to handle the disassembly of instructions.
 100         (print_insn_v850): Updated function to print instruction for different
 101         families.
 102         * opcodes/v850-opc.c (v850_msg_is_out_of_range, insert_i5div1,
 103         extract_i5div1, insert_i5div2, extract_i5div2, insert_i5div3,
 104         extract_i5div3, insert_d5_4, extract_d5_4, extract_d8_6,
 105         insert_d8_7, extract_d8_7, insert_v8, extract_v8, insert_u16_loop,
 106         extract_u16_loop, insert_d16_15, extract_d16_15, insert_d16_16,
 107         extract_d16_16, nsert_d17_16, extract_d17_16, insert_d22,
 108         extract_d22, insert_d23, extract_d23, insert_i9, extract_i9,
 109         insert_u9, extract_u9, extract_spe, insert_r4, extract_r4): New.
 110         (insert_d8_7, insert_d5_4, insert_i5div): Remove.
 111         (v850_operands): Update with the relocation name. Also update
 112         the instructions with specific set of processors.
 113
 114 2010-07-08 Tejas Belagod <tejas.belagod@arm.com>
 115
 116         * arm-dis.c (print_insn_arm): Add cases for printing more
 117         symbolic operands.
 118         (print_insn_thumb32): Likewise.
 119
 120 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
 121
 122         * mips-dis.c (print_insn_mips): Correct branch instruction type
 123         determination.
 124
 125 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
 126
 127         * mips-dis.c (print_mips16_insn_arg): Remove branch instruction
 128         type and delay slot determination.
 129         (print_insn_mips16): Extend branch instruction type and delay
 130         slot determination to cover all instructions.
 131         * mips16-opc.c (BR): Remove macro.
 132         (UBR, CBR): New macros.
 133         (mips16_opcodes): Update branch annotation for "b", "beqz",
 134         "bnez", "bteqz" and "btnez".  Add branch annotation for "jalrc"
 135         and "jrc".
 136
 137 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
 138
 139         AVX Programming Reference (June, 2010)
 140         * i386-dis.c (mod_table): Replace rdrnd with rdrand.
 141         * i386-opc.tbl: Likewise.
 142         * i386-tbl.h: Regenerated.
 143
 144 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
 145
 146         * i386-opc.h (CpuFSGSBase): Fix a typo in comments.
 147
 148 2010-07-03  Andreas Schwab  <schwab@linux-m68k.org>
 149
 150         * ppc-dis.c (powerpc_init_dialect): Cast PPC_OPCODE_xxx to
 151         ppc_cpu_t before inverting.
 152         (ppc_parse_cpu): Likewise.
 153         (print_insn_powerpc): Likewise.
 154
 155 2010-07-03  Alan Modra  <amodra@gmail.com>
 156
 157         * ppc-dis.c (ppc_opts, powerpc_init_dialect): Remove old opcode flags.
 158         * ppc-opc.c (PPC32, POWER32, COM32, CLASSIC): Delete.
 159         (PPC64, MFDEC2): Update.
 160         (NON32, NO371): Define.
 161         (powerpc_opcode): Update to not use old opcode flags, and avoid
 162         -m601 duplicates.
 163
 164 2010-07-03  DJ Delorie  <dj@delorie.com>
 165
 166         * m32c-ibld.c: Regenerate.
 167
 168 2010-07-03  Alan Modra  <amodra@gmail.com>
 169
 170         * ppc-opc.c (PWR2COM): Define.
 171         (PPCPWR2): Add PPC_OPCODE_COMMON.
 172         (powerpc_opcodes): Add "subc", "subco", "subco.", "fcir", "fcir.",
 173         "fcirz", "fcirz." to -mcom opcodes.  Remove "mfsri", "dclst",
 174         "rac" from -mcom.
 175
 176 2010-07-01  H.J. Lu  <hongjiu.lu@intel.com>
 177
 178         AVX Programming Reference (June, 2010)
 179         * i386-dis.c (PREFIX_0FAE_REG_0): New.
 180         (PREFIX_0FAE_REG_1): Likewise.
 181         (PREFIX_0FAE_REG_2): Likewise.
 182         (PREFIX_0FAE_REG_3): Likewise.
 183         (PREFIX_VEX_3813): Likewise.
 184         (PREFIX_VEX_3A1D): Likewise.
 185         (prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
 186         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 and
 187         PREFIX_VEX_3A1D.
 188         (vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D.
 189         (mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
 190         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd.
 191
 192         * i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS,
 193         CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS.
 194         (cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C.
 195
 196         * i386-opc.h (CpuXsaveopt): New.
 197         (CpuFSGSBase): Likewise.
 198         (CpuRdRnd): Likewise.
 199         (CpuF16C): Likewise.
 200         (i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and
 201         cpuf16c.
 202
 203         * i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd,
 204         wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph.
 205         * i386-init.h: Regenerated.
 206         * i386-tbl.h: Likewise.
 207
 208 2010-07-01  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 209
 210         * ppc-opc.c (powerpc_opcodes): Revert deprecation of mfocrf, mtcrf
 211         and mtocrf on EFS.
 212
 213 2010-06-29  Alan Modra  <amodra@gmail.com>
 214
 215         * maxq-dis.c: Delete file.
 216         * Makefile.am: Remove references to maxq.
 217         * configure.in: Likewise.
 218         * disassemble.c: Likewise.
 219         * Makefile.in: Regenerate.
 220         * configure: Regenerate.
 221         * po/POTFILES.in: Regenerate.
 222
 223 2010-06-29  Alan Modra  <amodra@gmail.com>
 224
 225         * mep-dis.c: Regenerate.
 226
 227 2010-06-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 228
 229         * arm-disc.c (parse_insn_neon):  Fix Neon alignment syntax.
 230
 231 2010-06-27  Alan Modra  <amodra@gmail.com>
 232
 233         * arc-dis.c (arc_sprintf): Delete set but unused variables.
 234         (decodeInstr): Likewise.
 235         * dlx-dis.c (print_insn_dlx): Likewise.
 236         * h8300-dis.c (bfd_h8_disassemble_init): Likewise.
 237         * maxq-dis.c (check_move, print_insn): Likewise.
 238         * mep-dis.c (mep_examine_ivc2_insns): Likewise.
 239         * msp430-dis.c (msp430_branchinstr): Likewise.
 240         * bfin-dis.c (_print_insn_bfin): Avoid set but unused warning.
 241         * cgen-asm.in (parse_insn_normal, _cgen_assemble_insn): Likewise.
 242         * sparc-dis.c (print_insn_sparc): Likewise.
 243         * fr30-asm.c: Regenerate.
 244         * frv-asm.c: Regenerate.
 245         * ip2k-asm.c: Regenerate.
 246         * iq2000-asm.c: Regenerate.
 247         * lm32-asm.c: Regenerate.
 248         * m32c-asm.c: Regenerate.
 249         * m32r-asm.c: Regenerate.
 250         * mep-asm.c: Regenerate.
 251         * mt-asm.c: Regenerate.
 252         * openrisc-asm.c: Regenerate.
 253         * xc16x-asm.c: Regenerate.
 254         * xstormy16-asm.c: Regenerate.
 255
 256 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 257
 258         PR gas/11673
 259         * m68k-opc.c (m68k_opcodes): Remove move.l for isab and later.
 260
 261 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 262
 263         PR binutils/11676
 264         * m68k-dis.c (print_insn_arg): Prefix float constants with #0e.
 265
 266 2010-06-14  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 267
 268         * ppc-dis.c (ppc_opts):  Remove PPC_OPCODE_E500MC from e500 and
 269         e500x2.  Add PPC_OPCODE_E500 to e500 and e500x2
 270         * ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which
 271         touch floating point regs and are enabled by COM, PPC or PPCCOM.
 272         Treat sync as msync on e500.  Treat eieio as mbar 1 on e500.
 273         Treat lwsync as msync on e500.
 274
 275 2010-06-07  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 276
 277         * arm-dis.c (thumb-opcodes): Add disassembly for movs.
 278
 279 2010-05-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 280
 281         * arm-dis.c (print_insn_neon):  Ensure disassembly of Neon
 282         constants is the same on 32-bit and 64-bit hosts.
 283
 284 2010-05-27  Jason Duerstock  <jason.duerstock+binutils@gmail.com>
 285
 286         * m68k-dis.c (print_insn_m68k): Emit undefined instructions as
 287         .short directives so that they can be reassembled.
 288
 289 2010-05-26  Catherine Moore <clm@codesourcery.com>
 290             David Ung  <davidu@mips.com>
 291
 292         * mips-opc.c: Change membership to I1 for instructions ssnop and
 293         ehb.
 294
 295 2010-05-26  H.J. Lu  <hongjiu.lu@intel.com>
 296
 297         * i386-dis.c (sib): New.
 298         (get_sib): Likewise.
 299         (print_insn): Call get_sib.
 300         OP_E_memory): Use sib.
 301
 302 2010-05-26  Catherine Moore  <clm@codesoourcery.com>
 303
 304         * mips-dis.c (mips_arch): Remove INSN_MIPS16.
 305         * mips-opc.c (I16): Remove.
 306         (mips_builtin_op): Reclassify jalx.
 307
 308 2010-05-19  Alan Modra  <amodra@gmail.com>
 309
 310         * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
 311         divwe, divdeuo, divweuo, divdeo, divweo for A2.  Add icswepx.
 312
 313 2010-05-13  Alan Modra  <amodra@gmail.com>
 314
 315         * ppc-opc.c (powerpc_opcodes): Correct wclr encoding.
 316
 317 2010-05-11  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 318
 319         * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
 320         format.
 321         (print_insn_thumb16): Add support for new %W format.
 322
 323 2010-05-07  Tristan Gingold  <gingold@adacore.com>
 324
 325         * Makefile.in: Regenerate with automake 1.11.1.
 326         * aclocal.m4: Ditto.
 327
 328 2010-05-05  Nick Clifton  <nickc@redhat.com>
 329
 330         * po/es.po: Updated Spanish translation.
 331
 332 2010-04-22  Nick Clifton  <nickc@redhat.com>
 333
 334         * po/opcodes.pot: Updated by the Translation project.
 335         * po/vi.po: Updated Vietnamese translation.
 336
 337 2010-04-16  H.J. Lu  <hongjiu.lu@intel.com>
 338
 339         * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
 340         bits in opcode.
 341
 342 2010-04-09  Nick Clifton  <nickc@redhat.com>
 343
 344         * i386-dis.c (print_insn): Remove unused variable op.
 345         (OP_sI): Remove unused variable mask.
 346
 347 2010-04-07  Alan Modra  <amodra@gmail.com>
 348
 349         * configure: Regenerate.
 350
 351 2010-04-06  Peter Bergner  <bergner@vnet.ibm.com>
 352
 353         * ppc-opc.c (RBOPT): New define.
 354         ("dccci"): Enable for PPCA2.  Make operands optional.
 355         ("iccci"): Likewise.  Do not deprecate for PPC476.
 356
 357 2010-04-02  Masaki Muranaka  <monaka@monami-software.com>
 358
 359         * cr16-opc.c (cr16_instruction): Fix typo in comment.
 360
 361 2010-03-25  Joseph Myers  <joseph@codesourcery.com>
 362
 363         * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
 364         * Makefile.in: Regenerate.
 365         * configure.in (bfd_tic6x_arch): New.
 366         * configure: Regenerate.
 367         * disassemble.c (ARCH_tic6x): Define if ARCH_all.
 368         (disassembler): Handle TI C6X.
 369         * tic6x-dis.c: New.
 370
 371 2010-03-24  Mike Frysinger  <vapier@gentoo.org>
 372
 373         * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
 374
 375 2010-03-23  Joseph Myers  <joseph@codesourcery.com>
 376
 377         * dis-buf.c (buffer_read_memory): Give error for reading just
 378         before the start of memory.
 379
 380 2010-03-22  Sebastian Pop  <sebastian.pop@amd.com>
 381             Quentin Neill <quentin.neill@amd.com>
 382
 383         * i386-dis.c (OP_LWP_I): Removed.
 384         (reg_table): Do not use OP_LWP_I, use Iq.
 385         (OP_LWPCB_E): Remove use of names16.
 386         (OP_LWP_E): Same.
 387         * i386-opc.tbl: Removed 16bit LWP insns.  32bit LWP insns
 388         should not set the Vex.length bit.
 389         * i386-tbl.h: Regenerated.
 390
 391 2010-02-25  Edmar Wienskoski  <edmar@freescale.com>
 392
 393         * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
 394
 395 2010-02-24  Nick Clifton  <nickc@redhat.com>
 396
 397         PR binutils/6773
 398         * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
 399         <prefix>asx.  Replace <prefix>subaddx with <prefix>sax.
 400         (thumb32_opcodes): Likewise.
 401
 402 2010-02-15  Nick Clifton  <nickc@redhat.com>
 403
 404         * po/vi.po: Updated Vietnamese translation.
 405
 406 2010-02-12  Doug Evans  <dje@sebabeach.org>
 407
 408         * lm32-opinst.c: Regenerate.
 409
 410 2010-02-11  Doug Evans  <dje@sebabeach.org>
 411
 412         * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
 413         (print_address): Delete CGEN_PRINT_ADDRESS.
 414         * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
 415         * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
 416         * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
 417         * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
 418
 419         * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
 420         * frv-desc.c, * frv-desc.h, * frv-opc.c,
 421         * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
 422         * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
 423         * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
 424         * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
 425         * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
 426         * mep-desc.c, * mep-desc.h, * mep-opc.c,
 427         * mt-desc.c, * mt-desc.h, * mt-opc.c,
 428         * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
 429         * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
 430         * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
 431
 432 2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 433
 434         * i386-dis.c: Update copyright.
 435         * i386-gen.c: Likewise.
 436         * i386-opc.h: Likewise.
 437         * i386-opc.tbl: Likewise.
 438
 439 2010-02-10  Quentin Neill  <quentin.neill@amd.com>
 440             Sebastian Pop  <sebastian.pop@amd.com>
 441
 442         * i386-dis.c (OP_EX_VexImmW): Reintroduced
 443         function to handle 5th imm8 operand.
 444         (PREFIX_VEX_3A48): Added.
 445         (PREFIX_VEX_3A49): Added.
 446         (VEX_W_3A48_P_2): Added.
 447         (VEX_W_3A49_P_2): Added.
 448         (prefix table): Added entries for PREFIX_VEX_3A48
 449         and PREFIX_VEX_3A49.
 450         (vex table): Added entries for VEX_W_3A48_P_2 and
 451         and VEX_W_3A49_P_2.
 452         * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
 453         for Vec_Imm4 operands.
 454         * i386-opc.h (enum): Added Vec_Imm4.
 455         (i386_operand_type): Added vec_imm4.
 456         * i386-opc.tbl: Add entries for vpermilp[ds].
 457         * i386-init.h: Regenerated.
 458         * i386-tbl.h: Regenerated.
 459
 460 2010-02-10  Richard Sandiford  <r.sandiford@uk.ibm.com>
 461
 462         * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
 463         and "pwr7".  Move "a2" into alphabetical order.
 464
 465 2010-02-08  Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 466
 467         * ppc-dis.c (ppc_opts): Add titan entry.
 468         * ppc-opc.c (TITAN, MULHW): Define.
 469         (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
 470
 471 2010-02-03  Quentin Neill  <quentin.neill@amd.com>
 472
 473         * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
 474         to CPU_BDVER1_FLAGS
 475         * i386-init.h: Regenerated.
 476
 477 2010-02-03  Anthony Green  <green@moxielogic.com>
 478
 479         * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
 480         0x0f, and make 0x00 an illegal instruction.
 481
 482 2010-01-29  Daniel Jacobowitz  <dan@codesourcery.com>
 483
 484         * opcodes/arm-dis.c (struct arm_private_data): New.
 485         (print_insn_coprocessor, print_insn_arm): Update to use struct
 486         arm_private_data.
 487         (is_mapping_symbol, get_map_sym_type): New functions.
 488         (get_sym_code_type): Check the symbol's section.  Do not check
 489         mapping symbols.
 490         (print_insn): Default to disassembling ARM mode code.  Check
 491         for mapping symbols separately from other symbols.  Use
 492         struct arm_private_data.
 493
 494 2010-01-28  H.J. Lu  <hongjiu.lu@intel.com>
 495
 496         * i386-dis.c (EXVexWdqScalar): New.
 497         (vex_scalar_w_dq_mode): Likewise.
 498         (prefix_table): Update entries for PREFIX_VEX_3899,
 499         PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
 500         PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
 501         PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
 502         PREFIX_VEX_38BD and PREFIX_VEX_38BF.
 503         (intel_operand_size): Handle vex_scalar_w_dq_mode.
 504         (OP_EX): Likewise.
 505
 506 2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>
 507
 508         * i386-dis.c (XMScalar): New.
 509         (EXdScalar): Likewise.
 510         (EXqScalar): Likewise.
 511         (EXqScalarS): Likewise.
 512         (VexScalar): Likewise.
 513         (EXdVexScalarS): Likewise.
 514         (EXqVexScalarS): Likewise.
 515         (XMVexScalar): Likewise.
 516         (scalar_mode): Likewise.
 517         (d_scalar_mode): Likewise.
 518         (d_scalar_swap_mode): Likewise.
 519         (q_scalar_mode): Likewise.
 520         (q_scalar_swap_mode): Likewise.
 521         (vex_scalar_mode): Likewise.
 522         (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
 523         VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
 524         VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
 525         VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
 526         VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
 527         VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
 528         VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
 529         VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
 530         VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
 531         VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
 532         (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
 533         VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
 534         VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
 535         VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
 536         VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
 537         VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
 538         VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
 539         VEX_W_7E_P_1, VEX_W_D6_P_2  VEX_W_C2_P_1, VEX_W_C2_P_3,
 540         VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
 541         (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
 542         q_scalar_mode, q_scalar_swap_mode.
 543         (OP_XMM): Handle scalar_mode.
 544         (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
 545         and q_scalar_swap_mode.
 546         (OP_VEX): Handle vex_scalar_mode.
 547
 548 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 549
 550         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 551
 552 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 553
 554         * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
 555
 556 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 557
 558         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 559
 560 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 561
 562         * i386-dis.c (Bad_Opcode): New.
 563         (bad_opcode): Likewise.
 564         (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
 565         (dis386_twobyte): Likewise.
 566         (reg_table): Likewise.
 567         (prefix_table): Likewise.
 568         (x86_64_table): Likewise.
 569         (vex_len_table): Likewise.
 570         (vex_w_table): Likewise.
 571         (mod_table): Likewise.
 572         (rm_table): Likewise.
 573         (float_reg): Likewise.
 574         (reg_table): Remove trailing "(bad)" entries.
 575         (prefix_table): Likewise.
 576         (x86_64_table): Likewise.
 577         (vex_len_table): Likewise.
 578         (vex_w_table): Likewise.
 579         (mod_table): Likewise.
 580         (rm_table): Likewise.
 581         (get_valid_dis386): Handle bytemode 0.
 582
 583 2010-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 584
 585         * i386-opc.h (VEXScalar): New.
 586
 587         * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
 588         instructions.
 589         * i386-tbl.h: Regenerated.
 590
 591 2010-01-21  H.J. Lu  <hongjiu.lu@intel.com>
 592
 593         * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
 594
 595         * i386-opc.tbl: Add xsave64 and xrstor64.
 596         * i386-tbl.h: Regenerated.
 597
 598 2010-01-20  Nick Clifton  <nickc@redhat.com>
 599
 600         PR 11170
 601         * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
 602         based post-indexed addressing.
 603
 604 2010-01-15  Sebastian Pop  <sebastian.pop@amd.com>
 605
 606         * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
 607         * i386-tbl.h: Regenerated.
 608
 609 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 610
 611         * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
 612         comments.
 613
 614 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 615
 616         * i386-dis.c (names_mm): New.
 617         (intel_names_mm): Likewise.
 618         (att_names_mm): Likewise.
 619         (names_xmm): Likewise.
 620         (intel_names_xmm): Likewise.
 621         (att_names_xmm): Likewise.
 622         (names_ymm): Likewise.
 623         (intel_names_ymm): Likewise.
 624         (att_names_ymm): Likewise.
 625         (print_insn): Set names_mm, names_xmm and names_ymm.
 626         (OP_MMX): Use names_mm, names_xmm and names_ymm.
 627         (OP_XMM): Likewise.
 628         (OP_EM): Likewise.
 629         (OP_EMC): Likewise.
 630         (OP_MXC): Likewise.
 631         (OP_EX): Likewise.
 632         (XMM_Fixup): Likewise.
 633         (OP_VEX): Likewise.
 634         (OP_EX_VexReg): Likewise.
 635         (OP_Vex_2src): Likewise.
 636         (OP_Vex_2src_1): Likewise.
 637         (OP_Vex_2src_2): Likewise.
 638         (OP_REG_VexI4): Likewise.
 639
 640 2010-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 641
 642         * i386-dis.c (print_insn): Update comments.
 643
 644 2010-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 645
 646         * i386-dis.c (rex_original): Removed.
 647         (ckprefix): Remove rex_original.
 648         (print_insn): Update comments.
 649
 650 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 651
 652         * Makefile.in: Regenerate.
 653         * configure: Regenerate.
 654
 655 2010-01-07  Doug Evans  <dje@sebabeach.org>
 656
 657         * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
 658         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 659         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 660         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 661         * xstormy16-ibld.c: Regenerate.
 662
 663 2010-01-06  Quentin Neill  <quentin.neill@amd.com>
 664
 665         * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
 666         * i386-init.h: Regenerated.
 667
 668 2010-01-06  Daniel Gutson  <dgutson@codesourcery.com>
 669
 670         * arm-dis.c (print_insn): Fixed search for next symbol and data
 671         dumping condition, and the initial mapping symbol state.
 672
 673 2010-01-05  Doug Evans  <dje@sebabeach.org>
 674
 675         * cgen-ibld.in: #include "cgen/basic-modes.h".
 676         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 677         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 678         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 679         * xstormy16-ibld.c: Regenerate.
 680
 681 2010-01-04  Nick Clifton  <nickc@redhat.com>
 682
 683         PR 11123
 684         * arm-dis.c (print_insn_coprocessor): Initialise value.
 685
 686 2010-01-04  Edmar Wienskoski  <edmar@freescale.com>
 687
 688         * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
 689
 690 2010-01-02  Doug Evans  <dje@sebabeach.org>
 691
 692         * cgen-asm.in: Update copyright year.
 693         * cgen-dis.in: Update copyright year.
 694         * cgen-ibld.in: Update copyright year.
 695         * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
 696         * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
 697         * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
 698         * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
 699         * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
 700         * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
 701         * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
 702         * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
 703         * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
 704         * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
 705         * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
 706         * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
 707         * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
 708         * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
 709         * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
 710         * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
 711         * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
 712         * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
 713         * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
 714         * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
 715         * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
 716
 717 For older changes see ChangeLog-2009
 718 \f
 719 Local Variables:
 720 mode: change-log
 721 left-margin: 8
 722 fill-column: 74
 723 version-control: never
 724 End: