opcodes/ChangeLog

   1 2005-10-18  Nick Clifton  <nickc@redhat.com>
   2
   3         * m32r-asm.c: Regenerate after updating m32r.opc.
   4
   5 2005-10-14  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
   6
   7         * m32r-asm.c: Regenerate after updating m32r.opc.
   8
   9 2005-10-08  James Lemke  <jim@wasabisystems.com>
  10
  11         * arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
  12         operations.
  13
  14 2005-10-06  Daniel Jacobowitz  <dan@codesourcery.com>
  15
  16         * ppc-dis.c (struct dis_private): Remove.
  17         (powerpc_dialect): Avoid aliasing warnings.
  18         (print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
  19
  20 2005-09-30  Nick Clifton  <nickc@redhat.com>
  21
  22         * po/ga.po: New Irish translation.
  23         * configure.in (ALL_LINGUAS): Add "ga".
  24         * configure: Regenerate.
  25
  26 2005-09-30  H.J. Lu  <hongjiu.lu@intel.com>
  27
  28         * Makefile.am: Run "make dep-am".
  29         * Makefile.in: Regenerated.
  30         * aclocal.m4: Likewise.
  31         * configure: Likewise.
  32
  33 2005-09-30  Catherine Moore  <clm@cm00re.com>
  34
  35         * Makefile.am: Bfin support.
  36         * Makefile.in: Regenerated.
  37         * aclocal.m4: Regenerated.
  38         * bfin-dis.c: New file.
  39         * configure.in: Bfin support.
  40         * configure: Regenerated.
  41         * disassemble.c (ARCH_bfin): Define.
  42         (disassembler): Add case for bfd_arch_bfin.
  43
  44 2005-09-28  Jan Beulich  <jbeulich@novell.com>
  45
  46         * i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
  47         (indirEv): Use it.
  48         (stackEv): New.
  49         (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
  50         (dis386): Document and use new 'V' meta character. Use it for
  51         single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
  52         opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
  53         (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
  54         data prefix as used whenever DFLAG was examined. Handle 'V'.
  55         (intel_operand_size): Use stack_v_mode.
  56         (OP_E): Use stack_v_mode, but handle only the special case of
  57         64-bit mode without operand size override here; fall through to
  58         v_mode case otherwise.
  59         (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
  60         and no operand size override is present.
  61         (OP_J): Use get32s for obtaining the displacement also when rex64
  62         is present.
  63
  64 2005-09-08  Paul Brook  <paul@codesourcery.com>
  65
  66         * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
  67
  68 2005-09-06  Chao-ying Fu  <fu@mips.com>
  69
  70         * mips-opc.c (MT32): New define.
  71         (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
  72         bottom to avoid opcode collision with "mftr" and "mttr".
  73         Add MT instructions.
  74         * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
  75         (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
  76         formats.
  77
  78 2005-09-02  Paul Brook  <paul@codesourcery.com>
  79
  80         * arm-dis.c (coprocessor_opcodes): Add null terminator.
  81
  82 2005-09-02  Paul Brook  <paul@codesourcery.com>
  83
  84         * arm-dis.c (coprocessor_opcodes): New.
  85         (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
  86         (print_insn_coprocessor): New function.
  87         (print_insn_arm): Use print_insn_coprocessor.  Remove coprocessor
  88         format characters.
  89         (print_insn_thumb32): Use print_insn_coprocessor.
  90
  91 2005-08-30  Paul Brook  <paul@codesourcery.com>
  92
  93         * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
  94
  95 2005-08-26  Jan Beulich  <jbeulich@novell.com>
  96
  97         * i386-dis.c (intel_operand_size): New, broken out from OP_E for
  98         re-use.
  99         (OP_E): Call intel_operand_size, move call site out of mode
 100         dependent code.
 101         (OP_OFF): Call intel_operand_size if suffix_always. Remove
 102         ATTRIBUTE_UNUSED from parameters.
 103         (OP_OFF64): Likewise.
 104         (OP_ESreg): Call intel_operand_size.
 105         (OP_DSreg): Likewise.
 106         (OP_DIR): Use colon rather than semicolon as separator of far
 107         jump/call operands.
 108
 109 2005-08-25  Chao-ying Fu  <fu@mips.com>
 110
 111         * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
 112         (mips_builtin_opcodes): Add DSP instructions.
 113         * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
 114         mips64, mips64r2.
 115         (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
 116         operand formats.
 117
 118 2005-08-23  David Ung  <davidu@mips.com>
 119
 120         * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
 121         instructions to the table.
 122
 123 2005-08-18  Alan Modra  <amodra@bigpond.net.au>
 124
 125         * a29k-dis.c: Delete.
 126         * Makefile.am: Remove a29k support.
 127         * configure.in: Likewise.
 128         * disassemble.c: Likewise.
 129         * Makefile.in: Regenerate.
 130         * configure: Regenerate.
 131         * po/POTFILES.in: Regenerate.
 132
 133 2005-08-15  Daniel Jacobowitz  <dan@codesourcery.com>
 134
 135         * ppc-dis.c (powerpc_dialect): Handle e300.
 136         (print_ppc_disassembler_options): Likewise.
 137         * ppc-opc.c (PPCE300): Define.
 138         (powerpc_opcodes): Mark icbt as available for the e300.
 139
 140 2005-08-13  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
 141
 142         * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
 143         Use "rp" instead of "%r2" in "b,l" insns.
 144
 145 2005-08-12 Martin Schwidefsky  <schwidefsky@de.ibm.com>
 146
 147         * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
 148         * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
 149         (main): Likewise.
 150         * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
 151         and 4 bit optional masks.
 152         (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
 153         INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
 154         (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
 155         MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
 156         (s390_opformats): Likewise.
 157         * s390-opc.txt: Add new instructions for cpu type z9-109.
 158
 159 2005-08-05  John David Anglin  <dave.anglin@nrc-crnc.gc.ca>
 160
 161         * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
 162
 163 2005-07-29  Paul Brook  <paul@codesourcery.com>
 164
 165         * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
 166
 167 2005-07-29  Paul Brook  <paul@codesourcery.com>
 168
 169         * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
 170         (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
 171
 172 2005-07-25  DJ Delorie  <dj@redhat.com>
 173
 174         * m32c-asm.c Regenerate.
 175         * m32c-dis.c Regenerate.
 176
 177 2005-07-20  DJ Delorie  <dj@redhat.com>
 178
 179         * disassemble.c (disassemble_init_for_target): M32C ISAs are
 180         enums, so convert them to bit masks, which attributes are.
 181
 182 2005-07-18  Nick Clifton  <nickc@redhat.com>
 183
 184         * configure.in: Restore alpha ordering to list of arches.
 185         * configure: Regenerate.
 186         * disassemble.c: Restore alpha ordering to list of arches.
 187
 188 2005-07-18  Nick Clifton  <nickc@redhat.com>
 189
 190         * m32c-asm.c: Regenerate.
 191         * m32c-desc.c: Regenerate.
 192         * m32c-desc.h: Regenerate.
 193         * m32c-dis.c: Regenerate.
 194         * m32c-ibld.h: Regenerate.
 195         * m32c-opc.c: Regenerate.
 196         * m32c-opc.h: Regenerate.
 197
 198 2005-07-18  H.J. Lu  <hongjiu.lu@intel.com>
 199
 200         * i386-dis.c (PNI_Fixup): Update comment.
 201         (VMX_Fixup): Properly handle the suffix check.
 202
 203 2005-07-16  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
 204
 205         * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
 206         mfctl disassembly.
 207
 208 2005-07-16  Alan Modra  <amodra@bigpond.net.au>
 209
 210         * Makefile.am: Run "make dep-am".
 211         (stamp-m32c): Fix cpu dependencies.
 212         * Makefile.in: Regenerate.
 213         * ip2k-dis.c: Regenerate.
 214
 215 2007-07-15  H.J. Lu <hongjiu.lu@intel.com>
 216
 217         * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
 218         (VMX_Fixup): New. Fix up Intel VMX Instructions.
 219         (Em): New.
 220         (Gm): New.
 221         (VM): New.
 222         (dis386_twobyte): Updated entries 0x78 and 0x79.
 223         (twobyte_has_modrm): Likewise.
 224         (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
 225         (OP_G): Handle m_mode.
 226
 227 2005-07-14  Jim Blandy  <jimb@redhat.com>
 228
 229         Add support for the Renesas M32C and M16C.
 230         * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
 231         * m32c-desc.h, m32c-opc.h: New.
 232         * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
 233         (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
 234         m32c-opc.c.
 235         (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
 236         m32c-ibld.lo, m32c-opc.lo.
 237         (CLEANFILES): List stamp-m32c.
 238         (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
 239         (CGEN_CPUS): Add m32c.
 240         (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
 241         (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
 242         (m32c_opc_h): New variable.
 243         (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
 244         (m32c-opc.lo): New rules.
 245         * Makefile.in: Regenerated.
 246         * configure.in: Add case for bfd_m32c_arch.
 247         * configure: Regenerated.
 248         * disassemble.c (ARCH_m32c): New.
 249         [ARCH_m32c]: #include "m32c-desc.h".
 250         (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
 251         (disassemble_init_for_target) [ARCH_m32c]: Same.
 252
 253         * cgen-ops.h, cgen-types.h: New files.
 254         * Makefile.am (HFILES): List them.
 255         * Makefile.in: Regenerated.
 256
 257 2005-07-07  Kaveh R. Ghazi  <ghazi@caip.rutgers.edu>
 258
 259         * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
 260         d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
 261         ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
 262         m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
 263         ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
 264         v850-dis.c: Fix format bugs.
 265         * ia64-gen.c (fail, warn): Add format attribute.
 266         * or32-opc.c (debug): Likewise.
 267
 268 2005-07-07  Khem Raj  <kraj@mvista.com>
 269
 270         * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
 271         disassembly pattern.
 272
 273 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 274
 275         * Makefile.am (stamp-m32r): Fix path to cpu files.
 276         (stamp-m32r, stamp-iq2000): Likewise.
 277         * Makefile.in: Regenerate.
 278         * m32r-asm.c: Regenerate.
 279         * po/POTFILES.in: Remove arm-opc.h.  Add ms1-asm.c, ms1-desc.c,
 280         ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
 281
 282 2005-07-05  Nick Clifton  <nickc@redhat.com>
 283
 284         * iq2000-asm.c: Regenerate.
 285         * ms1-asm.c: Regenerate.
 286
 287 2005-07-05  Jan Beulich  <jbeulich@novell.com>
 288
 289         * i386-dis.c (SVME_Fixup): New.
 290         (grps): Use it for the lidt entry.
 291         (PNI_Fixup): Call OP_M rather than OP_E.
 292         (INVLPG_Fixup): Likewise.
 293
 294 2005-07-04  H.J. Lu  <hongjiu.lu@intel.com>
 295
 296         * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
 297
 298 2005-07-01  Nick Clifton  <nickc@redhat.com>
 299
 300         * a29k-dis.c: Update to ISO C90 style function declarations and
 301         fix formatting.
 302         * alpha-opc.c: Likewise.
 303         * arc-dis.c: Likewise.
 304         * arc-opc.c: Likewise.
 305         * avr-dis.c: Likewise.
 306         * cgen-asm.in: Likewise.
 307         * cgen-dis.in: Likewise.
 308         * cgen-ibld.in: Likewise.
 309         * cgen-opc.c: Likewise.
 310         * cris-dis.c: Likewise.
 311         * d10v-dis.c: Likewise.
 312         * d30v-dis.c: Likewise.
 313         * d30v-opc.c: Likewise.
 314         * dis-buf.c: Likewise.
 315         * dlx-dis.c: Likewise.
 316         * h8300-dis.c: Likewise.
 317         * h8500-dis.c: Likewise.
 318         * hppa-dis.c: Likewise.
 319         * i370-dis.c: Likewise.
 320         * i370-opc.c: Likewise.
 321         * m10200-dis.c: Likewise.
 322         * m10300-dis.c: Likewise.
 323         * m68k-dis.c: Likewise.
 324         * m88k-dis.c: Likewise.
 325         * mips-dis.c: Likewise.
 326         * mmix-dis.c: Likewise.
 327         * msp430-dis.c: Likewise.
 328         * ns32k-dis.c: Likewise.
 329         * or32-dis.c: Likewise.
 330         * or32-opc.c: Likewise.
 331         * pdp11-dis.c: Likewise.
 332         * pj-dis.c: Likewise.
 333         * s390-dis.c: Likewise.
 334         * sh-dis.c: Likewise.
 335         * sh64-dis.c: Likewise.
 336         * sparc-dis.c: Likewise.
 337         * sparc-opc.c: Likewise.
 338         * sysdep.h: Likewise.
 339         * tic30-dis.c: Likewise.
 340         * tic4x-dis.c: Likewise.
 341         * tic80-dis.c: Likewise.
 342         * v850-dis.c: Likewise.
 343         * v850-opc.c: Likewise.
 344         * vax-dis.c: Likewise.
 345         * w65-dis.c: Likewise.
 346         * z8kgen.c: Likewise.
 347
 348         * fr30-*: Regenerate.
 349         * frv-*: Regenerate.
 350         * ip2k-*: Regenerate.
 351         * iq2000-*: Regenerate.
 352         * m32r-*: Regenerate.
 353         * ms1-*: Regenerate.
 354         * openrisc-*: Regenerate.
 355         * xstormy16-*: Regenerate.
 356
 357 2005-06-23  Ben Elliston  <bje@gnu.org>
 358
 359         * m68k-dis.c: Use ISC C90.
 360         * m68k-opc.c: Formatting fixes.
 361
 362 2005-06-16  David Ung  <davidu@mips.com>
 363
 364         * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
 365         instructions to the table; seb/seh/sew/zeb/zeh/zew.
 366
 367 2005-06-15  Dave Brolley  <brolley@redhat.com>
 368
 369         Contribute Morpho ms1 on behalf of Red Hat
 370         * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
 371         ms1-opc.h: New files, Morpho ms1 target.
 372
 373         2004-05-14  Stan Cox  <scox@redhat.com>
 374
 375         * disassemble.c (ARCH_ms1): Define.
 376         (disassembler): Handle bfd_arch_ms1
 377
 378         2004-05-13  Michael Snyder  <msnyder@redhat.com>
 379
 380         * Makefile.am, Makefile.in: Add ms1 target.
 381         * configure.in: Ditto.
 382
 383 2005-06-08  Zack Weinberg  <zack@codesourcery.com>
 384
 385         * arm-opc.h: Delete; fold contents into ...
 386         * arm-dis.c: ... here.  Move includes of internal COFF headers
 387         next to includes of internal ELF headers.
 388         (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
 389         (struct arm_opcode): Rename struct opcode32.  Make 'assembler' const.
 390         (struct thumb_opcode): Rename struct opcode16.  Make 'assembler' const.
 391         (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
 392         (iwmmxt_wwnames, iwmmxt_wwssnames):
 393         Make const.
 394         (regnames): Remove iWMMXt coprocessor register sets.
 395         (iwmmxt_regnames, iwmmxt_cregnames): New statics.
 396         (get_arm_regnames): Adjust fourth argument to match above changes.
 397         (set_iwmmxt_regnames): Delete.
 398         (print_insn_arm): Constify 'c'.  Use ISO syntax for function
 399         pointer calls.  Expand sole use of BDISP.  Use iwmmxt_regnames
 400         and iwmmxt_cregnames, not set_iwmmxt_regnames.
 401         (print_insn_thumb16, print_insn_thumb32): Constify 'c'.  Use
 402         ISO syntax for function pointer calls.
 403
 404 2005-06-07  Zack Weinberg  <zack@codesourcery.com>
 405
 406         * arm-dis.c: Split up the comments describing the format codes, so
 407         that the ARM and 16-bit Thumb opcode tables each have comments
 408         preceding them that describe all the codes, and only the codes,
 409         valid in those tables.  (32-bit Thumb table is already like this.)
 410         Reorder the lists in all three comments to match the order in
 411         which the codes are implemented.
 412         Remove all forward declarations of static functions.  Convert all
 413         function definitions to ISO C format.
 414         (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
 415         Return nothing.
 416         (print_insn_thumb16): Remove unused case 'I'.
 417         (print_insn): Update for changed calling convention of subroutines.
 418
 419 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 420
 421         * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
 422         hex (but retain it being displayed as signed). Remove redundant
 423         checks. Add handling of displacements for 16-bit addressing in Intel
 424         mode.
 425
 426 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 427
 428         * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
 429         (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
 430         masking of 'rm' in 16-bit memory address handling.
 431
 432 2005-05-19  Anton Blanchard  <anton@samba.org>
 433
 434         * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
 435         (print_ppc_disassembler_options): Document it.
 436         * ppc-opc.c (SVC_LEV): Define.
 437         (LEV): Allow optional operand.
 438         (POWER5): Define.
 439         (powerpc_opcodes): Extend "sc".  Adjust "svc" and "svcl".  Add
 440         "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
 441
 442 2005-05-19  Kelley Cook  <kcook@gcc.gnu.org>
 443
 444         * Makefile.in:  Regenerate.
 445
 446 2005-05-17  Zack Weinberg  <zack@codesourcery.com>
 447
 448         * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
 449         instructions.  Adjust disassembly of some opcodes to match
 450         unified syntax.
 451         (thumb32_opcodes): New table.
 452         (print_insn_thumb): Rename print_insn_thumb16; don't handle
 453         two-halfword branches here.
 454         (print_insn_thumb32): New function.
 455         (print_insn): Choose among print_insn_arm, print_insn_thumb16,
 456         and print_insn_thumb32.  Be consistent about order of
 457         halfwords when printing 32-bit instructions.
 458
 459 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 460
 461         PR 843
 462         * i386-dis.c (branch_v_mode): New.
 463         (indirEv): Use branch_v_mode instead of v_mode.
 464         (OP_E): Handle branch_v_mode.
 465
 466 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 467
 468         * d10v-dis.c (dis_2_short): Support 64bit host.
 469
 470 2005-05-07  Nick Clifton  <nickc@redhat.com>
 471
 472         * po/nl.po: Updated translation.
 473
 474 2005-05-07  Nick Clifton  <nickc@redhat.com>
 475
 476         * Update the address and phone number of the FSF organization in
 477         the GPL notices in the following files:
 478         a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
 479         arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
 480         avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
 481         cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
 482         crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
 483         d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
 484         fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
 485         fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
 486         frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
 487         h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
 488         i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
 489         ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
 490         ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
 491         ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
 492         ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
 493         iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
 494         iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
 495         m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
 496         m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
 497         m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
 498         maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
 499         mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
 500         openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
 501         openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
 502         or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
 503         pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
 504         s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
 505         sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
 506         tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
 507         v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
 508         xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
 509         xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
 510         xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
 511
 512 2005-05-05  James E Wilson  <wilson@specifixinc.com>
 513
 514         * ia64-opc.c: Include sysdep.h before libiberty.h.
 515
 516 2005-05-05  Nick Clifton  <nickc@redhat.com>
 517
 518         * configure.in (ALL_LINGUAS): Add vi.
 519         * configure: Regenerate.
 520         * po/vi.po: New.
 521
 522 2005-04-26  Jerome Guitton  <guitton@gnat.com>
 523
 524         * configure.in: Fix the check for basename declaration.
 525         * configure: Regenerate.
 526
 527 2005-04-19  Alan Modra  <amodra@bigpond.net.au>
 528
 529         * ppc-opc.c (RTO): Define.
 530         (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
 531         entries to suit PPC440.
 532
 533 2005-04-18  Mark Kettenis  <kettenis@gnu.org>
 534
 535         * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
 536         Add xcrypt-ctr.
 537
 538 2005-04-14  Nick Clifton  <nickc@redhat.com>
 539
 540         * po/fi.po: New translation: Finnish.
 541         * configure.in (ALL_LINGUAS): Add fi.
 542         * configure: Regenerate.
 543
 544 2005-04-14  Alan Modra  <amodra@bigpond.net.au>
 545
 546         * Makefile.am (NO_WERROR): Define.
 547         * configure.in: Invoke AM_BINUTILS_WARNINGS.
 548         * Makefile.in: Regenerate.
 549         * aclocal.m4: Regenerate.
 550         * configure: Regenerate.
 551
 552 2005-04-04  Nick Clifton  <nickc@redhat.com>
 553
 554         * fr30-asm.c: Regenerate.
 555         * frv-asm.c: Regenerate.
 556         * iq2000-asm.c: Regenerate.
 557         * m32r-asm.c: Regenerate.
 558         * openrisc-asm.c: Regenerate.
 559
 560 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 561
 562         * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
 563         visible operands in Intel mode. The first operand of monitor is
 564         %rax in 64-bit mode.
 565
 566 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 567
 568         * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
 569         easier future additions.
 570
 571 2005-03-31  Jerome Guitton  <guitton@gnat.com>
 572
 573         * configure.in: Check for basename.
 574         * configure: Regenerate.
 575         * config.in: Ditto.
 576
 577 2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>
 578
 579         * i386-dis.c (SEG_Fixup): New.
 580         (Sv): New.
 581         (dis386): Use "Sv" for 0x8c and 0x8e.
 582
 583 2005-03-21  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 584             Nick Clifton  <nickc@redhat.com>
 585
 586         * vax-dis.c: (entry_addr): New varible:  An array of user supplied
 587         function entry mask addresses.
 588         (entry_addr_occupied_slots): New variable: The number of occupied
 589         elements in entry_addr.
 590         (entry_addr_total_slots): New variable: The total number of
 591         elements in entry_addr.
 592         (parse_disassembler_options): New function.  Fills in the entry_addr
 593         array.
 594         (free_entry_array): New function.  Release the memory used by the
 595         entry addr array.  Suppressed because there is no way to call it.
 596         (is_function_entry): Check if a given address is a function's
 597         start address by looking at supplied entry mask addresses and
 598         symbol information, if available.
 599         (print_insn_vax): Use parse_disassembler_options and is_function_entry.
 600
 601 2005-03-23  H.J. Lu  <hongjiu.lu@intel.com>
 602
 603         * cris-dis.c (print_with_operands): Use ~31L for long instead
 604         of ~31.
 605
 606 2005-03-20  H.J. Lu  <hongjiu.lu@intel.com>
 607
 608         * mmix-opc.c (O): Revert the last change.
 609         (Z): Likewise.
 610
 611 2005-03-19  H.J. Lu  <hongjiu.lu@intel.com>
 612
 613         * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
 614         (Z): Likewise.
 615
 616 2005-03-19  Hans-Peter Nilsson  <hp@bitrange.com>
 617
 618         * mmix-opc.c (O, Z): Force expression as unsigned long.
 619
 620 2005-03-18  Nick Clifton  <nickc@redhat.com>
 621
 622         * ip2k-asm.c: Regenerate.
 623         * op/opcodes.pot: Regenerate.
 624
 625 2005-03-16  Nick Clifton  <nickc@redhat.com>
 626             Ben Elliston  <bje@au.ibm.com>
 627
 628         * configure.in (werror): New switch: Add -Werror to the
 629         compiler command line.  Enabled by default.  Disable via
 630         --disable-werror.
 631         * configure: Regenerate.
 632
 633 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
 634
 635         * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
 636         BOOKE.
 637
 638 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
 639
 640         * po/es.po: Commit new Spanish translation.
 641
 642         * po/fr.po: Commit new French translation.
 643
 644 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 645
 646         * vax-dis.c: Fix spelling error
 647         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
 648         of just "Entry mask: < r1 ... >"
 649
 650 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
 651
 652         * arm-dis.c (arm_opcodes): Document %E and %V.
 653         Add entries for v6T2 ARM instructions:
 654         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
 655         (print_insn_arm): Add support for %E and %V.
 656         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
 657
 658 2005-03-10  Jeff Baker  <jbaker@qnx.com>
 659             Alan Modra  <amodra@bigpond.net.au>
 660
 661         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
 662         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
 663         (SPRG_MASK): Delete.
 664         (XSPRG_MASK): Mask off extra bits now part of sprg field.
 665         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
 666         mfsprg4..7 after msprg and consolidate.
 667
 668 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 669
 670         * vax-dis.c (entry_mask_bit): New array.
 671         (print_insn_vax): Decode function entry mask.
 672
 673 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
 674
 675         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
 676
 677 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
 678
 679         * po/opcodes.pot: Regenerate.
 680
 681 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
 682
 683         * arc-dis.c (a4_decoding_class): New enum.
 684         (dsmOneArcInst): Use the enum values for the decoding class.
 685         Remove redundant case in the switch for decodingClass value 11.
 686
 687 2005-03-02  Jan Beulich  <jbeulich@novell.com>
 688
 689         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
 690         accesses.
 691         (OP_C): Consider lock prefix in non-64-bit modes.
 692
 693 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 694
 695         * cris-dis.c (format_hex): Remove ineffective warning fix.
 696         * crx-dis.c (make_instruction): Warning fix.
 697         * frv-asm.c: Regenerate.
 698
 699 2005-02-23  Nick Clifton  <nickc@redhat.com>
 700
 701         * cgen-dis.in: Use bfd_byte for buffers that are passed to
 702         read_memory.
 703
 704         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
 705
 706         * crx-dis.c (make_instruction): Move argument structure into inner
 707         scope and ensure that all of its fields are initialised before
 708         they are used.
 709
 710         * fr30-asm.c: Regenerate.
 711         * fr30-dis.c: Regenerate.
 712         * frv-asm.c: Regenerate.
 713         * frv-dis.c: Regenerate.
 714         * ip2k-asm.c: Regenerate.
 715         * ip2k-dis.c: Regenerate.
 716         * iq2000-asm.c: Regenerate.
 717         * iq2000-dis.c: Regenerate.
 718         * m32r-asm.c: Regenerate.
 719         * m32r-dis.c: Regenerate.
 720         * openrisc-asm.c: Regenerate.
 721         * openrisc-dis.c: Regenerate.
 722         * xstormy16-asm.c: Regenerate.
 723         * xstormy16-dis.c: Regenerate.
 724
 725 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 726
 727         * arc-ext.c: Warning fixes.
 728         * arc-ext.h: Likewise.
 729         * cgen-opc.c: Likewise.
 730         * ia64-gen.c: Likewise.
 731         * maxq-dis.c: Likewise.
 732         * ns32k-dis.c: Likewise.
 733         * w65-dis.c: Likewise.
 734         * ia64-asmtab.c: Regenerate.
 735
 736 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 737
 738         * fr30-desc.c: Regenerate.
 739         * fr30-desc.h: Regenerate.
 740         * fr30-opc.c: Regenerate.
 741         * fr30-opc.h: Regenerate.
 742         * frv-desc.c: Regenerate.
 743         * frv-desc.h: Regenerate.
 744         * frv-opc.c: Regenerate.
 745         * frv-opc.h: Regenerate.
 746         * ip2k-desc.c: Regenerate.
 747         * ip2k-desc.h: Regenerate.
 748         * ip2k-opc.c: Regenerate.
 749         * ip2k-opc.h: Regenerate.
 750         * iq2000-desc.c: Regenerate.
 751         * iq2000-desc.h: Regenerate.
 752         * iq2000-opc.c: Regenerate.
 753         * iq2000-opc.h: Regenerate.
 754         * m32r-desc.c: Regenerate.
 755         * m32r-desc.h: Regenerate.
 756         * m32r-opc.c: Regenerate.
 757         * m32r-opc.h: Regenerate.
 758         * m32r-opinst.c: Regenerate.
 759         * openrisc-desc.c: Regenerate.
 760         * openrisc-desc.h: Regenerate.
 761         * openrisc-opc.c: Regenerate.
 762         * openrisc-opc.h: Regenerate.
 763         * xstormy16-desc.c: Regenerate.
 764         * xstormy16-desc.h: Regenerate.
 765         * xstormy16-opc.c: Regenerate.
 766         * xstormy16-opc.h: Regenerate.
 767
 768 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
 769
 770         * Makefile.am: Run "make dep-am"
 771         * Makefile.in: Regenerate.
 772
 773 2005-02-15  Nick Clifton  <nickc@redhat.com>
 774
 775         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
 776         compile time warnings.
 777         (print_keyword): Likewise.
 778         (default_print_insn): Likewise.
 779
 780         * fr30-desc.c: Regenerated.
 781         * fr30-desc.h: Regenerated.
 782         * fr30-dis.c: Regenerated.
 783         * fr30-opc.c: Regenerated.
 784         * fr30-opc.h: Regenerated.
 785         * frv-desc.c: Regenerated.
 786         * frv-dis.c: Regenerated.
 787         * frv-opc.c: Regenerated.
 788         * ip2k-asm.c: Regenerated.
 789         * ip2k-desc.c: Regenerated.
 790         * ip2k-desc.h: Regenerated.
 791         * ip2k-dis.c: Regenerated.
 792         * ip2k-opc.c: Regenerated.
 793         * ip2k-opc.h: Regenerated.
 794         * iq2000-desc.c: Regenerated.
 795         * iq2000-dis.c: Regenerated.
 796         * iq2000-opc.c: Regenerated.
 797         * m32r-asm.c: Regenerated.
 798         * m32r-desc.c: Regenerated.
 799         * m32r-desc.h: Regenerated.
 800         * m32r-dis.c: Regenerated.
 801         * m32r-opc.c: Regenerated.
 802         * m32r-opc.h: Regenerated.
 803         * m32r-opinst.c: Regenerated.
 804         * openrisc-desc.c: Regenerated.
 805         * openrisc-desc.h: Regenerated.
 806         * openrisc-dis.c: Regenerated.
 807         * openrisc-opc.c: Regenerated.
 808         * openrisc-opc.h: Regenerated.
 809         * xstormy16-desc.c: Regenerated.
 810         * xstormy16-desc.h: Regenerated.
 811         * xstormy16-dis.c: Regenerated.
 812         * xstormy16-opc.c: Regenerated.
 813         * xstormy16-opc.h: Regenerated.
 814
 815 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 816
 817         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 818         address.
 819
 820 2005-02-11  Nick Clifton  <nickc@redhat.com>
 821
 822         * iq2000-asm.c: Regenerate.
 823
 824         * frv-dis.c: Regenerate.
 825
 826 2005-02-07  Jim Blandy  <jimb@redhat.com>
 827
 828         * Makefile.am (CGEN): Load guile.scm before calling the main
 829         application script.
 830         * Makefile.in: Regenerated.
 831         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 832         Simply pass the cgen-opc.scm path to ${cgen} as its first
 833         argument; ${cgen} itself now contains the '-s', or whatever is
 834         appropriate for the Scheme being used.
 835
 836 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 837
 838         * configure: Regenerate to track ../gettext.m4.
 839
 840 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 841
 842         * ia64-gen.c (NELEMS): Define.
 843         (shrink): Generate alias with missing second predicate register when
 844         opcode has two outputs and these are both predicates.
 845         * ia64-opc-i.c (FULL17): Define.
 846         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 847         here to generate output template.
 848         (TBITCM, TNATCM): Undefine after use.
 849         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 850         first input. Add ld16 aliases without ar.csd as second output. Add
 851         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 852         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 853         ar.ccv as third/fourth inputs. Consolidate through...
 854         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 855         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 856         * ia64-asmtab.c: Regenerate.
 857
 858 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 859
 860         * configure: Regenerate to track ../gettext.m4 change.
 861
 862 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 863
 864         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 865         * frv-asm.c: Rebuilt.
 866         * frv-desc.c: Rebuilt.
 867         * frv-desc.h: Rebuilt.
 868         * frv-dis.c: Rebuilt.
 869         * frv-ibld.c: Rebuilt.
 870         * frv-opc.c: Rebuilt.
 871         * frv-opc.h: Rebuilt.
 872
 873 2005-01-24  Andrew Cagney  <cagney@gnu.org>
 874
 875         * configure: Regenerate, ../gettext.m4 was updated.
 876
 877 2005-01-21  Fred Fish  <fnf@specifixinc.com>
 878
 879         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
 880         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
 881         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
 882         * mips-dis.c: Ditto.
 883
 884 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
 885
 886         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
 887
 888 2005-01-19  Fred Fish  <fnf@specifixinc.com>
 889
 890         * mips-dis.c (no_aliases): New disassembly option flag.
 891         (set_default_mips_dis_options): Init no_aliases to zero.
 892         (parse_mips_dis_option): Handle no-aliases option.
 893         (print_insn_mips): Ignore table entries that are aliases
 894         if no_aliases is set.
 895         (print_insn_mips16): Ditto.
 896         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
 897         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
 898         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
 899         * mips16-opc.c (mips16_opcodes): Ditto.
 900
 901 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
 902
 903         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
 904         (inheritance diagram): Add missing edge.
 905         (arch_sh1_up): Rename arch_sh_up to match external name to make life
 906         easier for the testsuite.
 907         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
 908         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
 909         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
 910         arch_sh2a_or_sh4_up child.
 911         (sh_table): Do renaming as above.
 912         Correct comment for ldc.l for gas testsuite to read.
 913         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
 914         Correct comments for movy.w and movy.l for gas testsuite to read.
 915         Correct comments for fmov.d and fmov.s for gas testsuite to read.
 916
 917 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 918
 919         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
 920
 921 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 922
 923         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
 924
 925 2005-01-10  Andreas Schwab  <schwab@suse.de>
 926
 927         * disassemble.c (disassemble_init_for_target) <case
 928         bfd_arch_ia64>: Set skip_zeroes to 16.
 929         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
 930
 931 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
 932
 933         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
 934
 935 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
 936
 937         * avr-dis.c: Prettyprint. Added printing of symbol names in all
 938         memory references. Convert avr_operand() to C90 formatting.
 939
 940 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
 941
 942         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
 943
 944 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
 945
 946         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
 947         (no_op_insn): Initialize array with instructions that have no
 948         operands.
 949         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
 950
 951 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
 952
 953         * arm-dis.c: Correct top-level comment.
 954
 955 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
 956
 957         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
 958         architecuture defining the insn.
 959         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
 960         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
 961         field.
 962         Also include opcode/arm.h.
 963         * Makefile.am (arm-dis.lo): Update dependency list.
 964         * Makefile.in: Regenerate.
 965
 966 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
 967
 968         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
 969         reflect the change to the short immediate syntax.
 970
 971 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
 972
 973         * or32-opc.c (debug): Warning fix.
 974         * po/POTFILES.in: Regenerate.
 975
 976         * maxq-dis.c: Formatting.
 977         (print_insn): Warning fix.
 978
 979 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
 980
 981         * arm-dis.c (WORD_ADDRESS): Define.
 982         (print_insn): Use it.  Correct big-endian end-of-section handling.
 983
 984 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
 985             Vineet Sharma      <vineets@noida.hcltech.com>
 986
 987         * maxq-dis.c: New file.
 988         * disassemble.c (ARCH_maxq): Define.
 989         (disassembler): Add 'print_insn_maxq_little' for handling maxq
 990         instructions..
 991         * configure.in: Add case for bfd_maxq_arch.
 992         * configure: Regenerate.
 993         * Makefile.am: Add support for maxq-dis.c
 994         * Makefile.in: Regenerate.
 995         * aclocal.m4: Regenerate.
 996
 997 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
 998
 999         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
1000         mode.
1001         * crx-dis.c: Likewise.
1002
1003 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
1004
1005         Generally, handle CRISv32.
1006         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
1007         (struct cris_disasm_data): New type.
1008         (format_reg, format_hex, cris_constraint, print_flags)
1009         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
1010         callers changed.
1011         (format_sup_reg, print_insn_crisv32_with_register_prefix)
1012         (print_insn_crisv32_without_register_prefix)
1013         (print_insn_crisv10_v32_with_register_prefix)
1014         (print_insn_crisv10_v32_without_register_prefix)
1015         (cris_parse_disassembler_options): New functions.
1016         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
1017         parameter.  All callers changed.
1018         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
1019         failure.
1020         (cris_constraint) <case 'Y', 'U'>: New cases.
1021         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
1022         for constraint 'n'.
1023         (print_with_operands) <case 'Y'>: New case.
1024         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
1025         <case 'N', 'Y', 'Q'>: New cases.
1026         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
1027         (print_insn_cris_with_register_prefix)
1028         (print_insn_cris_without_register_prefix): Call
1029         cris_parse_disassembler_options.
1030         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
1031         for CRISv32 and the size of immediate operands.  New v32-only
1032         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
1033         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
1034         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
1035         Change brp to be v3..v10.
1036         (cris_support_regs): New vector.
1037         (cris_opcodes): Update head comment.  New format characters '[',
1038         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
1039         Add new opcodes for v32 and adjust existing opcodes to accommodate
1040         differences to earlier variants.
1041         (cris_cond15s): New vector.
1042
1043 2004-11-04 Jan Beulich <jbeulich@novell.com>
1044
1045         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
1046         (indirEb): Remove.
1047         (Mp): Use f_mode rather than none at all.
1048         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
1049         replaces what previously was x_mode; x_mode now means 128-bit SSE
1050         operands.
1051         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
1052         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
1053         pinsrw's second operand is Edqw.
1054         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
1055         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
1056         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
1057         mode when an operand size override is present or always suffixing.
1058         More instructions will need to be added to this group.
1059         (putop): Handle new macro chars 'C' (short/long suffix selector),
1060         'I' (Intel mode override for following macro char), and 'J' (for
1061         adding the 'l' prefix to far branches in AT&T mode). When an
1062         alternative was specified in the template, honor macro character when
1063         specified for Intel mode.
1064         (OP_E): Handle new *_mode values. Correct pointer specifications for
1065         memory operands. Consolidate output of index register.
1066         (OP_G): Handle new *_mode values.
1067         (OP_I): Handle const_1_mode.
1068         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
1069         respective opcode prefix bits have been consumed.
1070         (OP_EM, OP_EX): Provide some default handling for generating pointer
1071         specifications.
1072
1073 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
1074
1075         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
1076         COP_INST macro.
1077
1078 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
1079
1080         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
1081         (getregliststring): Support HI/LO and user registers.
1082         * crx-opc.c (crx_instruction): Update data structure according to the
1083         rearrangement done in CRX opcode header file.
1084         (crx_regtab):  Likewise.
1085         (crx_optab):  Likewise.
1086         (crx_instruction): Reorder load/stor instructions, remove unsupported
1087         formats.
1088         support new Co-Processor instruction 'cpi'.
1089
1090 2004-10-27  Nick Clifton  <nickc@redhat.com>
1091
1092         * opcodes/iq2000-asm.c: Regenerate.
1093         * opcodes/iq2000-desc.c: Regenerate.
1094         * opcodes/iq2000-desc.h: Regenerate.
1095         * opcodes/iq2000-dis.c: Regenerate.
1096         * opcodes/iq2000-ibld.c: Regenerate.
1097         * opcodes/iq2000-opc.c: Regenerate.
1098         * opcodes/iq2000-opc.h: Regenerate.
1099
1100 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
1101
1102         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1103         us4, us5 (respectively).
1104         Remove unsupported 'popa' instruction.
1105         Reverse operands order in store co-processor instructions.
1106
1107 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
1108
1109         * Makefile.am: Run "make dep-am"
1110         * Makefile.in: Regenerate.
1111
1112 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
1113
1114         * xtensa-dis.c: Use ISO C90 formatting.
1115
1116 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
1117
1118         * ppc-opc.c: Revert 2004-09-09 change.
1119
1120 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
1121
1122         * xtensa-dis.c (state_names): Delete.
1123         (fetch_data): Use xtensa_isa_maxlength.
1124         (print_xtensa_operand): Replace operand parameter with opcode/operand
1125         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
1126         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
1127         instruction bundles.  Use xmalloc instead of malloc.
1128
1129 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
1130
1131         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1132         initializers.
1133
1134 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
1135
1136         * crx-opc.c (crx_instruction): Support Co-processor insns.
1137         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1138         (getregliststring): Change function to use the above enum.
1139         (print_arg): Handle CO-Processor insns.
1140         (crx_cinvs): Add 'b' option to invalidate the branch-target
1141         cache.
1142
1143 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
1144
1145         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1146         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1147         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1148         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1149         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1150
1151 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
1152
1153         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1154         rather than add it.
1155
1156 2004-09-30  Paul Brook  <paul@codesourcery.com>
1157
1158         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1159         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
1160
1161 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
1162
1163         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1164         (CONFIG_STATUS_DEPENDENCIES): New.
1165         (Makefile): Removed.
1166         (config.status): Likewise.
1167         * Makefile.in: Regenerated.
1168
1169 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
1170
1171         * Makefile.am: Run "make dep-am".
1172         * Makefile.in: Regenerate.
1173         * aclocal.m4: Regenerate.
1174         * configure: Regenerate.
1175         * po/POTFILES.in: Regenerate.
1176         * po/opcodes.pot: Regenerate.
1177
1178 2004-09-11  Andreas Schwab  <schwab@suse.de>
1179
1180         * configure: Rebuild.
1181
1182 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
1183
1184         * ppc-opc.c (L): Make this field not optional.
1185
1186 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
1187
1188         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1189         Fix parameter to 'm[t|f]csr' insns.
1190
1191 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
1192
1193         * configure.in: Autoupdate to autoconf 2.59.
1194         * aclocal.m4: Rebuild with aclocal 1.4p6.
1195         * configure: Rebuild with autoconf 2.59.
1196         * Makefile.in: Rebuild with automake 1.4p6 (picking up
1197         bfd changes for autoconf 2.59 on the way).
1198         * config.in: Rebuild with autoheader 2.59.
1199
1200 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
1201
1202         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1203
1204 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
1205
1206         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1207         (GRPPADLCK2): New define.
1208         (twobyte_has_modrm): True for 0xA6.
1209         (grps): GRPPADLCK2 for opcode 0xA6.
1210
1211 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
1212
1213         Introduce SH2a support.
1214         * sh-opc.h (arch_sh2a_base): Renumber.
1215         (arch_sh2a_nofpu_base): Remove.
1216         (arch_sh_base_mask): Adjust.
1217         (arch_opann_mask): New.
1218         (arch_sh2a, arch_sh2a_nofpu): Adjust.
1219         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1220         (sh_table): Adjust whitespace.
1221         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
1222         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
1223         instruction list throughout.
1224         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
1225         of arch_sh2a in instruction list throughout.
1226         (arch_sh2e_up): Accomodate above changes.
1227         (arch_sh2_up): Ditto.
1228         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
1229         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1230         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
1231         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1232         * sh-opc.h (arch_sh2a_nofpu): New.
1233         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1234         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1235         instruction.
1236         2004-01-20  DJ Delorie  <dj@redhat.com>
1237         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1238         2003-12-29  DJ Delorie  <dj@redhat.com>
1239         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1240         sh_opcode_info, sh_table): Add sh2a support.
1241         (arch_op32): New, to tag 32-bit opcodes.
1242         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1243         2003-12-02  Michael Snyder  <msnyder@redhat.com>
1244         * sh-opc.h (arch_sh2a): Add.
1245         * sh-dis.c (arch_sh2a): Handle.
1246         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1247
1248 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
1249
1250         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1251
1252 2004-07-22  Nick Clifton  <nickc@redhat.com>
1253
1254         PR/280
1255         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1256         insns - this is done by objdump itself.
1257         * h8500-dis.c (print_insn_h8500): Likewise.
1258
1259 2004-07-21  Jan Beulich <jbeulich@novell.com>
1260
1261         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1262         regardless of address size prefix in effect.
1263         (ptr_reg): Size or address registers does not depend on rex64, but
1264         on the presence of an address size override.
1265         (OP_MMX): Use rex.x only for xmm registers.
1266         (OP_EM): Use rex.z only for xmm registers.
1267
1268 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1269
1270         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1271         move/branch operations to the bottom so that VR5400 multimedia
1272         instructions take precedence in disassembly.
1273
1274 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1275
1276         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1277         ISA-specific "break" encoding.
1278
1279 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
1280
1281         * arm-opc.h: Fix typo in comment.
1282
1283 2004-07-11  Andreas Schwab  <schwab@suse.de>
1284
1285         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1286
1287 2004-07-09  Andreas Schwab  <schwab@suse.de>
1288
1289         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1290
1291 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
1292
1293         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1294         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1295         (crx-dis.lo): New target.
1296         (crx-opc.lo): Likewise.
1297         * Makefile.in: Regenerate.
1298         * configure.in: Handle bfd_crx_arch.
1299         * configure: Regenerate.
1300         * crx-dis.c: New file.
1301         * crx-opc.c: New file.
1302         * disassemble.c (ARCH_crx): Define.
1303         (disassembler): Handle ARCH_crx.
1304
1305 2004-06-29  James E Wilson  <wilson@specifixinc.com>
1306
1307         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1308         * ia64-asmtab.c: Regnerate.
1309
1310 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
1311
1312         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1313         (extract_fxm): Don't test dialect.
1314         (XFXFXM_MASK): Include the power4 bit.
1315         (XFXM): Add p4 param.
1316         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
1317
1318 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
1319
1320         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
1321         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1322
1323 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
1324
1325         * ppc-opc.c (BH, XLBH_MASK): Define.
1326         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1327
1328 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
1329
1330         * i386-dis.c (x_mode): Comment.
1331         (two_source_ops): File scope.
1332         (float_mem): Correct fisttpll and fistpll.
1333         (float_mem_mode): New table.
1334         (dofloat): Use it.
1335         (OP_E): Correct intel mode PTR output.
1336         (ptr_reg): Use open_char and close_char.
1337         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
1338         operands.  Set two_source_ops.
1339
1340 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
1341
1342         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1343         instead of _raw_size.
1344
1345 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
1346
1347         * ia64-gen.c (in_iclass): Handle more postinc st
1348         and ld variants.
1349         * ia64-asmtab.c: Rebuilt.
1350
1351 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
1352
1353         * s390-opc.txt: Correct architecture mask for some opcodes.
1354         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1355         in the esa mode as well.
1356
1357 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
1358
1359         * sh-dis.c (target_arch): Make unsigned.
1360         (print_insn_sh): Replace (most of) switch with a call to
1361         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1362         * sh-opc.h: Redefine architecture flags values.
1363         Add sh3-nommu architecture.
1364         Reorganise <arch>_up macros so they make more visual sense.
1365         (SH_MERGE_ARCH_SET): Define new macro.
1366         (SH_VALID_BASE_ARCH_SET): Likewise.
1367         (SH_VALID_MMU_ARCH_SET): Likewise.
1368         (SH_VALID_CO_ARCH_SET): Likewise.
1369         (SH_VALID_ARCH_SET): Likewise.
1370         (SH_MERGE_ARCH_SET_VALID): Likewise.
1371         (SH_ARCH_SET_HAS_FPU): Likewise.
1372         (SH_ARCH_SET_HAS_DSP): Likewise.
1373         (SH_ARCH_UNKNOWN_ARCH): Likewise.
1374         (sh_get_arch_from_bfd_mach): Add prototype.
1375         (sh_get_arch_up_from_bfd_mach): Likewise.
1376         (sh_get_bfd_mach_from_arch_set): Likewise.
1377         (sh_merge_bfd_arc): Likewise.
1378
1379 2004-05-24  Peter Barada  <peter@the-baradas.com>
1380
1381         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1382         into new match_insn_m68k function.  Loop over canidate
1383         matches and select first that completely matches.
1384         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1385         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1386         to verify addressing for MAC/EMAC.
1387         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1388         reigster halves since 'fpu' and 'spl' look misleading.
1389         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1390         * m68k-opc.c: Rearragne mac/emac cases to use longest for
1391         first, tighten up match masks.
1392         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
1393         'size' from special case code in print_insn_m68k to
1394         determine decode size of insns.
1395
1396 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
1397
1398         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1399         well as when -mpower4.
1400
1401 2004-05-13  Nick Clifton  <nickc@redhat.com>
1402
1403         * po/fr.po: Updated French translation.
1404
1405 2004-05-05  Peter Barada  <peter@the-baradas.com>
1406
1407         * m68k-dis.c(print_insn_m68k): Add new chips, use core
1408         variants in arch_mask.  Only set m68881/68851 for 68k chips.
1409         * m68k-op.c: Switch from ColdFire chips to core variants.
1410
1411 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
1412
1413         PR 147.
1414         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1415
1416 2004-04-29  Ben Elliston  <bje@au.ibm.com>
1417
1418         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1419         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1420
1421 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
1422
1423         * sh-dis.c (print_insn_sh): Print the value in constant pool
1424         as a symbol if it looks like a symbol.
1425
1426 2004-04-22  Peter Barada <peter@the-baradas.com>
1427
1428         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1429         appropriate ColdFire architectures.
1430         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1431         mask addressing.
1432         Add EMAC instructions, fix MAC instructions. Remove
1433         macmw/macml/msacmw/msacml instructions since mask addressing now
1434         supported.
1435
1436 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
1437
1438         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1439         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1440         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
1441         macro.  Adjust all users.
1442
1443 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
1444
1445         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1446         separately.
1447
1448 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1449
1450         * m32r-asm.c: Regenerate.
1451
1452 2004-03-29  Stan Shebs  <shebs@apple.com>
1453
1454         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1455         used.
1456
1457 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
1458
1459         * aclocal.m4: Regenerate.
1460         * config.in: Regenerate.
1461         * configure: Regenerate.
1462         * po/POTFILES.in: Regenerate.
1463         * po/opcodes.pot: Regenerate.
1464
1465 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
1466
1467         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
1468         PPC_OPERANDS_GPR_0.
1469         * ppc-opc.c (RA0): Define.
1470         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1471         (RAOPT): Rename from RAO.  Update all uses.
1472         (powerpc_opcodes): Use RA0 as appropriate.
1473
1474 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
1475
1476         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1477
1478 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
1479
1480         * sparc-dis.c (print_insn_sparc): Update getword prototype.
1481
1482 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1483
1484         * i386-dis.c (GRPPLOCK): Delete.
1485         (grps): Delete GRPPLOCK entry.
1486
1487 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1488
1489         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1490         (M, Mp): Use OP_M.
1491         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1492         (GRPPADLCK): Define.
1493         (dis386): Use NOP_Fixup on "nop".
1494         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1495         (twobyte_has_modrm): Set for 0xa7.
1496         (padlock_table): Delete.  Move to..
1497         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
1498         and clflush.
1499         (print_insn): Revert PADLOCK_SPECIAL code.
1500         (OP_E): Delete sfence, lfence, mfence checks.
1501
1502 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
1503
1504         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1505         (INVLPG_Fixup): New function.
1506         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1507
1508 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1509
1510         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1511         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1512         (padlock_table): New struct with PadLock instructions.
1513         (print_insn): Handle PADLOCK_SPECIAL.
1514
1515 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1516
1517         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1518         (OP_E): Twiddle clflush to sfence here.
1519
1520 2004-03-08  Nick Clifton  <nickc@redhat.com>
1521
1522         * po/de.po: Updated German translation.
1523
1524 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
1525
1526         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1527         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
1528         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1529         accordingly.
1530
1531 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1532
1533         * frv-asm.c: Regenerate.
1534         * frv-desc.c: Regenerate.
1535         * frv-desc.h: Regenerate.
1536         * frv-dis.c: Regenerate.
1537         * frv-ibld.c: Regenerate.
1538         * frv-opc.c: Regenerate.
1539         * frv-opc.h: Regenerate.
1540
1541 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1542
1543         * frv-desc.c, frv-opc.c: Regenerate.
1544
1545 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1546
1547         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1548
1549 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
1550
1551         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1552         Also correct mistake in the comment.
1553
1554 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
1555
1556         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1557         ensure that double registers have even numbers.
1558         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1559         that reserved instruction 0xfffd does not decode the same
1560         as 0xfdfd (ftrv).
1561         * sh-opc.h: Add REG_N_D nibble type and use it whereever
1562         REG_N refers to a double register.
1563         Add REG_N_B01 nibble type and use it instead of REG_NM
1564         in ftrv.
1565         Adjust the bit patterns in a few comments.
1566
1567 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
1568
1569         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1570
1571 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1572
1573         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1574
1575 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1576
1577         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1578
1579 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1580
1581         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1582         mtivor32, mtivor33, mtivor34.
1583
1584 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
1585
1586         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1587
1588 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
1589
1590         * arm-opc.h Maverick accumulator register opcode fixes.
1591
1592 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
1593
1594         * m32r-dis.c: Regenerate.
1595
1596 2004-01-27  Michael Snyder  <msnyder@redhat.com>
1597
1598         * sh-opc.h (sh_table): "fsrra", not "fssra".
1599
1600 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
1601
1602         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1603         contraints.
1604
1605 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
1606
1607         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1608
1609 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
1610
1611         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1612         1.  Don't print scale factor on AT&T mode when index missing.
1613
1614 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
1615
1616         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1617         when loaded into XR registers.
1618
1619 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1620
1621         * frv-desc.h: Regenerate.
1622         * frv-desc.c: Regenerate.
1623         * frv-opc.c: Regenerate.
1624
1625 2004-01-13  Michael Snyder  <msnyder@redhat.com>
1626
1627         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1628
1629 2004-01-09  Paul Brook  <paul@codesourcery.com>
1630
1631         * arm-opc.h (arm_opcodes): Move generic mcrr after known
1632         specific opcodes.
1633
1634 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
1635
1636         * Makefile.am (libopcodes_la_DEPENDENCIES)
1637         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1638         comment about the problem.
1639         * Makefile.in: Regenerate.
1640
1641 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1642
1643         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1644         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1645         cut&paste errors in shifting/truncating numerical operands.
1646         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1647         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1648         (parse_uslo16): Likewise.
1649         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1650         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1651         (parse_s12): Likewise.
1652         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1653         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1654         (parse_uslo16): Likewise.
1655         (parse_uhi16): Parse gothi and gotfuncdeschi.
1656         (parse_d12): Parse got12 and gotfuncdesc12.
1657         (parse_s12): Likewise.
1658
1659 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1660
1661         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1662         instruction which looks similar to an 'rla' instruction.
1663
1664 For older changes see ChangeLog-0203
1665 \f
1666 Local Variables:
1667 mode: change-log
1668 left-margin: 8
1669 fill-column: 74
1670 version-control: never
1671 End: