[opcodes, ARM, 14/16] Add mode availability to coprocessor table entries
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
2
3 * arm-dis.c (enum isa): New enum.
4 (struct sopcode32): New structure.
5 (coprocessor_opcodes): change type of entries to struct sopcode32 and
6 set isa field of all current entries to ANY.
7 (print_insn_coprocessor): Change type of insn to struct sopcode32.
8 Only match an entry if its isa field allows the current mode.
9
10 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
11
12 * arm-dis.c (thumb_opcodes): Document %n control code. Add entry for
13 CLRM.
14 (print_insn_thumb32): Add logic to print %n CLRM register list.
15
16 2019-04-15 Sudakshina Das <sudi.das@arm.com>
17
18 * arm-dis.c (print_insn_thumb32): Updated to accept new %P
19 and %Q patterns.
20
21 2019-04-15 Sudakshina Das <sudi.das@arm.com>
22
23 * arm-dis.c (thumb32_opcodes): New instruction bfcsel.
24 (print_insn_thumb32): Edit the switch case for %Z.
25
26 2019-04-15 Sudakshina Das <sudi.das@arm.com>
27
28 * arm-dis.c (print_insn_thumb32): Updated to accept new %Z pattern.
29
30 2019-04-15 Sudakshina Das <sudi.das@arm.com>
31
32 * arm-dis.c (thumb32_opcodes): New instruction bfl.
33
34 2019-04-15 Sudakshina Das <sudi.das@arm.com>
35
36 * arm-dis.c (print_insn_thumb32): Updated to accept new %Y pattern.
37
38 2019-04-15 Sudakshina Das <sudi.das@arm.com>
39
40 * arm-dis.c (print_insn_thumb32): Add '%<bitfield>S' to print an
41 Arm register with r13 and r15 unpredictable.
42 (thumb32_opcodes): New instructions for bfx and bflx.
43
44 2019-04-15 Sudakshina Das <sudi.das@arm.com>
45
46 * arm-dis.c (thumb32_opcodes): New instructions for bf.
47
48 2019-04-15 Sudakshina Das <sudi.das@arm.com>
49
50 * arm-dis.c (print_insn_thumb32): Updated to accept new %W pattern.
51
52 2019-04-15 Sudakshina Das <sudi.das@arm.com>
53
54 * arm-dis.c (print_insn_thumb32): Updated to accept new %G pattern.
55
56 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
57
58 * arm-dis.c (select_arm_features): Add logic for Armv8.1-M Mainline.
59
60 2019-04-12 John Darrington <john@darrington.wattle.id.au>
61
62 s12z-dis.c, s12z-opc.c, s12z-opc.h: Replace "operator" with
63 "optr". ("operator" is a reserved word in c++).
64
65 2019-04-11 Sudakshina Das <sudi.das@arm.com>
66
67 * aarch64-opc.c (aarch64_print_operand): Add case for
68 AARCH64_OPND_Rt_SP.
69 (verify_constraints): Likewise.
70 * aarch64-tbl.h (QL_LDST_AT): Update to add SP qualifier.
71 (struct aarch64_opcode): Update stg, stzg, st2g, stz2g instructions
72 to accept Rt|SP as first operand.
73 (AARCH64_OPERANDS): Add new Rt_SP.
74 * aarch64-asm-2.c: Regenerated.
75 * aarch64-dis-2.c: Regenerated.
76 * aarch64-opc-2.c: Regenerated.
77
78 2019-04-11 Sudakshina Das <sudi.das@arm.com>
79
80 * aarch64-asm-2.c: Regenerated.
81 * aarch64-dis-2.c: Likewise.
82 * aarch64-opc-2.c: Likewise.
83 * aarch64-tbl.h (aarch64_opcode): Add new ldgm and stgm.
84
85 2019-04-09 Robert Suchanek <robert.suchanek@mips.com>
86
87 * mips-opc.c (mips_builtin_opcodes): Add RDHWR rt rd sel.
88
89 2019-04-08 H.J. Lu <hongjiu.lu@intel.com>
90
91 * i386-opc.tbl: Consolidate AVX512 BF16 entries.
92 * i386-init.h: Regenerated.
93
94 2019-04-07 Alan Modra <amodra@gmail.com>
95
96 * ppc-dis.c (print_insn_powerpc): Use a tiny state machine
97 op_separator to control printing of spaces, comma and parens
98 rather than need_comma, need_paren and spaces vars.
99
100 2019-04-07 Alan Modra <amodra@gmail.com>
101
102 PR 24421
103 * arm-dis.c (print_insn_coprocessor): Correct bracket placement.
104 (print_insn_neon, print_insn_arm): Likewise.
105
106 2019-04-05 Xuepeng Guo <xuepeng.guo@intel.com>
107
108 * i386-dis-evex.h (evex_table): Updated to support BF16
109 instructions.
110 * i386-dis.c (enum): Add EVEX_W_0F3852_P_1, EVEX_W_0F3872_P_1
111 and EVEX_W_0F3872_P_3.
112 * i386-gen.c (cpu_flag_init): Add CPU_AVX512_BF16_FLAGS.
113 (cpu_flags): Add bitfield for CpuAVX512_BF16.
114 * i386-opc.h (enum): Add CpuAVX512_BF16.
115 (i386_cpu_flags): Add bitfield for cpuavx512_bf16.
116 * i386-opc.tbl: Add AVX512 BF16 instructions.
117 * i386-init.h: Regenerated.
118 * i386-tbl.h: Likewise.
119
120 2019-04-05 Alan Modra <amodra@gmail.com>
121
122 * ppc-opc.c (XLBH_MASK): Subtract off BH field from BB_MASK.
123 (powerpc_opcodes): Reorder bcctr and bclr extended mnemonics
124 to favour printing of "-" branch hint when using the "y" bit.
125 Allow BH field on bc{ctr,lr,tar}{,l}{-,+}.
126
127 2019-04-05 Alan Modra <amodra@gmail.com>
128
129 * ppc-dis.c (print_insn_powerpc): Delay printing spaces after
130 opcode until first operand is output.
131
132 2019-04-04 Peter Bergner <bergner@linux.ibm.com>
133
134 PR gas/24349
135 * ppc-opc.c (valid_bo_pre_v2): Add comments.
136 (valid_bo_post_v2): Add support for 'at' branch hints.
137 (insert_bo): Only error on branch on ctr.
138 (get_bo_hint_mask): New function.
139 (insert_boe): Add new 'branch_taken' formal argument. Add support
140 for inserting 'at' branch hints.
141 (extract_boe): Add new 'branch_taken' formal argument. Add support
142 for extracting 'at' branch hints.
143 (insert_bom, extract_bom, insert_bop, extract_bop): New functions.
144 (BOE): Delete operand.
145 (BOM, BOP): New operands.
146 (RM): Update value.
147 (XLYLK, XLYLK_MASK, XLYBB_MASK): Delete.
148 (powerpc_opcodes) <bc-, bcl-, bca-, bcla-, bclr-, bclrl-, bcctr-,
149 bcctrl-, bctar-, bctarl->: Replace BOE with BOM.
150 (powerpc_opcodes) <bc+, bcl+, bca+, bcla+, bclr+, bclrl+, bcctr+,
151 bcctrl+, bctar+, bctarl+>: Replace BOE with BOP.
152 <bdnztar, bdnztarl, bdztar, bdztarl, btar, btarl, bdnztar-, bdnztarl-,
153 bdnztar+, bdnztarl+, bdztar-, bdztarl-, bdztar+, bdztarl+, bgetar,
154 bnltar, bgetarl, bnltarl, bletar, bngtar, bletarl, bngtarl, bnetar,
155 bnetarl, bnstar, bnutar, bnstarl, bnutarl, bgetar-, bnltar-, bgetarl-,
156 bnltarl-, bletar-, bngtar-, bletarl-, bngtarl-, bnetar-, bnetarl-,
157 bnstar-, bnutar-, bnstarl-, bnutarl-, bgetar+, bnltar+, bgetarl+,
158 bnltarl+, bletar+, bngtar+, bletarl+, bngtarl+, bnetar+, bnetarl+,
159 bnstar+, bnutar+, bnstarl+, bnutarl+, blttar, blttarl, bgttar, bgttarl,
160 beqtar, beqtarl, bsotar, buntar, bsotarl, buntarl, blttar-, blttarl-,
161 bgttar-, bgttarl-, beqtar-, beqtarl-, bsotar-, buntar-, bsotarl-,
162 buntarl-, blttar+, blttarl+, bgttar+, bgttarl+, beqtar+, beqtarl+,
163 bsotar+, buntar+, bsotarl+, buntarl+, bdnzftar, bdnzftarl, bdzftar,
164 bdzftarl, bftar, bftarl, bftar-, bftarl-, bftar+, bftarl+, bdnzttar,
165 bdnzttarl, bdzttar, bdzttarl, bttar, bttarl, bttar-, bttarl-, bttar+,
166 bttarl+>: New extended mnemonics.
167
168 2019-03-28 Alan Modra <amodra@gmail.com>
169
170 PR 24390
171 * ppc-opc.c (BTF): Define.
172 (powerpc_opcodes): Use for mtfsb*.
173 * ppc-dis.c (print_insn_powerpc): Print fields with both
174 PPC_OPERAND_CR_REG and PPC_OPERAND_CR_BIT as a plain number.
175
176 2019-03-25 Tamar Christina <tamar.christina@arm.com>
177
178 * arm-dis.c (struct arm_private_data): Remove has_mapping_symbols.
179 (mapping_symbol_for_insn): Implement new algorithm.
180 (print_insn): Remove duplicate code.
181
182 2019-03-25 Tamar Christina <tamar.christina@arm.com>
183
184 * aarch64-dis.c (print_insn_aarch64):
185 Implement override.
186
187 2019-03-25 Tamar Christina <tamar.christina@arm.com>
188
189 * aarch64-dis.c (print_insn_aarch64): Update the mapping symbol search
190 order.
191
192 2019-03-25 Tamar Christina <tamar.christina@arm.com>
193
194 * aarch64-dis.c (last_stop_offset): New.
195 (print_insn_aarch64): Use stop_offset.
196
197 2019-03-19 H.J. Lu <hongjiu.lu@intel.com>
198
199 PR gas/24359
200 * i386-gen.c (cpu_flag_init): Add CPU_ANY_AVX512F_FLAGS to
201 CPU_ANY_AVX2_FLAGS.
202 * i386-init.h: Regenerated.
203
204 2019-03-18 H.J. Lu <hongjiu.lu@intel.com>
205
206 PR gas/24348
207 * i386-opc.tbl: Add Optimize to vmovdqa32, vmovdqa64, vmovdqu8,
208 vmovdqu16, vmovdqu32 and vmovdqu64.
209 * i386-tbl.h: Regenerated.
210
211 2019-03-12 Andreas Krebbel <krebbel@linux.ibm.com>
212
213 * s390-opc.txt: Rename selhhhr to selfhr. Remove optional operand
214 from vstrszb, vstrszh, and vstrszf.
215
216 2019-03-12 Andreas Krebbel <krebbel@linux.ibm.com>
217
218 * s390-opc.txt: Add instruction descriptions.
219
220 2019-02-08 Jim Wilson <jimw@sifive.com>
221
222 * riscv-opc.c (riscv_opcodes) <beq>: Use Cz to compress 3 operand form.
223 <bne>: Likewise.
224
225 2019-02-07 Tamar Christina <tamar.christina@arm.com>
226
227 * arm-dis.c (arm_opcodes): Redefine hlt to armv1.
228
229 2019-02-07 Tamar Christina <tamar.christina@arm.com>
230
231 PR binutils/23212
232 * aarch64-opc.h (enum aarch64_field_kind): Add FLD_sz.
233 * aarch64-opc.c (verify_elem_sd): New.
234 (fields): Add FLD_sz entr.
235 * aarch64-tbl.h (_SIMD_INSN): New.
236 (aarch64_opcode_table): Add elem_sd verifier to fmla, fmls, fmul and
237 fmulx scalar and vector by element isns.
238
239 2019-02-07 Nick Clifton <nickc@redhat.com>
240
241 * po/sv.po: Updated Swedish translation.
242
243 2019-01-31 Andreas Krebbel <krebbel@linux.ibm.com>
244
245 * s390-mkopc.c (main): Accept arch13 as cpu string.
246 * s390-opc.c: Add new instruction formats and instruction opcode
247 masks.
248 * s390-opc.txt: Add new arch13 instructions.
249
250 2019-01-25 Sudakshina Das <sudi.das@arm.com>
251
252 * aarch64-tbl.h (QL_LDST_AT): Update macro.
253 (aarch64_opcode): Change encoding for stg, stzg
254 st2g and st2zg.
255 * aarch64-asm-2.c: Regenerated.
256 * aarch64-dis-2.c: Regenerated.
257 * aarch64-opc-2.c: Regenerated.
258
259 2019-01-25 Sudakshina Das <sudi.das@arm.com>
260
261 * aarch64-asm-2.c: Regenerated.
262 * aarch64-dis-2.c: Likewise.
263 * aarch64-opc-2.c: Likewise.
264 * aarch64-tbl.h (aarch64_opcode): Add new stzgm.
265
266 2019-01-25 Sudakshina Das <sudi.das@arm.com>
267 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
268
269 * aarch64-asm.c (aarch64_ins_addr_simple_2): Remove.
270 * aarch64-asm.h (ins_addr_simple_2): Likeiwse.
271 * aarch64-dis.c (aarch64_ext_addr_simple_2): Likewise.
272 * aarch64-dis.h (ext_addr_simple_2): Likewise.
273 * aarch64-opc.c (operand_general_constraint_met_p): Remove
274 case for ldstgv_indexed.
275 (aarch64_print_operand): Remove case for AARCH64_OPND_ADDR_SIMPLE_2.
276 * aarch64-tbl.h (struct aarch64_opcode): Remove ldgv and stgv.
277 (AARCH64_OPERANDS): Remove ADDR_SIMPLE_2.
278 * aarch64-asm-2.c: Regenerated.
279 * aarch64-dis-2.c: Regenerated.
280 * aarch64-opc-2.c: Regenerated.
281
282 2019-01-23 Nick Clifton <nickc@redhat.com>
283
284 * po/pt_BR.po: Updated Brazilian Portuguese translation.
285
286 2019-01-21 Nick Clifton <nickc@redhat.com>
287
288 * po/de.po: Updated German translation.
289 * po/uk.po: Updated Ukranian translation.
290
291 2019-01-20 Chenghua Xu <paul.hua.gm@gmail.com>
292 * mips-dis.c (mips_arch_choices): Fix typo in
293 gs464, gs464e and gs264e descriptors.
294
295 2019-01-19 Nick Clifton <nickc@redhat.com>
296
297 * configure: Regenerate.
298 * po/opcodes.pot: Regenerate.
299
300 2018-06-24 Nick Clifton <nickc@redhat.com>
301
302 2.32 branch created.
303
304 2019-01-09 John Darrington <john@darrington.wattle.id.au>
305
306 * s12z-dis.c (print_insn_s12z): Do not dereference an operand
307 if it is null.
308 -dis.c (opr_emit_disassembly): Do not omit an index if it is
309 zero.
310
311 2019-01-09 Andrew Paprocki <andrew@ishiboo.com>
312
313 * configure: Regenerate.
314
315 2019-01-07 Alan Modra <amodra@gmail.com>
316
317 * configure: Regenerate.
318 * po/POTFILES.in: Regenerate.
319
320 2019-01-03 John Darrington <john@darrington.wattle.id.au>
321
322 * s12z-opc.c: New file.
323 * s12z-opc.h: New file.
324 * s12z-dis.c: Removed all code not directly related to display
325 of instructions. Used the interface provided by the new files
326 instead.
327 * Makefile.am (TARGET_LIBOPCODES_CFILES) Add s12z-opc.c.
328 * Makefile.in: Regenerate.
329 * configure.ac (bfd_s12z_arch): Correct the dependencies.
330 * configure: Regenerate.
331
332 2019-01-01 Alan Modra <amodra@gmail.com>
333
334 Update year range in copyright notice of all files.
335
336 For older changes see ChangeLog-2018
337 \f
338 Copyright (C) 2019 Free Software Foundation, Inc.
339
340 Copying and distribution of this file, with or without modification,
341 are permitted in any medium without royalty provided the copyright
342 notice and this notice are preserved.
343
344 Local Variables:
345 mode: change-log
346 left-margin: 8
347 fill-column: 74
348 version-control: never
349 End:
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