1 2012-10-24 Roland McGrath <mcgrathr@google.com>
3 * i386-dis.c (ckprefix): When bailing out for fwait with prefixes,
6 2012-10-22 Peter Bergner <bergner@vnet.ibm.com>
8 * ppc-opc.c (powerpc_opcodes) <vcfpsxws>: Fix opcode spelling.
10 2012-10-18 Tom Tromey <tromey@redhat.com>
12 * tic54x-dis.c (print_instruction): Don't use K&R style.
13 (print_parallel_instruction, sprint_dual_address)
14 (sprint_indirect_address, sprint_direct_address, sprint_mmr)
15 (sprint_cc2, sprint_condition): Likewise.
17 2012-10-18 Kai Tietz <ktietz@redhat.com>
19 * aarch64-asm.c (aarch64_ins_ldst_reglist): Initialize
21 (do_special_encoding): Likewise.
22 (aarch64_ins_ldst_elemlist): Pre-initialize QSsize, and opcodeh2
23 variables with default.
24 * arc-dis.c (write_comments_): Don't use strncat due
25 size of state->commentBuffer pointer isn't predictable.
27 2012-10-15 Yufeng Zhang <yufeng.zhang@arm.com>
29 * aarch64-opc.c (aarch64_sys_regs): Add rmr_el1, rmr_el2 and
30 rmr_el3; remove daifset and daifclr.
32 2012-10-15 Yufeng Zhang <yufeng.zhang@arm.com>
34 * aarch64-opc.c (operand_general_constraint_met_p): Change to check
35 the alignment of addr.offset.imm instead of that of shifter.amount for
36 operand type AARCH64_OPND_ADDR_UIMM12.
38 2012-10-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
40 * arm-dis.c: Use preferred form of vrint instruction variants
43 2012-10-09 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
45 * i386-gen.c (cpu_flag_init): Add CPU_BDVER3_FLAGS.
46 * i386-init.h: Regenerated.
48 2012-10-05 Peter Bergner <bergner@vnet.ibm.com>
50 * ppc-dis.c (ppc_opts) <altivec>: Use PPC_OPCODE_ALTIVEC2;
51 * ppc-opc.c (VBA): New define.
52 (powerpc_opcodes) <vcuxwfp, vcsxwfp, vcfpuxws, vcfpsxsw, vmr, vnot,
53 mfppr, mfppr32, mtppr, mtppr32>: New extended mnemonics.
55 2012-10-04 Nick Clifton <nickc@redhat.com>
57 * v850-dis.c (disassemble): Place square parentheses around second
58 register operand of clr1, not1, set1 and tst1 instructions.
60 2012-10-04 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
62 * s390-mkopc.c: Support new option zEC12.
63 * s390-opc.c: Add new instruction formats.
64 * s390-opc.txt: Add new instructions for zEC12.
66 2012-09-27 Anthony Green <green@moxielogic.com>
68 * moxie-dis.c (print_insn_moxie): Print 'bad' instructions.
69 * moxie-opc.c: All 'bad' instructions have the itype MOXIE_BAD.
71 2012-09-25 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
73 * i386-gen.c (cpu_flag_init): Add missing Cpu flags in
74 CPU_BDVER1_FLAGS, CPU_BDVER2_FLAGS, CPU_BTVER1_FLAGS
76 * i386-init.h: Regenerated.
78 2012-09-20 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
80 * i386-gen.c (cpu_flag_init): Add CpuCX16 to CPU_NOCONA_FLAGS,
81 CPU_CORE_FLAGS, CPU_CORE2_FLAGS, CPU_COREI7_FLAGS,
82 CPU_BDVER1_FLAGS, CPU_BDVER2_FLAGS, CPU_BTVER1_FLAGS,
83 CPU_BTVER2_FLAGS. Add CPU_CX16_FLAGS.
84 (cpu_flags): Add CpuCX16.
85 * i386-opc.h (CpuCX16): New.
86 (i386_cpu_flags): Add cpucx16.
87 * i386-opc.tbl: Replace CpuSSE3 with CpuCX16 for cmpxchg16b.
88 * i386-tbl.h: Regenerate.
89 * i386-init.h: Likewise.
91 2012-09-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
93 * arm-dis.c: Changed ldra and strl-form mnemonics
96 2012-09-18 Chao-ying Fu <fu@mips.com>
98 * micromips-opc.c (micromips_opcodes): Correct the encoding of
99 the "swxc1" instruction.
101 2012-09-17 Yufeng Zhang <yufeng.zhang@arm.com>
103 * aarch64-asm.c (aarch64_ins_imm_half): Remove ATTRIBUTE_UNUSED from
104 the parameter 'inst'.
105 (aarch64_ins_addr_simm): Add ATTRIBUTE_UNUSED to the parameter 'inst'.
106 (convert_mov_to_movewide): Change to assert (0) when
107 aarch64_wide_constant_p returns FALSE.
109 2012-09-14 David Edelsohn <dje.gcc@gmail.com>
111 * configure: Regenerate.
113 2012-09-14 Anthony Green <green@moxielogic.com>
115 * moxie-dis.c (print_insn_moxie): Branch targets are relative to
116 the address after the branch instruction.
118 2012-09-13 Anthony Green <green@moxielogic.com>
120 * moxie-dis.c (print_insn_moxie): Handle bi-endian encodings.
122 2012-09-10 Matthias Klose <doko@ubuntu.com>
124 * config.in: Disable sanity check for kfreebsd.
126 2012-09-10 H.J. Lu <hongjiu.lu@intel.com>
128 * configure: Regenerated.
130 2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
132 * ia64-asmtab.h (completer_index): Extend bitfield to full uint.
133 * ia64-gen.c: Promote completer index type to longlong.
134 (irf_operand): Add new register recognition.
135 (in_iclass_mov_x): Add an entry for the new mov_* instruction type.
136 (lookup_specifier): Add new resource recognition.
137 (insert_bit_table_ent): Relax abort condition according to the
138 changed completer index type.
139 (print_dis_table): Fix printf format for completer index.
140 * ia64-ic.tbl: Add a new instruction class.
141 * ia64-opc-i.c (ia64_opcodes_i): Define new I-instructions.
142 * ia64-opc-m.c (ia64_opcodes_m): Define new M-instructions.
143 * ia64-opc.h: Define short names for new operand types.
144 * ia64-raw.tbl: Add new RAW resource for DAHR register.
145 * ia64-waw.tbl: Add new WAW resource for DAHR register.
146 * ia64-asmtab.c: Regenerate.
148 2012-08-29 Peter Bergner <bergner@vnet.ibm.com>
150 * ppc-opc.c (VXASHB_MASK): New define.
151 (powerpc_opcodes) <vsldoi>: Use VXASHB_MASK.
153 2012-08-28 Peter Bergner <bergner@vnet.ibm.com>
155 * ppc-opc.c (UIMM4, UIMM3, UIMM2, VXVA_MASK, VXVB_MASK, VXVAVB_MASK,
156 VXVDVA_MASK, VXUIMM4_MASK, VXUIMM3_MASK, VXUIMM2_MASK): New defines.
157 (powerpc_opcodes) <vexptefp, vlogefp, vrefp, vrfim, vrfin, vrfip,
158 vrfiz, vrsqrtefp, vupkhpx, vupkhsb, vupkhsh, vupklpx, vupklsb,
159 vupklsh>: Use VXVA_MASK.
160 <vspltisb, vspltish, vspltisw>: Use VXVB_MASK.
161 <mfvscr>: Use VXVAVB_MASK.
162 <mtvscr>: Use VXVDVA_MASK.
163 <vspltb>: Use VXUIMM4_MASK.
164 <vsplth>: Use VXUIMM3_MASK.
165 <vspltw>: Use VXUIMM2_MASK.
167 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
169 * arm-dis.c (neon_opcodes): Add 2 operand sha instructions.
171 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
173 * arm-dis.c (neon_opcodes): Add SHA 3-operand instructions.
175 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
177 * arm-dis.c (neon_opcodes): Handle VMULL.P64.
179 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
181 * arm-dis.c (neon_opcodes): Add support for AES instructions.
183 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
185 * arm-dis.c (coprocessor_opcodes): Add support for HP/DP
188 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
190 * arm-dis.c (coprocessor_opcodes): Add VRINT.
191 (neon_opcodes): Likewise.
193 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
195 * arm-dis.c (coprocessor_opcodes): Add support for new VCVT
197 (neon_opcodes): Likewise.
199 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
201 * arm-dis.c (coprocessor_opcodes): Add VMAXNM/VMINNM.
202 (neon_opcodes): Likewise.
204 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
206 * arm-dis.c (coprocessor_opcodes): Add VSEL.
207 (print_insn_coprocessor): Add new %<>c bitfield format
210 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
212 * arm-dis.c (arm_opcodes): Add LDRA/STRL instructions.
213 (thumb32_opcodes): Likewise.
214 (print_arm_insn): Add support for %<>T formatter.
216 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
218 * arm-dis.c (arm_opcodes): Add HLT.
219 (thumb_opcodes): Likewise.
221 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
223 * arm-dis.c (thumb32_opcodes): Add DCPS instruction.
225 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
227 * arm-dis.c (arm_opcodes): Add SEVL.
228 (thumb_opcodes): Likewise.
229 (thumb32_opcodes): Likewise.
231 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
233 * arm-dis.c (data_barrier_option): New function.
234 (print_insn_arm): Use data_barrier_option.
235 (print_insn_thumb32): Use data_barrier_option.
237 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com
239 * arm-dis.c (COND_UNCOND): New constant.
240 (print_insn_coprocessor): Add support for %u format specifier.
241 (print_insn_neon): Likewise.
243 2012-08-21 David S. Miller <davem@davemloft.net>
245 * sparc-opc.c (4-argument crypto instructions): Fix encoding using
248 2012-08-20 Edmar Wienskoski <edmar@freescale.com>
250 * ppc-opc.c (powerpc_opcodes): Changed opcode for vabsdub,
251 vabsduh, vabsduw, mviwsplt.
253 2012-08-17 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
255 * i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and
258 * i386-opc.h: Update CpuPRFCHW comment.
260 * i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW.
261 * i386-init.h: Regenerated.
262 * i386-tbl.h: Likewise.
264 2012-08-17 Nick Clifton <nickc@redhat.com>
266 * po/uk.po: New Ukranian translation.
267 * configure.in (ALL_LINGUAS): Add uk.
268 * configure: Regenerate.
270 2012-08-16 Peter Bergner <bergner@vnet.ibm.com>
272 * ppc-opc.c (powerpc_opcodes) <"lswx">: Use RAX for the second and
273 RBX for the third operand.
274 <"lswi">: Use RAX for second and NBI for the third operand.
276 2012-08-15 DJ Delorie <dj@redhat.com>
278 * rl78-decode.opc (rl78_decode_opcode): Merge %e and %[01]
279 operands, so that data addresses can be corrected when not
281 * rl78-decode.c: Regenerate.
282 * rl78-dis.c (print_insn_rl78): Make order of modifiers
283 irrelevent. When the 'e' specifier is used on an operand and no
284 ES prefix is provided, adjust address to make it absolute.
286 2012-08-15 Peter Bergner <bergner@vnet.ibm.com>
288 * ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR.
290 2012-08-15 Peter Bergner <bergner@vnet.ibm.com>
292 * ppc-opc.c <xnop, yield, mdoio, mdoom>: New extended mnemonics.
294 2012-08-14 Maciej W. Rozycki <macro@codesourcery.com>
296 * mips-dis.c (print_insn_args): Add GET_OP and GET_OP_S local
297 macros, use local variables for info struct member accesses,
298 update the type of the variable used to hold the instruction
300 (print_insn_mips, print_mips16_insn_arg): Likewise.
301 (print_insn_mips16): Add GET_OP and GET_OP_S local macros, use
302 local variables for info struct member accesses.
303 (print_insn_micromips): Add GET_OP_S local macro.
304 (_print_insn_mips): Update the type of the variable used to hold
305 the instruction word.
307 2012-08-13 Ian Bolton <ian.bolton@arm.com>
308 Laurent Desnogues <laurent.desnogues@arm.com>
309 Jim MacArthur <jim.macarthur@arm.com>
310 Marcus Shawcroft <marcus.shawcroft@arm.com>
311 Nigel Stephens <nigel.stephens@arm.com>
312 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
313 Richard Earnshaw <rearnsha@arm.com>
314 Sofiane Naci <sofiane.naci@arm.com>
315 Tejas Belagod <tejas.belagod@arm.com>
316 Yufeng Zhang <yufeng.zhang@arm.com>
318 * Makefile.am: Add AArch64.
319 * Makefile.in: Regenerate.
320 * aarch64-asm.c: New file.
321 * aarch64-asm.h: New file.
322 * aarch64-dis.c: New file.
323 * aarch64-dis.h: New file.
324 * aarch64-gen.c: New file.
325 * aarch64-opc.c: New file.
326 * aarch64-opc.h: New file.
327 * aarch64-tbl.h: New file.
328 * configure.in: Add AArch64.
329 * configure: Regenerate.
330 * disassemble.c: Add AArch64.
331 * aarch64-asm-2.c: New file (automatically generated).
332 * aarch64-dis-2.c: New file (automatically generated).
333 * aarch64-opc-2.c: New file (automatically generated).
334 * po/POTFILES.in: Regenerate.
336 2012-08-13 Maciej W. Rozycki <macro@codesourcery.com>
338 * micromips-opc.c (micromips_opcodes): Update comment.
339 * mips-opc.c (mips_builtin_opcodes): Likewise. Mark coprocessor
340 instructions for IOCT as appropriate.
341 * mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with
343 * configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with
344 the result of a check for the -Wno-missing-field-initializers
346 * Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable.
347 (mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to
349 (mips16-opc.lo): Likewise.
350 (micromips-opc.lo): Likewise.
351 * aclocal.m4: Regenerate.
352 * configure: Regenerate.
353 * Makefile.in: Regenerate.
355 2012-08-11 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
358 * i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS.
359 * i386-init.h: Regenerated.
361 2012-08-09 Nick Clifton <nickc@redhat.com>
363 * po/vi.po: Updated Vietnamese translation.
365 2012-08-07 Roland McGrath <mcgrathr@google.com>
367 * i386-dis.c (reg_table): Fill out REG_0F0D table with
368 AMD-reserved cases as "prefetch".
369 (MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants.
370 (MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise.
371 (reg_table): Use those under REG_0F18.
372 (mod_table): Add those cases as "nop/reserved".
374 2012-08-07 Jan Beulich <jbeulich@suse.com>
376 * i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
378 2012-08-06 Roland McGrath <mcgrathr@google.com>
380 * i386-dis.c (print_insn): Print spaces between multiple excess
381 prefixes. Return actual number of excess prefixes consumed,
384 * i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
386 2012-08-06 Roland McGrath <mcgrathr@google.com>
387 Victor Khimenko <khim@google.com>
388 H.J. Lu <hongjiu.lu@intel.com>
390 * i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG.
391 (putop): For 'T', 'U', and 'V', treat REX_W like DFLAG.
392 (intel_operand_size): For stack_v_mode, treat REX_W like DFLAG.
393 (OP_E_register): Likewise.
394 (OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
396 2012-08-02 Jan-Benedict Glaw <jbglaw@lug-owl.de>
398 * configure.in: Formatting.
399 * configure: Regenerate.
401 2012-08-01 Alan Modra <amodra@gmail.com>
403 * h8300-dis.c: Fix printf arg warnings.
404 * i960-dis.c: Likewise.
405 * mips-dis.c: Likewise.
406 * pdp11-dis.c: Likewise.
407 * sh-dis.c: Likewise.
408 * v850-dis.c: Likewise.
409 * configure.in: Formatting.
410 * configure: Regenerate.
411 * rl78-decode.c: Regenerate.
412 * po/POTFILES.in: Regenerate.
414 2012-07-31 Chao-Ying Fu <fu@mips.com>
415 Catherine Moore <clm@codesourcery.com>
416 Maciej W. Rozycki <macro@codesourcery.com>
418 * micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
419 (DSP_VOLA): Likewise.
420 (D32, D33): Likewise.
421 (micromips_opcodes): Add DSP ASE instructions.
422 * mips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
423 <'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
425 2012-07-31 Jan Beulich <jbeulich@suse.com>
427 * i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2
428 instruction group. Mark as requiring AVX2.
429 * i386-tbl.h: Re-generate.
431 2012-07-30 Nick Clifton <nickc@redhat.com>
433 * po/opcodes.pot: Updated template.
434 * po/es.po: Updated Spanish translation.
435 * po/fi.po: Updated Finnish translation.
437 2012-07-27 Mike Frysinger <vapier@gentoo.org>
439 * configure.in (BFD_VERSION): Run bfd/configure --version and
440 parse the output of that.
441 * configure: Regenerate.
443 2012-07-25 James Lemke <jwlemke@codesourcery.com>
445 * ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
447 2012-07-24 Stephan McCamant <smcc@cs.berkeley.edu>
448 Dr David Alan Gilbert <dave@treblig.org>
451 * arm-dis.c: Add necessary casts for printing integer values.
452 Use %s when printing string values.
453 * hppa-dis.c: Likewise.
454 * m68k-dis.c: Likewise.
455 * microblaze-dis.c: Likewise.
456 * mips-dis.c: Likewise.
457 * sparc-dis.c: Likewise.
459 2012-07-19 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
462 * i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
463 (VEX_LEN_0FXOP_08_CD): Likewise.
464 (VEX_LEN_0FXOP_08_CE): Likewise.
465 (VEX_LEN_0FXOP_08_CF): Likewise.
466 (VEX_LEN_0FXOP_08_EC): Likewise.
467 (VEX_LEN_0FXOP_08_ED): Likewise.
468 (VEX_LEN_0FXOP_08_EE): Likewise.
469 (VEX_LEN_0FXOP_08_EF): Likewise.
470 (xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
471 vpcomub, vpcomuw, vpcomud, vpcomuq.
472 (vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
473 VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
474 VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
477 2012-07-16 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
479 * i386-dis.c (PREFIX_0F38F6): New.
480 (prefix_table): Add adcx, adox instructions.
481 (three_byte_table): Use PREFIX_0F38F6.
482 (mod_table): Add rdseed instruction.
483 * i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
484 (cpu_flags): Likewise.
485 * i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
486 (i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
487 * i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
489 * i386-tbl.h: Regenerate.
490 * i386-init.h: Likewise.
492 2012-07-05 Thomas Schwinge <thomas@codesourcery.com>
494 * mips-dis.c: Remove gratuitous newline.
496 2012-07-05 Sean Keys <skeys@ipdatasys.com>
498 * xgate-dis.c: Removed an IF statement that will
499 always be false due to overlapping operand masks.
500 * xgate-opc.c: Corrected 'com' opcode entry and
503 2012-07-02 Roland McGrath <mcgrathr@google.com>
505 * i386-opc.tbl: Add RepPrefixOk to nop.
506 * i386-tbl.h: Regenerate.
508 2012-06-28 Nick Clifton <nickc@redhat.com>
510 * po/vi.po: Updated Vietnamese translation.
512 2012-06-22 Roland McGrath <mcgrathr@google.com>
514 * i386-opc.tbl: Add RepPrefixOk to ret.
515 * i386-tbl.h: Regenerate.
517 * i386-opc.h (RepPrefixOk): New enum constant.
518 (i386_opcode_modifier): New bitfield 'repprefixok'.
519 * i386-gen.c (opcode_modifiers): Add RepPrefixOk.
520 * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
521 instructions that have IsString.
522 * i386-tbl.h: Regenerate.
524 2012-06-11 Andreas Schwab <schwab@linux-m68k.org>
526 * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
527 (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
528 (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
529 (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
530 (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
531 (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
532 (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
533 (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
534 (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
536 2012-05-19 Alan Modra <amodra@gmail.com>
538 * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
539 (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
541 2012-05-18 Alan Modra <amodra@gmail.com>
543 * ia64-opc.c: Remove #include "ansidecl.h".
544 * z8kgen.c: Include sysdep.h first.
546 * arc-dis.c: Include sysdep.h first, remove some redundant includes.
547 * bfin-dis.c: Likewise.
548 * i860-dis.c: Likewise.
549 * ia64-dis.c: Likewise.
550 * ia64-gen.c: Likewise.
551 * m68hc11-dis.c: Likewise.
552 * mmix-dis.c: Likewise.
553 * msp430-dis.c: Likewise.
554 * or32-dis.c: Likewise.
555 * rl78-dis.c: Likewise.
556 * rx-dis.c: Likewise.
557 * tic4x-dis.c: Likewise.
558 * tilegx-opc.c: Likewise.
559 * tilepro-opc.c: Likewise.
560 * rx-decode.c: Regenerate.
562 2012-05-17 James Lemke <jwlemke@codesourcery.com>
564 * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
566 2012-05-17 James Lemke <jwlemke@codesourcery.com>
568 * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
570 2012-05-17 Daniel Richard G. <skunk@iskunk.org>
571 Nick Clifton <nickc@redhat.com>
574 * configure.in: Add check that sysdep.h has been included before
575 any system header files.
576 * configure: Regenerate.
577 * config.in: Regenerate.
578 * sysdep.h: Generate an error if included before config.h.
579 * alpha-opc.c: Include sysdep.h before any other header file.
580 * alpha-dis.c: Likewise.
581 * avr-dis.c: Likewise.
582 * cgen-opc.c: Likewise.
583 * cr16-dis.c: Likewise.
584 * cris-dis.c: Likewise.
585 * crx-dis.c: Likewise.
586 * d10v-dis.c: Likewise.
587 * d10v-opc.c: Likewise.
588 * d30v-dis.c: Likewise.
589 * d30v-opc.c: Likewise.
590 * h8500-dis.c: Likewise.
591 * i370-dis.c: Likewise.
592 * i370-opc.c: Likewise.
593 * m10200-dis.c: Likewise.
594 * m10300-dis.c: Likewise.
595 * micromips-opc.c: Likewise.
596 * mips-opc.c: Likewise.
597 * mips61-opc.c: Likewise.
598 * moxie-dis.c: Likewise.
599 * or32-opc.c: Likewise.
600 * pj-dis.c: Likewise.
601 * ppc-dis.c: Likewise.
602 * ppc-opc.c: Likewise.
603 * s390-dis.c: Likewise.
604 * sh-dis.c: Likewise.
605 * sh64-dis.c: Likewise.
606 * sparc-dis.c: Likewise.
607 * sparc-opc.c: Likewise.
608 * spu-dis.c: Likewise.
609 * tic30-dis.c: Likewise.
610 * tic54x-dis.c: Likewise.
611 * tic80-dis.c: Likewise.
612 * tic80-opc.c: Likewise.
613 * tilegx-dis.c: Likewise.
614 * tilepro-dis.c: Likewise.
615 * v850-dis.c: Likewise.
616 * v850-opc.c: Likewise.
617 * vax-dis.c: Likewise.
618 * w65-dis.c: Likewise.
619 * xgate-dis.c: Likewise.
620 * xtensa-dis.c: Likewise.
621 * rl78-decode.opc: Likewise.
622 * rl78-decode.c: Regenerate.
623 * rx-decode.opc: Likewise.
624 * rx-decode.c: Regenerate.
626 2012-05-17 Alan Modra <amodra@gmail.com>
628 * ppc_dis.c: Don't include elf/ppc.h.
630 2012-05-16 Meador Inge <meadori@codesourcery.com>
632 * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
635 2012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
636 Stephane Carrez <stcarrez@nerim.fr>
638 * configure.in: Add S12X and XGATE co-processor support to m68hc11
640 * disassemble.c: Likewise.
641 * configure: Regenerate.
642 * m68hc11-dis.c: Make objdump output more consistent, use hex
643 instead of decimal and use 0x prefix for hex.
644 * m68hc11-opc.c: Add S12X and XGATE opcodes.
646 2012-05-14 James Lemke <jwlemke@codesourcery.com>
648 * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
649 (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
650 (vle_opcd_indices): New array.
651 (lookup_vle): New function.
652 (disassemble_init_powerpc): Revise for second (VLE) opcode table.
653 (print_insn_powerpc): Likewise.
654 * ppc-opc.c: Likewise.
656 2012-05-14 Catherine Moore <clm@codesourcery.com>
657 Maciej W. Rozycki <macro@codesourcery.com>
658 Rhonda Wittels <rhonda@codesourcery.com>
659 Nathan Froyd <froydnj@codesourcery.com>
661 * ppc-opc.c (insert_arx, extract_arx): New functions.
662 (insert_ary, extract_ary): New functions.
663 (insert_li20, extract_li20): New functions.
664 (insert_rx, extract_rx): New functions.
665 (insert_ry, extract_ry): New functions.
666 (insert_sci8, extract_sci8): New functions.
667 (insert_sci8n, extract_sci8n): New functions.
668 (insert_sd4h, extract_sd4h): New functions.
669 (insert_sd4w, extract_sd4w): New functions.
670 (insert_vlesi, extract_vlesi): New functions.
671 (insert_vlensi, extract_vlensi): New functions.
672 (insert_vleui, extract_vleui): New functions.
673 (insert_vleil, extract_vleil): New functions.
674 (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
675 (BI16, BI32, BO32, B8): New.
676 (B15, B24, CRD32, CRS): New.
677 (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
678 (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
679 (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
680 (SH6_MASK): Use PPC_OPSHIFT_INV.
681 (SI8, UI5, OIMM5, UI7, BO16): New.
682 (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
683 (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
685 (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
686 (OPVUP, OPVUP_MASK OPVUP): New
687 (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
688 (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
689 (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
690 (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
691 (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
692 (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
693 (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
694 (SE_IM5, SE_IM5_MASK): New.
695 (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
696 (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
697 (BO32DNZ, BO32DZ): New.
698 (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
700 (powerpc_opcodes): Add new VLE instructions. Update existing
701 instruction to include PPCVLE if supported.
702 * ppc-dis.c (ppc_opts): Add vle entry.
703 (get_powerpc_dialect): New function.
704 (powerpc_init_dialect): VLE support.
705 (print_insn_big_powerpc): Call get_powerpc_dialect.
706 (print_insn_little_powerpc): Likewise.
707 (operand_value_powerpc): Handle negative shift counts.
708 (print_insn_powerpc): Handle 2-byte instruction lengths.
710 2012-05-11 Daniel Richard G. <skunk@iskunk.org>
713 * configure.in: Invoke ACX_HEADER_STRING.
714 * configure: Regenerate.
715 * config.in: Regenerate.
716 * sysdep.h: If STRINGS_WITH_STRING is defined then include both
717 string.h and strings.h.
719 2012-05-11 Nick Clifton <nickc@redhat.com>
722 * arm-dis.c (print_insn): Fix detection of instruction mode in
723 files containing multiple executable sections.
725 2012-05-03 Sean Keys <skeys@ipdatasys.com>
727 * Makefile.in, configure: regenerate
728 * disassemble.c (disassembler): Recognize ARCH_XGATE.
729 * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
731 * configure.in: Recognize xgate.
732 * xgate-dis.c, xgate-opc.c: New files for support of xgate
733 * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
734 and opcode generation for xgate.
736 2012-04-30 DJ Delorie <dj@redhat.com>
738 * rx-decode.opc (MOV): Do not sign-extend immediates which are
739 already the maximum bit size.
740 * rx-decode.c: Regenerate.
742 2012-04-27 David S. Miller <davem@davemloft.net>
744 * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
745 * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
747 * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
748 * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
750 * sparc-opc.c (CBCOND): New define.
751 (CBCOND_XCC): Likewise.
752 (cbcond): New helper macro.
753 (sparc_opcodes): Add compare-and-branch instructions.
755 * sparc-dis.c (print_insn_sparc): Handle ')'.
756 * sparc-opc.c (sparc_opcodes): Add crypto instructions.
758 * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
759 into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
761 2012-04-12 David S. Miller <davem@davemloft.net>
763 * sparc-dis.c (X_DISP10): Define.
764 (print_insn_sparc): Handle '='.
766 2012-04-01 Mike Frysinger <vapier@gentoo.org>
768 * bfin-dis.c (fmtconst): Replace decimal handling with a single
769 sprintf call and the '*' field width.
771 2012-03-23 Maxim Kuvyrkov <maxim@codesourcery.com>
773 * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
775 2012-03-16 Alan Modra <amodra@gmail.com>
777 * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
778 (powerpc_opcd_indices): Bump array size.
779 (disassemble_init_powerpc): Set powerpc_opcd_indices entries
780 corresponding to unused opcodes to following entry.
781 (lookup_powerpc): New function, extracted and optimised from..
782 (print_insn_powerpc): ..here.
784 2012-03-15 Alan Modra <amodra@gmail.com>
785 James Lemke <jwlemke@codesourcery.com>
787 * disassemble.c (disassemble_init_for_target): Handle ppc init.
788 * ppc-dis.c (private): New var.
789 (powerpc_init_dialect): Don't return calloc failure, instead use
791 (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
792 (powerpc_opcd_indices): New array.
793 (disassemble_init_powerpc): New function.
794 (print_insn_big_powerpc): Don't init dialect here.
795 (print_insn_little_powerpc): Likewise.
796 (print_insn_powerpc): Start search using powerpc_opcd_indices.
798 2012-03-10 Edmar Wienskoski <edmar@freescale.com>
800 * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
801 * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
802 (PPCVEC2, PPCTMR, E6500): New short names.
803 (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
804 mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
805 lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
806 lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
807 lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
808 optional operands on sync instruction for E6500 target.
810 2012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
812 * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
814 2012-02-27 Alan Modra <amodra@gmail.com>
816 * mt-dis.c: Regenerate.
818 2012-02-27 Alan Modra <amodra@gmail.com>
820 * v850-opc.c (extract_v8): Rearrange to make it obvious this
821 is the inverse of corresponding insert function.
822 (extract_d22, extract_u9, extract_r4): Likewise.
823 (extract_d9): Correct sign extension.
824 (extract_d16_15): Don't assume "long" is 32 bits, and don't
825 rely on implementation defined behaviour for shift right of
827 (extract_d16_16, extract_d17_16, extract_i9): Likewise.
828 (extract_d23): Likewise, and correct mask.
830 2012-02-27 Alan Modra <amodra@gmail.com>
832 * crx-dis.c (print_arg): Mask constant to 32 bits.
833 * crx-opc.c (cst4_map): Use int array.
835 2012-02-27 Alan Modra <amodra@gmail.com>
837 * arc-dis.c (BITS): Don't use shifts to mask off bits.
838 (FIELDD): Sign extend with xor,sub.
840 2012-02-25 Walter Lee <walt@tilera.com>
842 * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
843 * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
844 TILEPRO_OPC_LW_TLS_SN.
846 2012-02-21 H.J. Lu <hongjiu.lu@intel.com>
848 * i386-opc.h (HLEPrefixNone): New.
849 (HLEPrefixLock): Likewise.
850 (HLEPrefixAny): Likewise.
851 (HLEPrefixRelease): Likewise.
853 2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
855 * i386-dis.c (HLE_Fixup1): New.
856 (HLE_Fixup2): Likewise.
857 (HLE_Fixup3): Likewise.
864 (MOD_C6_REG_7): Likewise.
865 (MOD_C7_REG_7): Likewise.
866 (RM_C6_REG_7): Likewise.
867 (RM_C7_REG_7): Likewise.
868 (XACQUIRE_PREFIX): Likewise.
869 (XRELEASE_PREFIX): Likewise.
870 (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
871 cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
872 Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
873 (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
874 not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
875 MOD_C6_REG_7 and MOD_C7_REG_7.
876 (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
877 (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
879 (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
880 (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
882 * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
884 (cpu_flags): Add CpuHLE and CpuRTM.
885 (opcode_modifiers): Add HLEPrefixOk.
887 * i386-opc.h (CpuHLE): New.
889 (HLEPrefixOk): Likewise.
890 (i386_cpu_flags): Add cpuhle and cpurtm.
891 (i386_opcode_modifier): Add hleprefixok.
893 * i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
894 add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
895 sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
896 operand. Add xacquire, xrelease, xabort, xbegin, xend and
898 * i386-init.h: Regenerated.
899 * i386-tbl.h: Likewise.
901 2012-01-24 DJ Delorie <dj@redhat.com>
903 * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
904 * rl78-decode.c: Regenerate.
906 2012-01-17 James Murray <jsm@jsm-net.demon.co.uk>
909 * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
911 2012-01-17 Andreas Schwab <schwab@linux-m68k.org>
913 * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
914 register and move them after pmove with PSR/PCSR register.
916 2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
918 * i386-dis.c (mod_table): Add vmfunc.
920 * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
921 (cpu_flags): CpuVMFUNC.
923 * i386-opc.h (CpuVMFUNC): New.
924 (i386_cpu_flags): Add cpuvmfunc.
926 * i386-opc.tbl: Add vmfunc.
927 * i386-init.h: Regenerated.
928 * i386-tbl.h: Likewise.
930 For older changes see ChangeLog-2011
936 version-control: never