opcodes/ChangeLog

   1 2014-08-13  Mike Frysinger  <vapier@gentoo.org>
   2
   3         * bfin-dis.c (comment, parallel): Move from global scope ...
   4         (struct private): ... to this new struct.
   5         (decode_ProgCtrl_0, decode_CaCTRL_0, decode_PushPopReg_0,
   6         decode_PushPopMultiple_0, decode_ccMV_0, decode_CCflag_0,
   7         decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
   8         decode_LOGI2op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
   9         decode_dagMODik_0, decode_LoopSetup_0, decode_LDIMMhalf_0,
  10         decode_CALLa_0, decode_linkage_0, decode_pseudoDEBUG_0,
  11         decode_pseudoOChar_0, decode_pseudodbg_assert_0, _print_insn_bfin,
  12         print_insn_bfin): Declare private struct.  Use priv's comment and
  13         parallel members.
  14
  15 2014-08-13  Mike Frysinger  <vapier@gentoo.org>
  16
  17         * bfin-dis.c (ifetch): Do not align pc to 2 bytes.
  18         (_print_insn_bfin): Add check for unaligned pc.
  19
  20 2014-08-13  Mike Frysinger  <vapier@gentoo.org>
  21
  22         * bfin-dis.c (ifetch): New function.
  23         (_print_insn_bfin, print_insn_bfin): Call new ifetch and return
  24         -1 when it errors.
  25
  26 2014-07-29  Matthew Fortune  <matthew.fortune@imgtec.com>
  27
  28         * micromips-opc.c (COD): Rename throughout to...
  29         (CM): New define, update to use INSN_COPROC_MOVE.
  30         (LCD): Rename throughout to...
  31         (LC): New define, update to use INSN_LOAD_COPROC.
  32         * mips-opc.c: Likewise.
  33
  34 2014-07-29  Matthew Fortune  <matthew.fortune@imgtec.com>
  35
  36         * micromips-opc.c (COD, LCD) New macros.
  37         (cfc1, ctc1): Remove FP_S attribute.
  38         (dmfc1, mfc1, mfhc1): Add LCD attribute.
  39         (dmtc1, mtc1, mthc1): Add COD attribute.
  40         * mips-opc.c (cfc1, cftc1, ctc, cttc1): Remove FP_S attribute.
  41
  42 2014-07-22  Sergey Guriev  <sergey.s.guriev@intel.com>
  43             Alexander Ivchenko  <alexander.ivchenko@intel.com>
  44             Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
  45             Sergey Lega  <sergey.s.lega@intel.com>
  46             Anna Tikhonova  <anna.tikhonova@intel.com>
  47             Ilya Tocar  <ilya.tocar@intel.com>
  48             Andrey Turetskiy  <andrey.turetskiy@intel.com>
  49             Ilya Verbin  <ilya.verbin@intel.com>
  50             Kirill Yukhin  <kirill.yukhin@intel.com>
  51             Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
  52
  53         * i386-dis-evex.h: Updated.
  54         * i386-dis.c (PREFIX enum): Add PREFIX_EVEX_0F54, PREFIX_EVEX_0F55,
  55         PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0F3A16,
  56         PREFIX_EVEX_0F3A22, PREFIX_EVEX_0F3A50, PREFIX_EVEX_0F3A51,
  57         PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66,
  58         PREFIX_EVEX_0F3A67.
  59         (VEX_LEN enum): Add VEX_LEN_0F92_P_2, VEX_LEN_0F93_P_2,
  60         VEX_W_0F92_P_2_LEN_0, VEX_W_0F93_P_2_LEN_0.
  61         (VEX_W enum): Add EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0,
  62         EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2, EVEX_W_0F57_P_0,
  63         EVEX_W_0F57_P_2, EVEX_W_0F78_P_2, EVEX_W_0F79_P_2, EVEX_W_0F7A_P_2,
  64         EVEX_W_0F7B_P_2, EVEX_W_0F3838_P_1, EVEX_W_0F3839_P_1,
  65         EVEX_W_0F3A16_P_2, EVEX_W_0F3A22_P_2, EVEX_W_0F3A50_P_2,
  66         EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2, EVEX_W_0F3A57_P_2,
  67         EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2.
  68         (prefix_table): Add entries for new instructions.
  69         (vex_len_table): Ditto.
  70         (vex_w_table): Ditto.
  71         (OP_E_memory): Update xmmq_mode handling.
  72         * i386-gen.c (cpu_flag_init): Add CPU_AVX512DQ_FLAGS.
  73         (cpu_flags): Add CpuAVX512DQ.
  74         * i386-init.h: Regenerared.
  75         * i386-opc.h (CpuAVX512DQ): New.
  76         (i386_cpu_flags): Add cpuavx512dq.
  77         * i386-opc.tbl: Add AVX512DQ instructions.
  78         * i386-tbl.h: Regenerate.
  79
  80 2014-07-22  Sergey Guriev  <sergey.s.guriev@intel.com>
  81             Alexander Ivchenko  <alexander.ivchenko@intel.com>
  82             Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
  83             Sergey Lega  <sergey.s.lega@intel.com>
  84             Anna Tikhonova  <anna.tikhonova@intel.com>
  85             Ilya Tocar  <ilya.tocar@intel.com>
  86             Andrey Turetskiy  <andrey.turetskiy@intel.com>
  87             Ilya Verbin  <ilya.verbin@intel.com>
  88             Kirill Yukhin  <kirill.yukhin@intel.com>
  89             Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
  90
  91         * i386-dis-evex.h: Add new instructions (prefixes bellow).
  92         * i386-dis.c (fetch_data): Add EdqwS, Edb, Edw, MaskBDE.
  93         (enum): Add dqw_swap_mode, db_mode, dw_mode, mask_bd_mode, REG_EVEX_0F71.
  94         (PREFIX enum): Add PREFIX_VEX_0F4A, PREFIX_VEX_0F99, PREFIX_VEX_0F3A31,
  95         PREFIX_VEX_0F3A33, PREFIX_EVEX_0F60, PREFIX_EVEX_0F61, PREFIX_EVEX_0F63,
  96         PREFIX_EVEX_0F64, PREFIX_EVEX_0F65, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
  97         PREFIX_EVEX_0F69, PREFIX_EVEX_0F6B, PREFIX_EVEX_0F71_REG_2, PREFIX_EVEX_0F71_REG_4,
  98         PREFIX_EVEX_0F71_REG_6, PREFIX_EVEX_0F73_REG_3, PREFIX_EVEX_0F73_REG_7,
  99         PREFIX_EVEX_0F74, PREFIX_EVEX_0F75, PREFIX_EVEX_0FC4, PREFIX_EVEX_0FC5,
 100         PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5, PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9,
 101         PREFIX_EVEX_0FDA, PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
 102         PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3, PREFIX_EVEX_0FE4,
 103         PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8, PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA,
 104         PREFIX_EVEX_0FEC, PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
 105         PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8, PREFIX_EVEX_0FF9,
 106         PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD, PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804,
 107         PREFIX_EVEX_0F380B, PREFIX_EVEX_0F3810, PREFIX_EVEX_0F381C, PREFIX_EVEX_0F381D,
 108         PREFIX_EVEX_0F3820, PREFIX_EVEX_0F3826, PREFIX_EVEX_0F382B, PREFIX_EVEX_0F3830,
 109         PREFIX_EVEX_0F3838, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E, PREFIX_EVEX_0F3866,
 110         PREFIX_EVEX_0F3875, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879, PREFIX_EVEX_0F387A,
 111         PREFIX_EVEX_0F387B, PREFIX_EVEX_0F387D, PREFIX_EVEX_0F388D, PREFIX_EVEX_0F3A0F,
 112         PREFIX_EVEX_0F3A14, PREFIX_EVEX_0F3A15, PREFIX_EVEX_0F3A20, PREFIX_EVEX_0F3A3E,
 113         PREFIX_EVEX_0F3A3F, PREFIX_EVEX_0F3A42.
 114         (VEX_LEN enum): Add VEX_LEN_0F41_P_2, VEX_LEN_0F42_P_2, VEX_LEN_0F44_P_2,
 115         VEX_LEN_0F45_P_2, VEX_LEN_0F46_P_2, VEX_LEN_0F47_P_2, VEX_LEN_0F4A_P_0,
 116         VEX_LEN_0F4A_P_2, VEX_LEN_0F4B_P_0, VEX_LEN_0F90_P_2, VEX_LEN_0F91_P_2,
 117         VEX_LEN_0F92_P_3, VEX_LEN_0F93_P_3, VEX_LEN_0F98_P_2, VEX_LEN_0F99_P_0,
 118         VEX_LEN_0F99_P_2, VEX_LEN_0F3A31_P_2, VEX_LEN_0F3A33_P_2, VEX_W_0F41_P_2_LEN_1,
 119         VEX_W_0F42_P_2_LEN_1, VEX_W_0F44_P_2_LEN_0, VEX_W_0F45_P_2_LEN_1,
 120         VEX_W_0F46_P_2_LEN_1, VEX_W_0F47_P_2_LEN_1, VEX_W_0F4A_P_0_LEN_1,
 121         VEX_W_0F4A_P_2_LEN_1, VEX_W_0F4B_P_0_LEN_1, VEX_W_0F90_P_2_LEN_0,
 122         VEX_W_0F91_P_2_LEN_0, VEX_W_0F92_P_3_LEN_0, VEX_W_0F93_P_3_LEN_0,
 123         VEX_W_0F98_P_2_LEN_0, VEX_W_0F99_P_0_LEN_0, VEX_W_0F99_P_2_LEN_0,
 124         VEX_W_0F3A31_P_2_LEN_0, VEX_W_0F3A33_P_2_LEN_0.
 125         (VEX_W enum): Add EVEX_W_0F6B_P_2, EVEX_W_0F6F_P_3, EVEX_W_0F7F_P_3,
 126         EVEX_W_0F3810_P_1, EVEX_W_0F3810_P_2, EVEX_W_0F3811_P_2, EVEX_W_0F3812_P_2,
 127         EVEX_W_0F3820_P_1, EVEX_W_0F3826_P_1, EVEX_W_0F3826_P_2, EVEX_W_0F3828_P_1,
 128         EVEX_W_0F3829_P_1, EVEX_W_0F382B_P_2, EVEX_W_0F3830_P_1, EVEX_W_0F3866_P_2,
 129         EVEX_W_0F3875_P_2, EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, EVEX_W_0F387A_P_2,
 130         EVEX_W_0F387B_P_2, EVEX_W_0F387D_P_2, EVEX_W_0F388D_P_2, EVEX_W_0F3A3E_P_2,
 131         EVEX_W_0F3A3F_P_2, EVEX_W_0F3A42_P_2.
 132         (prefix_table): Add entries for new instructions.
 133         (vex_table) : Ditto.
 134         (vex_len_table): Ditto.
 135         (vex_w_table): Ditto.
 136         (intel_operand_size): Add db_mode, dw_mode, dqw_swap_mode,
 137         mask_bd_mode handling.
 138         (OP_E_register): Add dqw_swap_mode, dw_mode, db_mode, mask_bd_mode
 139         handling.
 140         (OP_E_memory): Add dqw_mode, dw_mode, dqw_swap_mode, dqb_mode, db_mode
 141         handling.
 142         (OP_G): Add db_mode, dw_mode, dqw_swap_mode, mask_bd_mode handling.
 143         (OP_EX): Add dqw_swap_mode handling.
 144         (OP_VEX): Add mask_bd_mode handling.
 145         (OP_Mask): Add mask_bd_mode handling.
 146         * i386-gen.c (cpu_flag_init): Add CPU_AVX512BW_FLAGS.
 147         (cpu_flags): Add CpuAVX512BW.
 148         * i386-init.h: Regenerated.
 149         * i386-opc.h (CpuAVX512BW): New.
 150         (i386_cpu_flags): Add cpuavx512bw.
 151         * i386-opc.tbl: Add AVX512BW instructions.
 152         * i386-tbl.h: Regenerate.
 153
 154 2014-07-22  Sergey Guriev  <sergey.s.guriev@intel.com>
 155             Alexander Ivchenko  <alexander.ivchenko@intel.com>
 156             Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
 157             Sergey Lega  <sergey.s.lega@intel.com>
 158             Anna Tikhonova  <anna.tikhonova@intel.com>
 159             Ilya Tocar  <ilya.tocar@intel.com>
 160             Andrey Turetskiy  <andrey.turetskiy@intel.com>
 161             Ilya Verbin  <ilya.verbin@intel.com>
 162             Kirill Yukhin  <kirill.yukhin@intel.com>
 163             Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 164
 165         * i386-opc.tbl: Add AVX512VL and AVX512CD instructions.
 166         * i386-tbl.h: Regenerate.
 167
 168 2014-07-22  Sergey Guriev  <sergey.s.guriev@intel.com>
 169             Alexander Ivchenko  <alexander.ivchenko@intel.com>
 170             Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
 171             Sergey Lega  <sergey.s.lega@intel.com>
 172             Anna Tikhonova  <anna.tikhonova@intel.com>
 173             Ilya Tocar  <ilya.tocar@intel.com>
 174             Andrey Turetskiy  <andrey.turetskiy@intel.com>
 175             Ilya Verbin  <ilya.verbin@intel.com>
 176             Kirill Yukhin  <kirill.yukhin@intel.com>
 177             Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 178
 179         * i386-dis.c (intel_operand_size): Support 128/256 length in
 180         vex_vsib_q_w_dq_mode.
 181         (OP_E_memory): Add ymmq_mode handling, handle new broadcast.
 182         * i386-gen.c (cpu_flag_init): Add CPU_AVX512VL_FLAGS.
 183         (cpu_flags): Add CpuAVX512VL.
 184         * i386-init.h: Regenerated.
 185         * i386-opc.h (CpuAVX512VL): New.
 186         (i386_cpu_flags): Add cpuavx512vl.
 187         (BROADCAST_1TO4, BROADCAST_1TO2): Define.
 188         * i386-opc.tbl: Add AVX512VL instructions.
 189         * i386-tbl.h: Regenerate.
 190
 191 2014-07-20  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 192
 193         * or1k-desc.c, * or1k-desc.h, * or1k-opc.c, * or1k-opc.h,
 194         * or1k-opinst.c: Regenerate.
 195
 196 2014-07-08  Ilya Tocar  <ilya.tocar@intel.com>
 197
 198         * i386-dis-evex.h (EVEX_W_0F10_P_1_M_1): Fix vmovss.
 199         (EVEX_W_0F10_P_3_M_1): Fix vmovsd.
 200
 201 2014-07-04  Alan Modra  <amodra@gmail.com>
 202
 203         * configure.ac: Rename from configure.in.
 204         * Makefile.in: Regenerate.
 205         * config.in: Regenerate.
 206
 207 2014-07-04  Alan Modra  <amodra@gmail.com>
 208
 209         * configure.in: Include bfd/version.m4.
 210         (AC_INIT, AM_INIT_AUTOMAKE): Use modern form.
 211         (BFD_VERSION): Delete.
 212         * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in.
 213         * configure: Regenerate.
 214         * Makefile.in: Regenerate.
 215
 216 2014-07-01  Barney Stratford   <barney_stratford@fastmail.fm>
 217             Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>
 218             Pitchumani Sivanupandi  <pitchumani.s@atmel.com>
 219             Soundararajan  <Sounderarajan.D@atmel.com>
 220
 221         * avr-dis.c (avr_operand): Handle constraint j for 16 bit lds/sts.
 222         (print_insn_avr): Do not select opcode if insn ISA is avrtiny and
 223         machine is not avrtiny.
 224
 225 2014-06-26  Philippe De Muyter <phdm@macqel.be>
 226
 227         * or1k-desc.h (spr_field_masks): Add U suffix to the end of long
 228         constants.
 229
 230 2014-06-12  Alan Modra  <amodra@gmail.com>
 231
 232         * or1k-asm.c, * or1k-desc.c, * or1k-desc.h, * or1k-dis.c,
 233         * or1k-ibld.c, * or1k-opc.c, * or1k-opc.h, * or1k-opinst.c: Regenerate.
 234
 235 2014-06-10  H.J. Lu  <hongjiu.lu@intel.com>
 236
 237         * i386-dis.c (fwait_prefix): New.
 238         (ckprefix): Set fwait_prefix.
 239         (print_insn): Properly print prefixes before fwait.
 240
 241 2014-06-07  Alan Modra  <amodra@gmail.com>
 242
 243         * ppc-opc.c (UISIGNOPT): Define and use with cmpli.
 244
 245 2014-06-05  Joel Brobecker  <brobecker@adacore.com>
 246
 247         * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on
 248         bfd's development.sh.
 249         * Makefile.in, configure: Regenerate.
 250
 251 2014-06-03  Nick Clifton  <nickc@redhat.com>
 252
 253         * msp430-dis.c (msp430_doubleoperand): Use extension_word to
 254         decide when extended addressing is being used.
 255
 256 2014-06-02  Eric Botcazou  <ebotcazou@adacore.com>
 257
 258         * sparc-opc.c (cas): Disable for LEON.
 259         (casl): Likewise.
 260
 261 2014-05-20  Alan Modra  <amodra@gmail.com>
 262
 263         * m68k-dis.c: Don't include setjmp.h.
 264
 265 2014-05-09  H.J. Lu  <hongjiu.lu@intel.com>
 266
 267         * i386-dis.c (ADDR16_PREFIX): Removed.
 268         (ADDR32_PREFIX): Likewise.
 269         (DATA16_PREFIX): Likewise.
 270         (DATA32_PREFIX): Likewise.
 271         (prefix_name): Updated.
 272         (print_insn): Simplify data and address size prefixes processing.
 273
 274 2014-05-08  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 275
 276         * or1k-desc.c: Regenerated.
 277         * or1k-desc.h: Likewise.
 278         * or1k-opc.c: Likewise.
 279         * or1k-opc.h: Likewise.
 280         * or1k-opinst.c: Likewise.
 281
 282 2014-05-07  Andrew Bennett  <andrew.bennett@imgtec.com>
 283
 284         * mips-opc.c (mips_builtin_opcodes): Add MIPS32r5 eretnc instruction.
 285         (I34): New define.
 286         (I36): New define.
 287         (I66): New define.
 288         (I68): New define.
 289         * mips-dis.c (mips_arch_choices): Add mips32r3, mips32r5, mips64r3 and
 290         mips64r5.
 291         (parse_mips_dis_option): Update MSA and virtualization support to
 292         allow mips64r3 and mips64r5.
 293
 294 2014-05-07  Andrew Bennett  <andrew.bennett@imgtec.com>
 295
 296         * mips-opc.c (G3): Remove I4.
 297
 298 2014-05-05  H.J. Lu  <hongjiu.lu@intel.com>
 299
 300         PR binutils/16893
 301         * i386-dis.c (twobyte_has_mandatory_prefix): New variable.
 302         (end_codep): Likewise.
 303         (mandatory_prefix): Likewise.
 304         (active_seg_prefix): Likewise.
 305         (ckprefix): Set active_seg_prefix to the active segment register
 306         prefix.
 307         (seg_prefix): Removed.
 308         (get_valid_dis386): Use the last of PREFIX_REPNZ and PREFIX_REPZ
 309         for prefix index.  Ignore the index if it is invalid and the
 310         mandatory prefix isn't required.
 311         (print_insn): Set mandatory_prefix if the PREFIX_XXX prefix is
 312         mandatory.  Don't set PREFIX_REPZ/PREFIX_REPNZ/PREFIX_LOCK bits
 313         in used_prefixes here.  Don't print unused prefixes.  Check
 314         active_seg_prefix for the active segment register prefix.
 315         Restore the DFLAG bit in sizeflag if the data size prefix is
 316         unused.  Check the unused mandatory PREFIX_XXX prefixes
 317         (append_seg): Only print the segment register which gets used.
 318         (OP_E_memory): Check active_seg_prefix for the segment register
 319         prefix.
 320         (OP_OFF): Likewise.
 321         (OP_OFF64): Likewise.
 322         (OP_DSreg): Set active_seg_prefix to PREFIX_DS if it is unset.
 323
 324 2014-05-02  H.J. Lu  <hongjiu.lu@intel.com>
 325
 326         PR binutils/16886
 327         * config.in: Regenerated.
 328         * configure: Likewise.
 329         * configure.in: Check if sigsetjmp is available.
 330         * h8500-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
 331         (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
 332         (print_insn_h8500): Replace setjmp with OPCODES_SIGSETJMP.
 333         * i386-dis.c (dis_private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
 334         (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
 335         (print_insn): Replace setjmp with OPCODES_SIGSETJMP.
 336         * ns32k-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
 337         (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
 338         (print_insn_ns32k): Replace setjmp with OPCODES_SIGSETJMP.
 339         * sysdep.h (OPCODES_SIGJMP_BUF): New macro.
 340         (OPCODES_SIGSETJMP): Likewise.
 341         (OPCODES_SIGLONGJMP): Likewise.
 342         * vax-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
 343         (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
 344         (print_insn_vax): Replace setjmp with OPCODES_SIGSETJMP.
 345         * xtensa-dis.c (dis_private): Replace jmp_buf with
 346         OPCODES_SIGJMP_BUF.
 347         (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
 348         (print_insn_xtensa): Replace setjmp with OPCODES_SIGSETJMP.
 349         * z8k-dis.c(instr_data_s): Replace jmp_buf with OPCODES_SIGJMP_BUF.
 350         (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
 351         (print_insn_z8k): Replace setjmp with OPCODES_SIGSETJMP.
 352
 353 2014-05-01  H.J. Lu  <hongjiu.lu@intel.com>
 354
 355         PR binutils/16891
 356         * i386-dis.c (print_insn): Handle prefixes before fwait.
 357
 358 2014-04-26  Alan Modra  <amodra@gmail.com>
 359
 360         * po/POTFILES.in: Regenerate.
 361
 362 2014-04-23  Andrew Bennett  <andrew.bennett@imgtec.com>
 363
 364         * mips-dis.c (mips_arch_choices): Update mips32r2 and mips64r2
 365         to allow the MIPS XPA ASE.
 366         (parse_mips_dis_option): Process the -Mxpa option.
 367         * mips-opc.c (XPA): New define.
 368         (mips_builtin_opcodes): Add MIPS XPA instructions and move the
 369         locations of the ctc0 and cfc0 instructions.
 370
 371 2014-04-22  Christian Svensson  <blue@cmd.nu>
 372
 373         * Makefile.am: Remove openrisc and or32 support.  Add support for or1k.
 374         * configure.in: Likewise.
 375         * disassemble.c: Likewise.
 376         * or1k-asm.c: New file.
 377         * or1k-desc.c: New file.
 378         * or1k-desc.h: New file.
 379         * or1k-dis.c: New file.
 380         * or1k-ibld.c: New file.
 381         * or1k-opc.c: New file.
 382         * or1k-opc.h: New file.
 383         * or1k-opinst.c: New file.
 384         * Makefile.in: Regenerate.
 385         * configure: Regenerate.
 386         * openrisc-asm.c: Delete.
 387         * openrisc-desc.c: Delete.
 388         * openrisc-desc.h: Delete.
 389         * openrisc-dis.c: Delete.
 390         * openrisc-ibld.c: Delete.
 391         * openrisc-opc.c: Delete.
 392         * openrisc-opc.h: Delete.
 393         * or32-dis.c: Delete.
 394         * or32-opc.c: Delete.
 395
 396 2014-04-04  Ilya Tocar  <ilya.tocar@intel.com>
 397
 398         * i386-dis.c (rm_table): Add encls, enclu.
 399         * i386-gen.c (cpu_flag_init): Add CPU_SE1_FLAGS,
 400         (cpu_flags): Add CpuSE1.
 401         * i386-opc.h (enum): Add CpuSE1.
 402         (i386_cpu_flags): Add cpuse1.
 403         * i386-opc.tbl: Add encls, enclu.
 404         * i386-init.h: Regenerated.
 405         * i386-tbl.h: Likewise.
 406
 407 2014-04-02  Anthony Green  <green@moxielogic.com>
 408
 409         * moxie-opc.c (moxie_form1_opc_info): Add sign-extension
 410         instructions, sex.b and sex.s.
 411
 412 2014-03-26  Jiong Wang  <jiong.wang@arm.com>
 413
 414         * aarch64-dis.c (aarch64_ext_ldst_elemlist): Check H/S undefined
 415         instructions.
 416
 417 2014-03-20  Ilya Tocar  <ilya.tocar@intel.com>
 418
 419         * i386-opc.tbl: Change memory size for vgatherpf0qps, vgatherpf1qps,
 420         vscatterpf0qps, vscatterpf1qps, vgatherqps, vpgatherqd, vpscatterqd,
 421         vscatterqps.
 422         * i386-tbl.h: Regenerate.
 423
 424 2014-03-19  Jose E. Marchesi  <jose.marchesi@oracle.com>
 425
 426         * sparc-dis.c (v9_hpriv_reg_names): Names for %hstick_offset and
 427         %hstick_enable added.
 428
 429 2014-03-19  Nick Clifton  <nickc@redhat.com>
 430
 431         * rx-decode.opc (bwl): Allow for bogus instructions with a size
 432         field of 3.
 433         (sbwl, ubwl, SCALE): Likewise.
 434         * rx-decode.c: Regenerate.
 435
 436 2014-03-12  Alan Modra  <amodra@gmail.com>
 437
 438         * Makefile.in: Regenerate.
 439
 440 2014-03-05  Alan Modra  <amodra@gmail.com>
 441
 442         Update copyright years.
 443
 444 2014-03-04  Heiher  <r@hev.cc>
 445
 446         * mips-dis.c (mips_arch_choices): Usee ISA_MIPS64R2 for Loongson-3A.
 447
 448 2014-03-04  Richard Sandiford  <rdsandiford@googlemail.com>
 449
 450         * mips-opc.c (mips_builtin_opcodes): Move the udi* instructions
 451         so that they come after the Loongson extensions.
 452
 453 2014-03-03  Alan Modra  <amodra@gmail.com>
 454
 455         * i386-gen.c (process_copyright): Emit copyright notice on one line.
 456
 457 2014-02-28  Alan Modra  <amodra@gmail.com>
 458
 459         * msp430-decode.c: Regenerate.
 460
 461 2014-02-27  Jiong Wang  <jiong.wang@arm.com>
 462
 463         * aarch64-tbl.h (aarch64_opcode_table): Replace IMM0 with
 464         FPIMM0 for fcmeq, fcmgt, fcmge, fcmlt and fcmle.
 465
 466 2014-02-27  Yufeng Zhang  <yufeng.zhang@arm.com>
 467
 468         * aarch64-opc.c (print_register_offset_address): Call
 469         get_int_reg_name to prepare the register name.
 470
 471 2014-02-25  Ilya Tocar  <ilya.tocar@intel.com>
 472
 473         * i386-opc.tbl: Remove wrong variant of vcvtps2ph
 474         * i386-tbl.h: Regenerate.
 475
 476 2014-02-20  Ilya Tocar  <ilya.tocar@intel.com>
 477
 478         * i386-gen.c (cpu_flag_init): Add CPU_PREFETCHWT1_FLAGS/
 479         (cpu_flags): Add CpuPREFETCHWT1.
 480         * i386-init.h: Regenerate.
 481         * i386-opc.h (CpuPREFETCHWT1): New.
 482         (i386_cpu_flags): Add cpuprefetchwt1.
 483         * i386-opc.tbl: Cahnge CPU of prefetchwt1 from CpuAVX512PF to CpuPREFETCHWT1.
 484         * i386-tbl.h: Regenerate.
 485
 486 2014-02-20  Ilya Tocar  <ilya.tocar@intel.com>
 487
 488         * i386-opc.tbl: Change CPU of vptestnmq, vptestnmd from CpuAVX512CD,
 489         to CpuAVX512F.
 490         * i386-tbl.h: Regenerate.
 491
 492 2014-02-19  H.J. Lu  <hongjiu.lu@intel.com>
 493
 494         * i386-gen.c (output_cpu_flags): Don't output trailing space.
 495         (output_opcode_modifier): Likewise.
 496         (output_operand_type): Likewise.
 497         * i386-init.h: Regenerated.
 498         * i386-tbl.h: Likewise.
 499
 500 2014-02-12  Ilya Tocar  <ilya.tocar@intel.com>
 501
 502         * i386-dis.c (MOD enum): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4,
 503         MOD_0FC7_REG_5.
 504         (PREFIX enum): Add PREFIX_0FAE_REG_7.
 505         (reg_table): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4 MOD_0FC7_REG_5.
 506         (prefix_table): Add clflusopt.
 507         (mod_table): Add xrstors, xsavec, xsaves.
 508         * i386-gen.c (cpu_flag_init): Add CPU_CLFLUSHOPT_FLAGS,
 509         CPU_XSAVES_FLAGS, CPU_XSAVEC_FLAGS.
 510         (cpu_flags): Add CpuClflushOpt, CpuXSAVES, CpuXSAVEC.
 511         * i386-init.h: Regenerate.
 512         * i386-opc.tbl: Add clflushopt, xrstors, xrstors64, xsaves,
 513         xsaves64, xsavec, xsavec64.
 514         * i386-tbl.h: Regenerate.
 515
 516 2014-02-10  Alan Modra  <amodra@gmail.com>
 517
 518         * po/POTFILES.in: Regenerate.
 519         * po/opcodes.pot: Regenerate.
 520
 521 2014-01-30  Michael Zolotukhin  <michael.v.zolotukhin@gmail.com>
 522             Jan Beulich  <jbeulich@suse.com>
 523
 524         PR binutils/16490
 525         * i386-dis.c (OP_E_memory): Fix shift computation for
 526         vex_vsib_q_w_dq_mode.
 527
 528 2014-01-09  Bradley Nelson  <bradnelson@google.com>
 529             Roland McGrath  <mcgrathr@google.com>
 530
 531         * i386-dis.c (print_insn): Do not touch all_prefixes[-1] when
 532         last_rex_prefix is -1.
 533
 534 2014-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 535
 536         * i386-gen.c (process_copyright): Update copyright year to 2014.
 537
 538 2014-01-03  Maciej W. Rozycki  <macro@codesourcery.com>
 539
 540         * nds32-asm.c (parse_operand): Fix out-of-range integer constant.
 541
 542 For older changes see ChangeLog-2013
 543 \f
 544 Copyright (C) 2014 Free Software Foundation, Inc.
 545
 546 Copying and distribution of this file, with or without modification,
 547 are permitted in any medium without royalty provided the copyright
 548 notice and this notice are preserved.
 549
 550 Local Variables:
 551 mode: change-log
 552 left-margin: 8
 553 fill-column: 74
 554 version-control: never
 555 End: