* gas/config/tc-arm.c (NEON_ENC_TAB): Add vmaxnm, vminnm entries.
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
2
3 * arm-dis.c (coprocessor_opcodes): Add VMAXNM/VMINNM.
4 (neon_opcodes): Likewise.
5
6 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
7
8 * arm-dis.c (coprocessor_opcodes): Add VSEL.
9 (print_insn_coprocessor): Add new %<>c bitfield format
10 specifier.
11
12 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
13
14 * arm-dis.c (arm_opcodes): Add LDRA/STRL instructions.
15 (thumb32_opcodes): Likewise.
16 (print_arm_insn): Add support for %<>T formatter.
17
18 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
19
20 * arm-dis.c (arm_opcodes): Add HLT.
21 (thumb_opcodes): Likewise.
22
23 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
24
25 * arm-dis.c (thumb32_opcodes): Add DCPS instruction.
26
27 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
28
29 * arm-dis.c (arm_opcodes): Add SEVL.
30 (thumb_opcodes): Likewise.
31 (thumb32_opcodes): Likewise.
32
33 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
34
35 * arm-dis.c (data_barrier_option): New function.
36 (print_insn_arm): Use data_barrier_option.
37 (print_insn_thumb32): Use data_barrier_option.
38
39 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com
40
41 * arm-dis.c (COND_UNCOND): New constant.
42 (print_insn_coprocessor): Add support for %u format specifier.
43 (print_insn_neon): Likewise.
44
45 2012-08-21 David S. Miller <davem@davemloft.net>
46
47 * sparc-opc.c (4-argument crypto instructions): Fix encoding using
48 F3F4 macro.
49
50 2012-08-20 Edmar Wienskoski <edmar@freescale.com>
51
52 * ppc-opc.c (powerpc_opcodes): Changed opcode for vabsdub,
53 vabsduh, vabsduw, mviwsplt.
54
55 2012-08-17 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
56
57 * i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and
58 CPU_BTVER2_FLAGS.
59
60 * i386-opc.h: Update CpuPRFCHW comment.
61
62 * i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW.
63 * i386-init.h: Regenerated.
64 * i386-tbl.h: Likewise.
65
66 2012-08-17 Nick Clifton <nickc@redhat.com>
67
68 * po/uk.po: New Ukranian translation.
69 * configure.in (ALL_LINGUAS): Add uk.
70 * configure: Regenerate.
71
72 2012-08-16 Peter Bergner <bergner@vnet.ibm.com>
73
74 * ppc-opc.c (powerpc_opcodes) <"lswx">: Use RAX for the second and
75 RBX for the third operand.
76 <"lswi">: Use RAX for second and NBI for the third operand.
77
78 2012-08-15 DJ Delorie <dj@redhat.com>
79
80 * rl78-decode.opc (rl78_decode_opcode): Merge %e and %[01]
81 operands, so that data addresses can be corrected when not
82 ES-overridden.
83 * rl78-decode.c: Regenerate.
84 * rl78-dis.c (print_insn_rl78): Make order of modifiers
85 irrelevent. When the 'e' specifier is used on an operand and no
86 ES prefix is provided, adjust address to make it absolute.
87
88 2012-08-15 Peter Bergner <bergner@vnet.ibm.com>
89
90 * ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR.
91
92 2012-08-15 Peter Bergner <bergner@vnet.ibm.com>
93
94 * ppc-opc.c <xnop, yield, mdoio, mdoom>: New extended mnemonics.
95
96 2012-08-14 Maciej W. Rozycki <macro@codesourcery.com>
97
98 * mips-dis.c (print_insn_args): Add GET_OP and GET_OP_S local
99 macros, use local variables for info struct member accesses,
100 update the type of the variable used to hold the instruction
101 word.
102 (print_insn_mips, print_mips16_insn_arg): Likewise.
103 (print_insn_mips16): Add GET_OP and GET_OP_S local macros, use
104 local variables for info struct member accesses.
105 (print_insn_micromips): Add GET_OP_S local macro.
106 (_print_insn_mips): Update the type of the variable used to hold
107 the instruction word.
108
109 2012-08-13 Ian Bolton <ian.bolton@arm.com>
110 Laurent Desnogues <laurent.desnogues@arm.com>
111 Jim MacArthur <jim.macarthur@arm.com>
112 Marcus Shawcroft <marcus.shawcroft@arm.com>
113 Nigel Stephens <nigel.stephens@arm.com>
114 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
115 Richard Earnshaw <rearnsha@arm.com>
116 Sofiane Naci <sofiane.naci@arm.com>
117 Tejas Belagod <tejas.belagod@arm.com>
118 Yufeng Zhang <yufeng.zhang@arm.com>
119
120 * Makefile.am: Add AArch64.
121 * Makefile.in: Regenerate.
122 * aarch64-asm.c: New file.
123 * aarch64-asm.h: New file.
124 * aarch64-dis.c: New file.
125 * aarch64-dis.h: New file.
126 * aarch64-gen.c: New file.
127 * aarch64-opc.c: New file.
128 * aarch64-opc.h: New file.
129 * aarch64-tbl.h: New file.
130 * configure.in: Add AArch64.
131 * configure: Regenerate.
132 * disassemble.c: Add AArch64.
133 * aarch64-asm-2.c: New file (automatically generated).
134 * aarch64-dis-2.c: New file (automatically generated).
135 * aarch64-opc-2.c: New file (automatically generated).
136 * po/POTFILES.in: Regenerate.
137
138 2012-08-13 Maciej W. Rozycki <macro@codesourcery.com>
139
140 * micromips-opc.c (micromips_opcodes): Update comment.
141 * mips-opc.c (mips_builtin_opcodes): Likewise. Mark coprocessor
142 instructions for IOCT as appropriate.
143 * mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with
144 opcode_is_member.
145 * configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with
146 the result of a check for the -Wno-missing-field-initializers
147 GCC option.
148 * Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable.
149 (mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to
150 compilation.
151 (mips16-opc.lo): Likewise.
152 (micromips-opc.lo): Likewise.
153 * aclocal.m4: Regenerate.
154 * configure: Regenerate.
155 * Makefile.in: Regenerate.
156
157 2012-08-11 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
158
159 PR gas/14423
160 * i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS.
161 * i386-init.h: Regenerated.
162
163 2012-08-09 Nick Clifton <nickc@redhat.com>
164
165 * po/vi.po: Updated Vietnamese translation.
166
167 2012-08-07 Roland McGrath <mcgrathr@google.com>
168
169 * i386-dis.c (reg_table): Fill out REG_0F0D table with
170 AMD-reserved cases as "prefetch".
171 (MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants.
172 (MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise.
173 (reg_table): Use those under REG_0F18.
174 (mod_table): Add those cases as "nop/reserved".
175
176 2012-08-07 Jan Beulich <jbeulich@suse.com>
177
178 * i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
179
180 2012-08-06 Roland McGrath <mcgrathr@google.com>
181
182 * i386-dis.c (print_insn): Print spaces between multiple excess
183 prefixes. Return actual number of excess prefixes consumed,
184 not always one.
185
186 * i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
187
188 2012-08-06 Roland McGrath <mcgrathr@google.com>
189 Victor Khimenko <khim@google.com>
190 H.J. Lu <hongjiu.lu@intel.com>
191
192 * i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG.
193 (putop): For 'T', 'U', and 'V', treat REX_W like DFLAG.
194 (intel_operand_size): For stack_v_mode, treat REX_W like DFLAG.
195 (OP_E_register): Likewise.
196 (OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
197
198 2012-08-02 Jan-Benedict Glaw <jbglaw@lug-owl.de>
199
200 * configure.in: Formatting.
201 * configure: Regenerate.
202
203 2012-08-01 Alan Modra <amodra@gmail.com>
204
205 * h8300-dis.c: Fix printf arg warnings.
206 * i960-dis.c: Likewise.
207 * mips-dis.c: Likewise.
208 * pdp11-dis.c: Likewise.
209 * sh-dis.c: Likewise.
210 * v850-dis.c: Likewise.
211 * configure.in: Formatting.
212 * configure: Regenerate.
213 * rl78-decode.c: Regenerate.
214 * po/POTFILES.in: Regenerate.
215
216 2012-07-31 Chao-Ying Fu <fu@mips.com>
217 Catherine Moore <clm@codesourcery.com>
218 Maciej W. Rozycki <macro@codesourcery.com>
219
220 * micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
221 (DSP_VOLA): Likewise.
222 (D32, D33): Likewise.
223 (micromips_opcodes): Add DSP ASE instructions.
224 * mips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
225 <'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
226
227 2012-07-31 Jan Beulich <jbeulich@suse.com>
228
229 * i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2
230 instruction group. Mark as requiring AVX2.
231 * i386-tbl.h: Re-generate.
232
233 2012-07-30 Nick Clifton <nickc@redhat.com>
234
235 * po/opcodes.pot: Updated template.
236 * po/es.po: Updated Spanish translation.
237 * po/fi.po: Updated Finnish translation.
238
239 2012-07-27 Mike Frysinger <vapier@gentoo.org>
240
241 * configure.in (BFD_VERSION): Run bfd/configure --version and
242 parse the output of that.
243 * configure: Regenerate.
244
245 2012-07-25 James Lemke <jwlemke@codesourcery.com>
246
247 * ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
248
249 2012-07-24 Stephan McCamant <smcc@cs.berkeley.edu>
250 Dr David Alan Gilbert <dave@treblig.org>
251
252 PR binutils/13135
253 * arm-dis.c: Add necessary casts for printing integer values.
254 Use %s when printing string values.
255 * hppa-dis.c: Likewise.
256 * m68k-dis.c: Likewise.
257 * microblaze-dis.c: Likewise.
258 * mips-dis.c: Likewise.
259 * sparc-dis.c: Likewise.
260
261 2012-07-19 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
262
263 PR binutils/14355
264 * i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
265 (VEX_LEN_0FXOP_08_CD): Likewise.
266 (VEX_LEN_0FXOP_08_CE): Likewise.
267 (VEX_LEN_0FXOP_08_CF): Likewise.
268 (VEX_LEN_0FXOP_08_EC): Likewise.
269 (VEX_LEN_0FXOP_08_ED): Likewise.
270 (VEX_LEN_0FXOP_08_EE): Likewise.
271 (VEX_LEN_0FXOP_08_EF): Likewise.
272 (xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
273 vpcomub, vpcomuw, vpcomud, vpcomuq.
274 (vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
275 VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
276 VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
277 VEX_LEN_0FXOP_08_EF.
278
279 2012-07-16 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
280
281 * i386-dis.c (PREFIX_0F38F6): New.
282 (prefix_table): Add adcx, adox instructions.
283 (three_byte_table): Use PREFIX_0F38F6.
284 (mod_table): Add rdseed instruction.
285 * i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
286 (cpu_flags): Likewise.
287 * i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
288 (i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
289 * i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
290 prefetchw.
291 * i386-tbl.h: Regenerate.
292 * i386-init.h: Likewise.
293
294 2012-07-05 Thomas Schwinge <thomas@codesourcery.com>
295
296 * mips-dis.c: Remove gratuitous newline.
297
298 2012-07-05 Sean Keys <skeys@ipdatasys.com>
299
300 * xgate-dis.c: Removed an IF statement that will
301 always be false due to overlapping operand masks.
302 * xgate-opc.c: Corrected 'com' opcode entry and
303 fixed spacing.
304
305 2012-07-02 Roland McGrath <mcgrathr@google.com>
306
307 * i386-opc.tbl: Add RepPrefixOk to nop.
308 * i386-tbl.h: Regenerate.
309
310 2012-06-28 Nick Clifton <nickc@redhat.com>
311
312 * po/vi.po: Updated Vietnamese translation.
313
314 2012-06-22 Roland McGrath <mcgrathr@google.com>
315
316 * i386-opc.tbl: Add RepPrefixOk to ret.
317 * i386-tbl.h: Regenerate.
318
319 * i386-opc.h (RepPrefixOk): New enum constant.
320 (i386_opcode_modifier): New bitfield 'repprefixok'.
321 * i386-gen.c (opcode_modifiers): Add RepPrefixOk.
322 * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
323 instructions that have IsString.
324 * i386-tbl.h: Regenerate.
325
326 2012-06-11 Andreas Schwab <schwab@linux-m68k.org>
327
328 * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
329 (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
330 (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
331 (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
332 (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
333 (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
334 (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
335 (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
336 (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
337
338 2012-05-19 Alan Modra <amodra@gmail.com>
339
340 * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
341 (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
342
343 2012-05-18 Alan Modra <amodra@gmail.com>
344
345 * ia64-opc.c: Remove #include "ansidecl.h".
346 * z8kgen.c: Include sysdep.h first.
347
348 * arc-dis.c: Include sysdep.h first, remove some redundant includes.
349 * bfin-dis.c: Likewise.
350 * i860-dis.c: Likewise.
351 * ia64-dis.c: Likewise.
352 * ia64-gen.c: Likewise.
353 * m68hc11-dis.c: Likewise.
354 * mmix-dis.c: Likewise.
355 * msp430-dis.c: Likewise.
356 * or32-dis.c: Likewise.
357 * rl78-dis.c: Likewise.
358 * rx-dis.c: Likewise.
359 * tic4x-dis.c: Likewise.
360 * tilegx-opc.c: Likewise.
361 * tilepro-opc.c: Likewise.
362 * rx-decode.c: Regenerate.
363
364 2012-05-17 James Lemke <jwlemke@codesourcery.com>
365
366 * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
367
368 2012-05-17 James Lemke <jwlemke@codesourcery.com>
369
370 * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
371
372 2012-05-17 Daniel Richard G. <skunk@iskunk.org>
373 Nick Clifton <nickc@redhat.com>
374
375 PR 14072
376 * configure.in: Add check that sysdep.h has been included before
377 any system header files.
378 * configure: Regenerate.
379 * config.in: Regenerate.
380 * sysdep.h: Generate an error if included before config.h.
381 * alpha-opc.c: Include sysdep.h before any other header file.
382 * alpha-dis.c: Likewise.
383 * avr-dis.c: Likewise.
384 * cgen-opc.c: Likewise.
385 * cr16-dis.c: Likewise.
386 * cris-dis.c: Likewise.
387 * crx-dis.c: Likewise.
388 * d10v-dis.c: Likewise.
389 * d10v-opc.c: Likewise.
390 * d30v-dis.c: Likewise.
391 * d30v-opc.c: Likewise.
392 * h8500-dis.c: Likewise.
393 * i370-dis.c: Likewise.
394 * i370-opc.c: Likewise.
395 * m10200-dis.c: Likewise.
396 * m10300-dis.c: Likewise.
397 * micromips-opc.c: Likewise.
398 * mips-opc.c: Likewise.
399 * mips61-opc.c: Likewise.
400 * moxie-dis.c: Likewise.
401 * or32-opc.c: Likewise.
402 * pj-dis.c: Likewise.
403 * ppc-dis.c: Likewise.
404 * ppc-opc.c: Likewise.
405 * s390-dis.c: Likewise.
406 * sh-dis.c: Likewise.
407 * sh64-dis.c: Likewise.
408 * sparc-dis.c: Likewise.
409 * sparc-opc.c: Likewise.
410 * spu-dis.c: Likewise.
411 * tic30-dis.c: Likewise.
412 * tic54x-dis.c: Likewise.
413 * tic80-dis.c: Likewise.
414 * tic80-opc.c: Likewise.
415 * tilegx-dis.c: Likewise.
416 * tilepro-dis.c: Likewise.
417 * v850-dis.c: Likewise.
418 * v850-opc.c: Likewise.
419 * vax-dis.c: Likewise.
420 * w65-dis.c: Likewise.
421 * xgate-dis.c: Likewise.
422 * xtensa-dis.c: Likewise.
423 * rl78-decode.opc: Likewise.
424 * rl78-decode.c: Regenerate.
425 * rx-decode.opc: Likewise.
426 * rx-decode.c: Regenerate.
427
428 2012-05-17 Alan Modra <amodra@gmail.com>
429
430 * ppc_dis.c: Don't include elf/ppc.h.
431
432 2012-05-16 Meador Inge <meadori@codesourcery.com>
433
434 * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
435 to PUSH/POP {reg}.
436
437 2012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
438 Stephane Carrez <stcarrez@nerim.fr>
439
440 * configure.in: Add S12X and XGATE co-processor support to m68hc11
441 target.
442 * disassemble.c: Likewise.
443 * configure: Regenerate.
444 * m68hc11-dis.c: Make objdump output more consistent, use hex
445 instead of decimal and use 0x prefix for hex.
446 * m68hc11-opc.c: Add S12X and XGATE opcodes.
447
448 2012-05-14 James Lemke <jwlemke@codesourcery.com>
449
450 * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
451 (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
452 (vle_opcd_indices): New array.
453 (lookup_vle): New function.
454 (disassemble_init_powerpc): Revise for second (VLE) opcode table.
455 (print_insn_powerpc): Likewise.
456 * ppc-opc.c: Likewise.
457
458 2012-05-14 Catherine Moore <clm@codesourcery.com>
459 Maciej W. Rozycki <macro@codesourcery.com>
460 Rhonda Wittels <rhonda@codesourcery.com>
461 Nathan Froyd <froydnj@codesourcery.com>
462
463 * ppc-opc.c (insert_arx, extract_arx): New functions.
464 (insert_ary, extract_ary): New functions.
465 (insert_li20, extract_li20): New functions.
466 (insert_rx, extract_rx): New functions.
467 (insert_ry, extract_ry): New functions.
468 (insert_sci8, extract_sci8): New functions.
469 (insert_sci8n, extract_sci8n): New functions.
470 (insert_sd4h, extract_sd4h): New functions.
471 (insert_sd4w, extract_sd4w): New functions.
472 (insert_vlesi, extract_vlesi): New functions.
473 (insert_vlensi, extract_vlensi): New functions.
474 (insert_vleui, extract_vleui): New functions.
475 (insert_vleil, extract_vleil): New functions.
476 (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
477 (BI16, BI32, BO32, B8): New.
478 (B15, B24, CRD32, CRS): New.
479 (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
480 (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
481 (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
482 (SH6_MASK): Use PPC_OPSHIFT_INV.
483 (SI8, UI5, OIMM5, UI7, BO16): New.
484 (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
485 (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
486 (ALLOW8_SPRG): New.
487 (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
488 (OPVUP, OPVUP_MASK OPVUP): New
489 (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
490 (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
491 (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
492 (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
493 (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
494 (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
495 (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
496 (SE_IM5, SE_IM5_MASK): New.
497 (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
498 (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
499 (BO32DNZ, BO32DZ): New.
500 (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
501 (PPCVLE): New.
502 (powerpc_opcodes): Add new VLE instructions. Update existing
503 instruction to include PPCVLE if supported.
504 * ppc-dis.c (ppc_opts): Add vle entry.
505 (get_powerpc_dialect): New function.
506 (powerpc_init_dialect): VLE support.
507 (print_insn_big_powerpc): Call get_powerpc_dialect.
508 (print_insn_little_powerpc): Likewise.
509 (operand_value_powerpc): Handle negative shift counts.
510 (print_insn_powerpc): Handle 2-byte instruction lengths.
511
512 2012-05-11 Daniel Richard G. <skunk@iskunk.org>
513
514 PR binutils/14028
515 * configure.in: Invoke ACX_HEADER_STRING.
516 * configure: Regenerate.
517 * config.in: Regenerate.
518 * sysdep.h: If STRINGS_WITH_STRING is defined then include both
519 string.h and strings.h.
520
521 2012-05-11 Nick Clifton <nickc@redhat.com>
522
523 PR binutils/14006
524 * arm-dis.c (print_insn): Fix detection of instruction mode in
525 files containing multiple executable sections.
526
527 2012-05-03 Sean Keys <skeys@ipdatasys.com>
528
529 * Makefile.in, configure: regenerate
530 * disassemble.c (disassembler): Recognize ARCH_XGATE.
531 * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
532 New functions.
533 * configure.in: Recognize xgate.
534 * xgate-dis.c, xgate-opc.c: New files for support of xgate
535 * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
536 and opcode generation for xgate.
537
538 2012-04-30 DJ Delorie <dj@redhat.com>
539
540 * rx-decode.opc (MOV): Do not sign-extend immediates which are
541 already the maximum bit size.
542 * rx-decode.c: Regenerate.
543
544 2012-04-27 David S. Miller <davem@davemloft.net>
545
546 * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
547 * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
548
549 * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
550 * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
551
552 * sparc-opc.c (CBCOND): New define.
553 (CBCOND_XCC): Likewise.
554 (cbcond): New helper macro.
555 (sparc_opcodes): Add compare-and-branch instructions.
556
557 * sparc-dis.c (print_insn_sparc): Handle ')'.
558 * sparc-opc.c (sparc_opcodes): Add crypto instructions.
559
560 * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
561 into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
562
563 2012-04-12 David S. Miller <davem@davemloft.net>
564
565 * sparc-dis.c (X_DISP10): Define.
566 (print_insn_sparc): Handle '='.
567
568 2012-04-01 Mike Frysinger <vapier@gentoo.org>
569
570 * bfin-dis.c (fmtconst): Replace decimal handling with a single
571 sprintf call and the '*' field width.
572
573 2012-03-23 Maxim Kuvyrkov <maxim@codesourcery.com>
574
575 * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
576
577 2012-03-16 Alan Modra <amodra@gmail.com>
578
579 * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
580 (powerpc_opcd_indices): Bump array size.
581 (disassemble_init_powerpc): Set powerpc_opcd_indices entries
582 corresponding to unused opcodes to following entry.
583 (lookup_powerpc): New function, extracted and optimised from..
584 (print_insn_powerpc): ..here.
585
586 2012-03-15 Alan Modra <amodra@gmail.com>
587 James Lemke <jwlemke@codesourcery.com>
588
589 * disassemble.c (disassemble_init_for_target): Handle ppc init.
590 * ppc-dis.c (private): New var.
591 (powerpc_init_dialect): Don't return calloc failure, instead use
592 private.
593 (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
594 (powerpc_opcd_indices): New array.
595 (disassemble_init_powerpc): New function.
596 (print_insn_big_powerpc): Don't init dialect here.
597 (print_insn_little_powerpc): Likewise.
598 (print_insn_powerpc): Start search using powerpc_opcd_indices.
599
600 2012-03-10 Edmar Wienskoski <edmar@freescale.com>
601
602 * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
603 * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
604 (PPCVEC2, PPCTMR, E6500): New short names.
605 (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
606 mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
607 lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
608 lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
609 lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
610 optional operands on sync instruction for E6500 target.
611
612 2012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
613
614 * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
615
616 2012-02-27 Alan Modra <amodra@gmail.com>
617
618 * mt-dis.c: Regenerate.
619
620 2012-02-27 Alan Modra <amodra@gmail.com>
621
622 * v850-opc.c (extract_v8): Rearrange to make it obvious this
623 is the inverse of corresponding insert function.
624 (extract_d22, extract_u9, extract_r4): Likewise.
625 (extract_d9): Correct sign extension.
626 (extract_d16_15): Don't assume "long" is 32 bits, and don't
627 rely on implementation defined behaviour for shift right of
628 signed types.
629 (extract_d16_16, extract_d17_16, extract_i9): Likewise.
630 (extract_d23): Likewise, and correct mask.
631
632 2012-02-27 Alan Modra <amodra@gmail.com>
633
634 * crx-dis.c (print_arg): Mask constant to 32 bits.
635 * crx-opc.c (cst4_map): Use int array.
636
637 2012-02-27 Alan Modra <amodra@gmail.com>
638
639 * arc-dis.c (BITS): Don't use shifts to mask off bits.
640 (FIELDD): Sign extend with xor,sub.
641
642 2012-02-25 Walter Lee <walt@tilera.com>
643
644 * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
645 * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
646 TILEPRO_OPC_LW_TLS_SN.
647
648 2012-02-21 H.J. Lu <hongjiu.lu@intel.com>
649
650 * i386-opc.h (HLEPrefixNone): New.
651 (HLEPrefixLock): Likewise.
652 (HLEPrefixAny): Likewise.
653 (HLEPrefixRelease): Likewise.
654
655 2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
656
657 * i386-dis.c (HLE_Fixup1): New.
658 (HLE_Fixup2): Likewise.
659 (HLE_Fixup3): Likewise.
660 (Ebh1): Likewise.
661 (Evh1): Likewise.
662 (Ebh2): Likewise.
663 (Evh2): Likewise.
664 (Ebh3): Likewise.
665 (Evh3): Likewise.
666 (MOD_C6_REG_7): Likewise.
667 (MOD_C7_REG_7): Likewise.
668 (RM_C6_REG_7): Likewise.
669 (RM_C7_REG_7): Likewise.
670 (XACQUIRE_PREFIX): Likewise.
671 (XRELEASE_PREFIX): Likewise.
672 (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
673 cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
674 Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
675 (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
676 not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
677 MOD_C6_REG_7 and MOD_C7_REG_7.
678 (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
679 (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
680 xtest.
681 (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
682 (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
683
684 * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
685 CPU_RTM_FLAGS.
686 (cpu_flags): Add CpuHLE and CpuRTM.
687 (opcode_modifiers): Add HLEPrefixOk.
688
689 * i386-opc.h (CpuHLE): New.
690 (CpuRTM): Likewise.
691 (HLEPrefixOk): Likewise.
692 (i386_cpu_flags): Add cpuhle and cpurtm.
693 (i386_opcode_modifier): Add hleprefixok.
694
695 * i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
696 add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
697 sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
698 operand. Add xacquire, xrelease, xabort, xbegin, xend and
699 xtest.
700 * i386-init.h: Regenerated.
701 * i386-tbl.h: Likewise.
702
703 2012-01-24 DJ Delorie <dj@redhat.com>
704
705 * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
706 * rl78-decode.c: Regenerate.
707
708 2012-01-17 James Murray <jsm@jsm-net.demon.co.uk>
709
710 PR binutils/10173
711 * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
712
713 2012-01-17 Andreas Schwab <schwab@linux-m68k.org>
714
715 * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
716 register and move them after pmove with PSR/PCSR register.
717
718 2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
719
720 * i386-dis.c (mod_table): Add vmfunc.
721
722 * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
723 (cpu_flags): CpuVMFUNC.
724
725 * i386-opc.h (CpuVMFUNC): New.
726 (i386_cpu_flags): Add cpuvmfunc.
727
728 * i386-opc.tbl: Add vmfunc.
729 * i386-init.h: Regenerated.
730 * i386-tbl.h: Likewise.
731
732 For older changes see ChangeLog-2011
733 \f
734 Local Variables:
735 mode: change-log
736 left-margin: 8
737 fill-column: 74
738 version-control: never
739 End:
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