1 2020-01-27 Tamar Christina <tamar.christina@arm.com>
4 * aarch64-tbl.h (struct aarch64_opcode): Re-order cfinv.
5 * aarch64-asm-2.c: Regenerate
6 * aarch64-dis-2.c: Likewise.
7 * aarch64-opc-2.c: Likewise.
9 2020-01-21 Jan Beulich <jbeulich@suse.com>
11 * i386-opc.tbl (sysret): Drop DefaultSize.
12 * i386-tbl.h: Re-generate.
14 2020-01-21 Jan Beulich <jbeulich@suse.com>
16 * i386-opc.tbl (vcvtneps2bf16x): Add Broadcast, Xmmword, and
18 (vcvtneps2bf16y): Add Broadcast, Ymmword, and Dword.
19 * i386-tbl.h: Re-generate.
21 2020-01-20 Nick Clifton <nickc@redhat.com>
23 * po/de.po: Updated German translation.
24 * po/pt_BR.po: Updated Brazilian Portuguese translation.
25 * po/uk.po: Updated Ukranian translation.
27 2020-01-20 Alan Modra <amodra@gmail.com>
29 * hppa-dis.c (fput_const): Remove useless cast.
31 2020-01-20 Alan Modra <amodra@gmail.com>
33 * arm-dis.c (print_insn_arm): Wrap 'T' value.
35 2020-01-18 Nick Clifton <nickc@redhat.com>
37 * configure: Regenerate.
38 * po/opcodes.pot: Regenerate.
40 2020-01-18 Nick Clifton <nickc@redhat.com>
42 Binutils 2.34 branch created.
44 2020-01-17 Christian Biesinger <cbiesinger@google.com>
46 * opintl.h: Fix spelling error (seperate).
48 2020-01-17 H.J. Lu <hongjiu.lu@intel.com>
50 * i386-opc.tbl: Add {vex} pseudo prefix.
51 * i386-tbl.h: Regenerated.
53 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
56 * opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
57 (neon_opcodes): Likewise.
58 (select_arm_features): Make sure we enable MVE bits when selecting
59 armv8.1-m.main. Make sure we do not enable MVE bits when not selecting
62 2020-01-16 Jan Beulich <jbeulich@suse.com>
64 * i386-opc.tbl: Drop stale comment from XOP section.
66 2020-01-16 Jan Beulich <jbeulich@suse.com>
68 * i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
69 (extractps): Add VexWIG to SSE2AVX forms.
70 * i386-tbl.h: Re-generate.
72 2020-01-16 Jan Beulich <jbeulich@suse.com>
74 * i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
75 Size64 from and use VexW1 on SSE2AVX forms.
76 (vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
77 VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
78 * i386-tbl.h: Re-generate.
80 2020-01-15 Alan Modra <amodra@gmail.com>
82 * tic4x-dis.c (tic4x_version): Make unsigned long.
83 (optab, optab_special, registernames): New file scope vars.
84 (tic4x_print_register): Set up registernames rather than
85 malloc'd registertable.
86 (tic4x_disassemble): Delete optable and optable_special. Use
87 optab and optab_special instead. Throw away old optab,
88 optab_special and registernames when info->mach changes.
90 2020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
93 * z80-dis.c (suffix): Use .db instruction to generate double
96 2020-01-14 Alan Modra <amodra@gmail.com>
98 * z8k-dis.c (unpack_instr): Formatting. Cast unsigned short
99 values to unsigned before shifting.
101 2020-01-13 Thomas Troeger <tstroege@gmx.de>
103 * arm-dis.c (print_insn_arm): Fill in insn info fields for control
105 (print_insn_thumb16, print_insn_thumb32): Likewise.
106 (print_insn): Initialize the insn info.
107 * i386-dis.c (print_insn): Initialize the insn info fields, and
110 2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
112 * arc-opc.c (C_NE): Make it required.
114 2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
116 * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
117 reserved register name.
119 2020-01-13 Alan Modra <amodra@gmail.com>
121 * ns32k-dis.c (Is_gen): Use strchr, add 'f'.
122 (print_insn_ns32k): Adjust ioffset for 'f' index_offset.
124 2020-01-13 Alan Modra <amodra@gmail.com>
126 * wasm32-dis.c (print_insn_wasm32): Localise variables. Store
127 result of wasm_read_leb128 in a uint64_t and check that bits
128 are not lost when copying to other locals. Use uint32_t for
129 most locals. Use PRId64 when printing int64_t.
131 2020-01-13 Alan Modra <amodra@gmail.com>
133 * score-dis.c: Formatting.
134 * score7-dis.c: Formatting.
136 2020-01-13 Alan Modra <amodra@gmail.com>
138 * score-dis.c (print_insn_score48): Use unsigned variables for
139 unsigned values. Don't left shift negative values.
140 (print_insn_score32): Likewise.
141 * score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
143 2020-01-13 Alan Modra <amodra@gmail.com>
145 * tic4x-dis.c (tic4x_print_register): Remove dead code.
147 2020-01-13 Alan Modra <amodra@gmail.com>
149 * fr30-ibld.c: Regenerate.
151 2020-01-13 Alan Modra <amodra@gmail.com>
153 * xgate-dis.c (print_insn): Don't left shift signed value.
154 (ripBits): Formatting, use 1u.
156 2020-01-10 Alan Modra <amodra@gmail.com>
158 * tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
159 * tilegx-opc.c (parse_insn_tilegx): Likewise. Delete raw_opval.
161 2020-01-10 Alan Modra <amodra@gmail.com>
163 * m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
164 and XRREG value earlier to avoid a shift with negative exponent.
165 * m10200-dis.c (disassemble): Similarly.
167 2020-01-09 Nick Clifton <nickc@redhat.com>
170 * z80-dis.c (ld_ii_ii): Use correct cast.
172 2020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
175 * z80-dis.c (ld_ii_ii): Use character constant when checking
178 2020-01-09 Jan Beulich <jbeulich@suse.com>
180 * i386-dis.c (SEP_Fixup): New.
182 (dis386_twobyte): Use it for sysenter/sysexit.
183 (enum x86_64_isa): Change amd64 enumerator to value 1.
184 (OP_J): Compare isa64 against intel64 instead of amd64.
185 * i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
187 * i386-tbl.h: Re-generate.
189 2020-01-08 Alan Modra <amodra@gmail.com>
191 * z8k-dis.c: Include libiberty.h
192 (instr_data_s): Make max_fetched unsigned.
193 (z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
194 Don't exceed byte_info bounds.
195 (output_instr): Make num_bytes unsigned.
196 (unpack_instr): Likewise for nibl_count and loop.
197 * z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
199 * z8k-opc.h: Regenerate.
201 2020-01-07 Shahab Vahedi <shahab@synopsys.com>
203 * arc-tbl.h (llock): Use 'LLOCK' as class.
205 (scond): Use 'SCOND' as class.
207 (llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
210 2020-01-06 Alan Modra <amodra@gmail.com>
212 * m32c-ibld.c: Regenerate.
214 2020-01-06 Alan Modra <amodra@gmail.com>
217 * z80-dis.c (suffix): Don't use a local struct buffer copy.
218 Peek at next byte to prevent recursion on repeated prefix bytes.
219 Ensure uninitialised "mybuf" is not accessed.
220 (print_insn_z80): Don't zero n_fetch and n_used here,..
221 (print_insn_z80_buf): ..do it here instead.
223 2020-01-04 Alan Modra <amodra@gmail.com>
225 * m32r-ibld.c: Regenerate.
227 2020-01-04 Alan Modra <amodra@gmail.com>
229 * cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
231 2020-01-04 Alan Modra <amodra@gmail.com>
233 * crx-dis.c (match_opcode): Avoid shift left of signed value.
235 2020-01-04 Alan Modra <amodra@gmail.com>
237 * d30v-dis.c (print_insn): Avoid signed overflow in left shift.
239 2020-01-03 Jan Beulich <jbeulich@suse.com>
241 * aarch64-tbl.h (aarch64_opcode_table): Use
242 SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
244 2020-01-03 Jan Beulich <jbeulich@suse.com>
246 * aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
247 forms of SUDOT and USDOT.
249 2020-01-03 Jan Beulich <jbeulich@suse.com>
251 * aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
253 * opcodes/aarch64-dis-2.c: Re-generate.
255 2020-01-03 Jan Beulich <jbeulich@suse.com>
257 * aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
259 * opcodes/aarch64-dis-2.c: Re-generate.
261 2020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
263 * z80-dis.c: Add support for eZ80 and Z80 instructions.
265 2020-01-01 Alan Modra <amodra@gmail.com>
267 Update year range in copyright notice of all files.
269 For older changes see ChangeLog-2019
271 Copyright (C) 2020 Free Software Foundation, Inc.
273 Copying and distribution of this file, with or without modification,
274 are permitted in any medium without royalty provided the copyright
275 notice and this notice are preserved.
281 version-control: never