1 2016-04-13 Nick Clifton <nickc@redhat.com>
4 * v850-opc.c (v850_opcodes): Correct masks for long versions of
5 the LD.B and LD.BU instructions.
7 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
9 * arc-dis.c (find_format): Check for extension flags.
10 (print_flags): New function.
11 (print_insn_arc): Update for .extCondCode, .extCoreRegister and
13 * arc-ext.c (arcExtMap_coreRegName): Use
14 LAST_EXTENSION_CORE_REGISTER.
15 (arcExtMap_coreReadWrite): Likewise.
16 (dump_ARC_extmap): Update printing.
17 * arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
18 (arc_aux_regs): Add cpu field.
19 * arc-regs.h: Add cpu field, lower case name aux registers.
21 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
23 * arc-tbl.h: Add rtsc, sleep with no arguments.
25 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
27 * arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
29 (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
30 (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
31 (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
32 (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
33 (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
34 (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
35 (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
36 (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
37 (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
38 (arc_opcode arc_opcodes): Null terminate the array.
39 (arc_num_opcodes): Remove.
40 * arc-ext.h (INSERT_XOP): Define.
41 (extInstruction_t): Likewise.
42 (arcExtMap_instName): Delete.
43 (arcExtMap_insn): New function.
44 (arcExtMap_genOpcode): Likewise.
45 * arc-ext.c (ExtInstruction): Remove.
46 (create_map): Zero initialize instruction fields.
47 (arcExtMap_instName): Remove.
48 (arcExtMap_insn): New function.
49 (dump_ARC_extmap): More info while debuging.
50 (arcExtMap_genOpcode): New function.
51 * arc-dis.c (find_format): New function.
52 (print_insn_arc): Use find_format.
53 (arc_get_disassembler): Enable dump_ARC_extmap only when
56 2016-04-11 Maciej W. Rozycki <macro@imgtec.com>
58 * mips-dis.c (print_mips16_insn_arg): Mask unused extended
61 2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
63 * arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
64 * arc-opc.c (arc_flag_operands): Add new flags.
65 (arc_flag_classes): Add new classes.
67 2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
69 * arc-opc.c (arc_opcodes): Extend comment to discus table layout.
71 2016-04-05 Andrew Burgess <andrew.burgess@embecosm.com>
73 * arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
74 encode1, rflt, crc16, and crc32 instructions.
75 * arc-opc.c (arc_flag_operands): Add F_NPS_R.
76 (arc_flag_classes): Add C_NPS_R.
77 (insert_nps_bitop_size_2b): New function.
78 (extract_nps_bitop_size_2b): Likewise.
79 (insert_nps_bitop_uimm8): Likewise.
80 (extract_nps_bitop_uimm8): Likewise.
81 (arc_operands): Add new operand entries.
83 2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
85 * arc-regs.h: Add a new subclass field. Add double assist
86 accumulator register values.
87 * arc-tbl.h: Use DPA subclass to mark the double assist
88 instructions. Use DPX/SPX subclas to mark the FPX instructions.
89 * arc-opc.c (RSP): Define instead of SP.
90 (arc_aux_regs): Add the subclass field.
92 2016-04-05 Jiong Wang <jiong.wang@arm.com>
94 * arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
96 2016-03-31 Andrew Burgess <andrew.burgess@embecosm.com>
98 * arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
101 2016-03-30 Andrew Burgess <andrew.burgess@embecosm.com>
103 * arc-nps400-tbl.h: Add a header comment, and fix some whitespace
104 issues. No functional changes.
106 2016-03-30 Claudiu Zissulescu <claziss@synopsys.com>
108 * arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
109 (AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
110 (RTT): Remove duplicate.
111 (LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
112 (PCT_CONFIG*): Remove.
113 (D1L, D1H, D2H, D2L): Define.
115 2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
117 * arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
119 2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
121 * arc-tbl.h (invld07): Remove.
122 * arc-ext-tbl.h: New file.
123 * arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
124 * arc-opc.c (arc_opcodes): Add ext-tbl include.
126 2016-03-24 Jan Kratochvil <jan.kratochvil@redhat.com>
128 Fix -Wstack-usage warnings.
129 * aarch64-dis.c (print_operands): Substitute size.
130 * aarch64-opc.c (print_register_offset_address): Substitute tblen.
132 2016-03-22 Jose E. Marchesi <jose.marchesi@oracle.com>
134 * sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
135 to get a proper diagnostic when an invalid ASR register is used.
137 2016-03-22 Nick Clifton <nickc@redhat.com>
139 * configure: Regenerate.
141 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
143 * arc-nps400-tbl.h: New file.
144 * arc-opc.c: Add top level comment.
145 (insert_nps_3bit_dst): New function.
146 (extract_nps_3bit_dst): New function.
147 (insert_nps_3bit_src2): New function.
148 (extract_nps_3bit_src2): New function.
149 (insert_nps_bitop_size): New function.
150 (extract_nps_bitop_size): New function.
151 (arc_flag_operands): Add nps400 entries.
152 (arc_flag_classes): Add nps400 entries.
153 (arc_operands): Add nps400 entries.
154 (arc_opcodes): Add nps400 include.
156 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
158 * arc-opc.c (arc_flag_classes): Convert all flag classes to use
159 the new class enum values.
161 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
163 * arc-dis.c (print_insn_arc): Handle nps400.
165 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
167 * arc-opc.c (BASE): Delete.
169 2016-03-18 Nick Clifton <nickc@redhat.com>
172 * aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
173 of MOV insn that aliases an ORR insn.
175 2016-03-16 Jiong Wang <jiong.wang@arm.com>
177 * arm-dis.c (neon_opcodes): Support new FP16 instructions.
179 2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
181 * mcore-opc.h: Add const qualifiers.
182 * microblaze-opc.h (struct op_code_struct): Likewise.
183 * sh-opc.h: Likewise.
184 * tic4x-dis.c (tic4x_print_indirect): Likewise.
185 (tic4x_print_op): Likewise.
187 2016-03-02 Alan Modra <amodra@gmail.com>
189 * or1k-desc.h: Regenerate.
190 * fr30-ibld.c: Regenerate.
191 * rl78-decode.c: Regenerate.
193 2016-03-01 Nick Clifton <nickc@redhat.com>
196 * rl78-dis.c (print_insn_rl78_common): Fix typo.
198 2016-02-24 Renlin Li <renlin.li@arm.com>
200 * arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
201 (print_insn_coprocessor): Support fp16 instructions.
203 2016-02-24 Renlin Li <renlin.li@arm.com>
205 * arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
208 2016-02-24 Renlin Li <renlin.li@arm.com>
210 * arm-dis.c (print_insn_coprocessor): Check co-processor number for
211 cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
213 2016-02-15 H.J. Lu <hongjiu.lu@intel.com>
215 * i386-dis.c (print_insn): Parenthesize expression to prevent
219 2016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
220 Janek van Oirschot <jvanoirs@synopsys.com>
222 * arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
225 2016-02-04 Nick Clifton <nickc@redhat.com>
228 * msp430-dis.c (print_insn_msp430): Add a special case for
229 decoding an RRC instruction with the ZC bit set in the extension
232 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
234 * cgen-ibld.in (insert_normal): Rework calculation of shift.
235 * epiphany-ibld.c: Regenerate.
236 * fr30-ibld.c: Regenerate.
237 * frv-ibld.c: Regenerate.
238 * ip2k-ibld.c: Regenerate.
239 * iq2000-ibld.c: Regenerate.
240 * lm32-ibld.c: Regenerate.
241 * m32c-ibld.c: Regenerate.
242 * m32r-ibld.c: Regenerate.
243 * mep-ibld.c: Regenerate.
244 * mt-ibld.c: Regenerate.
245 * or1k-ibld.c: Regenerate.
246 * xc16x-ibld.c: Regenerate.
247 * xstormy16-ibld.c: Regenerate.
249 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
251 * epiphany-dis.c: Regenerated from latest cpu files.
253 2016-02-01 Michael McConville <mmcco@mykolab.com>
255 * cgen-dis.c (count_decodable_bits): Use unsigned value for mask
258 2016-01-25 Renlin Li <renlin.li@arm.com>
260 * arm-dis.c (mapping_symbol_for_insn): New function.
261 (find_ifthen_state): Call mapping_symbol_for_insn().
263 2016-01-20 Matthew Wahab <matthew.wahab@arm.com>
265 * aarch64-opc.c (operand_general_constraint_met_p): Check validity
266 of MSR UAO immediate operand.
268 2016-01-18 Maciej W. Rozycki <macro@imgtec.com>
270 * mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
273 2016-01-17 Alan Modra <amodra@gmail.com>
275 * configure: Regenerate.
277 2016-01-14 Nick Clifton <nickc@redhat.com>
279 * rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
280 instructions that can support stack pointer operations.
281 * rl78-decode.c: Regenerate.
282 * rl78-dis.c: Fix display of stack pointer in MOVW based
285 2016-01-14 Matthew Wahab <matthew.wahab@arm.com>
287 * aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
288 testing for RAS support. Add checks for erxfr_el1, erxctlr_el1,
289 erxtatus_el1 and erxaddr_el1.
291 2016-01-12 Matthew Wahab <matthew.wahab@arm.com>
293 * arm-dis.c (arm_opcodes): Add "esb".
294 (thumb_opcodes): Likewise.
296 2016-01-11 Peter Bergner <bergner@vnet.ibm.com>
298 * ppc-opc.c <xscmpnedp>: Delete.
299 <xvcmpnedp>: Likewise.
300 <xvcmpnedp.>: Likewise.
301 <xvcmpnesp>: Likewise.
302 <xvcmpnesp.>: Likewise.
304 2016-01-08 Andreas Schwab <schwab@linux-m68k.org>
307 * m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
310 2016-01-01 Alan Modra <amodra@gmail.com>
312 Update year range in copyright notice of all files.
314 For older changes see ChangeLog-2015
316 Copyright (C) 2016 Free Software Foundation, Inc.
318 Copying and distribution of this file, with or without modification,
319 are permitted in any medium without royalty provided the copyright
320 notice and this notice are preserved.
326 version-control: never