opcodes/ChangeLog

   1 2010-09-22  Robin Getz  <robin.getz@analog.com>
   2
   3         * bfin-dis.c (fmtconst): Cast address to 32bits.
   4
   5 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
   6
   7         * bfin-dis.c (decode_REGMV_0): Rewrite valid combo checks.
   8
   9 2010-09-22  Robin Getz  <robin.getz@analog.com>
  10
  11         * bfin-dis.c (decode_ProgCtrl_0): Check for parallel insns.
  12         Reject P6/P7 to TESTSET.
  13         (decode_PushPopReg_0): Check for parallel insns.  Reject pushing
  14         SP onto the stack.
  15         (decode_PushPopMultiple_0): Check for parallel insns.  Make sure
  16         P/D fields match all the time.
  17         (decode_CCflag_0): Check for parallel insns.  Verify x/y fields
  18         are 0 for accumulator compares.
  19         (decode_CC2stat_0): Check for parallel insns.  Reject CC<op>CC.
  20         (decode_CaCTRL_0, decode_ccMV_0, decode_CC2dreg_0, decode_BRCC_0,
  21         decode_UJUMP_0, decode_LOGI2op_0, decode_COMPI2opD_0,
  22         decode_COMPI2opP_0, decode_LoopSetup_0, decode_LDIMMhalf_0,
  23         decode_CALLa_0, decode_linkage_0, decode_pseudoDEBUG_0,
  24         decode_pseudoOChar_0, decode_pseudodbg_assert_0): Check for parallel
  25         insns.
  26         (decode_dagMODim_0): Verify br field for IREG ops.
  27         (decode_LDST_0): Reject preg load into same preg.
  28         (_print_insn_bfin): Handle returns for ILLEGAL decodes.
  29         (print_insn_bfin): Likewise.
  30
  31 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
  32
  33         * bfin-dis.c (decode_PushPopMultiple_0): Return 0 when pr > 5.
  34
  35 2010-09-22  Robin Getz  <robin.getz@analog.com>
  36
  37         * bfin-dis.c (decode_dsp32shiftimm_0): Add missing "S" flag.
  38
  39 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
  40
  41         * bfin-dis.c (decode_CC2stat_0): Decode all ASTAT bits.
  42
  43 2010-09-22  Robin Getz  <robin.getz@analog.com>
  44
  45         * bfin-dis.c (IS_DREG, IS_PREG, IS_GENREG, IS_DAGREG): Reject
  46         register values greater than 8.
  47         (IS_RESERVEDREG, allreg, mostreg): New helpers.
  48         (decode_ProgCtrl_0): Call IS_DREG/IS_PREG as appropriate.
  49         (decode_PushPopReg_0): Call mostreg/allreg as appropriate.
  50         (decode_CC2dreg_0): Check valid CC register number.
  51
  52 2010-09-22  Robin Getz  <robin.getz@analog.com>
  53
  54         * bfin-dis.c (decode_pseudoDEBUG_0): Add space after DBG.
  55
  56 2010-09-22  Robin Getz  <robin.getz@analog.com>
  57
  58         * bfin-dis.c (machine_registers): Add AC0_COPY, V_COPY, and RND_MOD.
  59         (reg_names): Likewise.
  60         (decode_statbits): Likewise; while reformatting to make manageable.
  61
  62 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
  63
  64         * bfin-dis.c (decode_pseudoDEBUG_0): Add space after OUTC.
  65         (decode_pseudoOChar_0): New function.
  66         (_print_insn_bfin): Remove #if 0 and call new decode_pseudoOChar_0.
  67
  68 2010-09-22  Robin Getz  <robin.getz@analog.com>
  69
  70         * bfin-dis.c (decode_dsp32shift_0): Decode sub opcodes 2/2 as
  71         LSHIFT instead of SHIFT.
  72
  73 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
  74
  75         * bfin-dis.c (constant_formats): Constify the whole structure.
  76         (fmtconst): Add const to return value.
  77         (reg_names): Mark const.
  78         (decode_multfunc): Mark s0/s1 as const.
  79         (decode_macfunc): Mark a/sop as const.
  80
  81 2010-09-17  Tejas Belagod  <tejas.belagod@arm.com>
  82
  83         * arm_dis.c (coprocessor_opcodes): Add MRC entry for APSR_nzcv.
  84
  85 2010-09-14  Maciej W. Rozycki  <macro@codesourcery.com>
  86
  87         * mips-opc.c (mips_builtin_opcodes): Add "sync_acquire",
  88         "sync_mb", "sync_release", "sync_rmb" and "sync_wmb".
  89
  90 2010-09-10  Pierre Muller  <muller@ics.u-strasbg.fr>
  91
  92         * src/opcodes/dlx-dis.c (print_insn_dlx): Use dlx_insn type for
  93         dlx_insn_type array.
  94
  95 2010-08-31  H.J. Lu  <hongjiu.lu@intel.com>
  96
  97         PR binutils/11960
  98         * i386-dis.c (sIv): New.
  99         (dis386): Replace Iq with sIv on "pushT".
 100         (reg_table): Replace T with {T|} on callT, JcallT, jmpT and JjmpT.
 101         (x86_64_table): Replace {T|}/{P|} with P.
 102         (putop): Add 'w' to 'T'/'P' if needed for Intel syntax.
 103         (OP_sI): Update v_mode.  Remove w_mode.
 104
 105 2010-08-27  Nathan Froyd  <froydnj@codesourcery.com>
 106
 107         * ppc-opc.c (powerpc_opcodes) [lswx,lswi,stswx,stswi]: Deprecate
 108         on E500 and E500MC.
 109
 110 2010-08-17  H.J. Lu  <hongjiu.lu@intel.com>
 111
 112         * i386-dis.c (reg_table): Replace Eb with Mb on prefetch and
 113         prefetchw.
 114
 115 2010-08-06  Quentin Neill <quentin.neill@amd.com>
 116
 117         * i386-gen.c (cpu_flag_init): Define CpuNop extension flag, add
 118         to processor flags for PENTIUMPRO processors and later.
 119         * i386-opc.h (enum): Add CpuNop.
 120         (i386_cpu_flags): Add cpunop bit.
 121         * i386-opc.tbl: Change nop cpu_flags.
 122         * i386-init.h: Regenerated.
 123         * i386-tbl.h: Likewise.
 124
 125 2010-08-06  Quentin Neill <quentin.neill@amd.com>
 126
 127         * i386-opc.h (enum): Fix typos in comments.
 128
 129 2010-08-06  Alan Modra  <amodra@gmail.com>
 130
 131         * disassemble.c: Formatting.
 132         (disassemble_init_for_target <ARCH_m32c>): Comment on endian.
 133
 134 2010-08-05  H.J. Lu  <hongjiu.lu@intel.com>
 135
 136         * i386-opc.tbl: Add Cpu186 to ud1/ud2/ud2a/ud2b.
 137         * i386-tbl.h: Regenerated.
 138
 139 2010-08-05  H.J. Lu  <hongjiu.lu@intel.com>
 140
 141         * i386-dis.c (dis386_twobyte): Replace ud2a/ud2b with ud2/ud1.
 142
 143         * i386-opc.tbl: Add ud1.  Remove Cpu686 from ud2/ud2a/ud2b.
 144         * i386-tbl.h: Regenerated.
 145
 146 2010-07-29  DJ Delorie  <dj@redhat.com>
 147
 148         * rx-decode.opc (SRR): New.
 149         (rx_decode_opcode): Use it for movbi and movbir.  Decode NOP2 (mov
 150         r0,r0) and NOP3 (max r0,r0) special cases.
 151         * rx-decode.c: Regenerate.
 152
 153 2010-07-28  H.J. Lu  <hongjiu.lu@intel.com>
 154
 155         * i386-dis.c: Add 0F to VEX opcode enums.
 156
 157 2010-07-27  DJ Delorie  <dj@redhat.com>
 158
 159         * rx-decode.opc (store_flags): Remove, replace with F_* macros.
 160         (rx_decode_opcode): Likewise.
 161         * rx-decode.c: Regenerate.
 162
 163 2010-07-23  Naveen.H.S  <naveen.S@kpitcummins.com>
 164             Ina Pandit  <ina.pandit@kpitcummins.com>
 165
 166         * v850-dis.c (v850_sreg_names): Updated structure for system
 167         registers.
 168         (float_cc_names): new structure for condition codes.
 169         (print_value): Update the function that prints value.
 170         (get_operand_value): New function to get the operand value.
 171         (disassemble): Updated to handle the disassembly of instructions.
 172         (print_insn_v850): Updated function to print instruction for different
 173         families.
 174         * opcodes/v850-opc.c (v850_msg_is_out_of_range, insert_i5div1,
 175         extract_i5div1, insert_i5div2, extract_i5div2, insert_i5div3,
 176         extract_i5div3, insert_d5_4, extract_d5_4, extract_d8_6,
 177         insert_d8_7, extract_d8_7, insert_v8, extract_v8, insert_u16_loop,
 178         extract_u16_loop, insert_d16_15, extract_d16_15, insert_d16_16,
 179         extract_d16_16, nsert_d17_16, extract_d17_16, insert_d22,
 180         extract_d22, insert_d23, extract_d23, insert_i9, extract_i9,
 181         insert_u9, extract_u9, extract_spe, insert_r4, extract_r4): New.
 182         (insert_d8_7, insert_d5_4, insert_i5div): Remove.
 183         (v850_operands): Update with the relocation name. Also update
 184         the instructions with specific set of processors.
 185
 186 2010-07-08 Tejas Belagod <tejas.belagod@arm.com>
 187
 188         * arm-dis.c (print_insn_arm): Add cases for printing more
 189         symbolic operands.
 190         (print_insn_thumb32): Likewise.
 191
 192 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
 193
 194         * mips-dis.c (print_insn_mips): Correct branch instruction type
 195         determination.
 196
 197 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
 198
 199         * mips-dis.c (print_mips16_insn_arg): Remove branch instruction
 200         type and delay slot determination.
 201         (print_insn_mips16): Extend branch instruction type and delay
 202         slot determination to cover all instructions.
 203         * mips16-opc.c (BR): Remove macro.
 204         (UBR, CBR): New macros.
 205         (mips16_opcodes): Update branch annotation for "b", "beqz",
 206         "bnez", "bteqz" and "btnez".  Add branch annotation for "jalrc"
 207         and "jrc".
 208
 209 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
 210
 211         AVX Programming Reference (June, 2010)
 212         * i386-dis.c (mod_table): Replace rdrnd with rdrand.
 213         * i386-opc.tbl: Likewise.
 214         * i386-tbl.h: Regenerated.
 215
 216 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
 217
 218         * i386-opc.h (CpuFSGSBase): Fix a typo in comments.
 219
 220 2010-07-03  Andreas Schwab  <schwab@linux-m68k.org>
 221
 222         * ppc-dis.c (powerpc_init_dialect): Cast PPC_OPCODE_xxx to
 223         ppc_cpu_t before inverting.
 224         (ppc_parse_cpu): Likewise.
 225         (print_insn_powerpc): Likewise.
 226
 227 2010-07-03  Alan Modra  <amodra@gmail.com>
 228
 229         * ppc-dis.c (ppc_opts, powerpc_init_dialect): Remove old opcode flags.
 230         * ppc-opc.c (PPC32, POWER32, COM32, CLASSIC): Delete.
 231         (PPC64, MFDEC2): Update.
 232         (NON32, NO371): Define.
 233         (powerpc_opcode): Update to not use old opcode flags, and avoid
 234         -m601 duplicates.
 235
 236 2010-07-03  DJ Delorie  <dj@delorie.com>
 237
 238         * m32c-ibld.c: Regenerate.
 239
 240 2010-07-03  Alan Modra  <amodra@gmail.com>
 241
 242         * ppc-opc.c (PWR2COM): Define.
 243         (PPCPWR2): Add PPC_OPCODE_COMMON.
 244         (powerpc_opcodes): Add "subc", "subco", "subco.", "fcir", "fcir.",
 245         "fcirz", "fcirz." to -mcom opcodes.  Remove "mfsri", "dclst",
 246         "rac" from -mcom.
 247
 248 2010-07-01  H.J. Lu  <hongjiu.lu@intel.com>
 249
 250         AVX Programming Reference (June, 2010)
 251         * i386-dis.c (PREFIX_0FAE_REG_0): New.
 252         (PREFIX_0FAE_REG_1): Likewise.
 253         (PREFIX_0FAE_REG_2): Likewise.
 254         (PREFIX_0FAE_REG_3): Likewise.
 255         (PREFIX_VEX_3813): Likewise.
 256         (PREFIX_VEX_3A1D): Likewise.
 257         (prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
 258         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 and
 259         PREFIX_VEX_3A1D.
 260         (vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D.
 261         (mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
 262         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd.
 263
 264         * i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS,
 265         CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS.
 266         (cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C.
 267
 268         * i386-opc.h (CpuXsaveopt): New.
 269         (CpuFSGSBase): Likewise.
 270         (CpuRdRnd): Likewise.
 271         (CpuF16C): Likewise.
 272         (i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and
 273         cpuf16c.
 274
 275         * i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd,
 276         wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph.
 277         * i386-init.h: Regenerated.
 278         * i386-tbl.h: Likewise.
 279
 280 2010-07-01  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 281
 282         * ppc-opc.c (powerpc_opcodes): Revert deprecation of mfocrf, mtcrf
 283         and mtocrf on EFS.
 284
 285 2010-06-29  Alan Modra  <amodra@gmail.com>
 286
 287         * maxq-dis.c: Delete file.
 288         * Makefile.am: Remove references to maxq.
 289         * configure.in: Likewise.
 290         * disassemble.c: Likewise.
 291         * Makefile.in: Regenerate.
 292         * configure: Regenerate.
 293         * po/POTFILES.in: Regenerate.
 294
 295 2010-06-29  Alan Modra  <amodra@gmail.com>
 296
 297         * mep-dis.c: Regenerate.
 298
 299 2010-06-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 300
 301         * arm-disc.c (parse_insn_neon):  Fix Neon alignment syntax.
 302
 303 2010-06-27  Alan Modra  <amodra@gmail.com>
 304
 305         * arc-dis.c (arc_sprintf): Delete set but unused variables.
 306         (decodeInstr): Likewise.
 307         * dlx-dis.c (print_insn_dlx): Likewise.
 308         * h8300-dis.c (bfd_h8_disassemble_init): Likewise.
 309         * maxq-dis.c (check_move, print_insn): Likewise.
 310         * mep-dis.c (mep_examine_ivc2_insns): Likewise.
 311         * msp430-dis.c (msp430_branchinstr): Likewise.
 312         * bfin-dis.c (_print_insn_bfin): Avoid set but unused warning.
 313         * cgen-asm.in (parse_insn_normal, _cgen_assemble_insn): Likewise.
 314         * sparc-dis.c (print_insn_sparc): Likewise.
 315         * fr30-asm.c: Regenerate.
 316         * frv-asm.c: Regenerate.
 317         * ip2k-asm.c: Regenerate.
 318         * iq2000-asm.c: Regenerate.
 319         * lm32-asm.c: Regenerate.
 320         * m32c-asm.c: Regenerate.
 321         * m32r-asm.c: Regenerate.
 322         * mep-asm.c: Regenerate.
 323         * mt-asm.c: Regenerate.
 324         * openrisc-asm.c: Regenerate.
 325         * xc16x-asm.c: Regenerate.
 326         * xstormy16-asm.c: Regenerate.
 327
 328 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 329
 330         PR gas/11673
 331         * m68k-opc.c (m68k_opcodes): Remove move.l for isab and later.
 332
 333 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 334
 335         PR binutils/11676
 336         * m68k-dis.c (print_insn_arg): Prefix float constants with #0e.
 337
 338 2010-06-14  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 339
 340         * ppc-dis.c (ppc_opts):  Remove PPC_OPCODE_E500MC from e500 and
 341         e500x2.  Add PPC_OPCODE_E500 to e500 and e500x2
 342         * ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which
 343         touch floating point regs and are enabled by COM, PPC or PPCCOM.
 344         Treat sync as msync on e500.  Treat eieio as mbar 1 on e500.
 345         Treat lwsync as msync on e500.
 346
 347 2010-06-07  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 348
 349         * arm-dis.c (thumb-opcodes): Add disassembly for movs.
 350
 351 2010-05-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 352
 353         * arm-dis.c (print_insn_neon):  Ensure disassembly of Neon
 354         constants is the same on 32-bit and 64-bit hosts.
 355
 356 2010-05-27  Jason Duerstock  <jason.duerstock+binutils@gmail.com>
 357
 358         * m68k-dis.c (print_insn_m68k): Emit undefined instructions as
 359         .short directives so that they can be reassembled.
 360
 361 2010-05-26  Catherine Moore <clm@codesourcery.com>
 362             David Ung  <davidu@mips.com>
 363
 364         * mips-opc.c: Change membership to I1 for instructions ssnop and
 365         ehb.
 366
 367 2010-05-26  H.J. Lu  <hongjiu.lu@intel.com>
 368
 369         * i386-dis.c (sib): New.
 370         (get_sib): Likewise.
 371         (print_insn): Call get_sib.
 372         OP_E_memory): Use sib.
 373
 374 2010-05-26  Catherine Moore  <clm@codesoourcery.com>
 375
 376         * mips-dis.c (mips_arch): Remove INSN_MIPS16.
 377         * mips-opc.c (I16): Remove.
 378         (mips_builtin_op): Reclassify jalx.
 379
 380 2010-05-19  Alan Modra  <amodra@gmail.com>
 381
 382         * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
 383         divwe, divdeuo, divweuo, divdeo, divweo for A2.  Add icswepx.
 384
 385 2010-05-13  Alan Modra  <amodra@gmail.com>
 386
 387         * ppc-opc.c (powerpc_opcodes): Correct wclr encoding.
 388
 389 2010-05-11  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 390
 391         * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
 392         format.
 393         (print_insn_thumb16): Add support for new %W format.
 394
 395 2010-05-07  Tristan Gingold  <gingold@adacore.com>
 396
 397         * Makefile.in: Regenerate with automake 1.11.1.
 398         * aclocal.m4: Ditto.
 399
 400 2010-05-05  Nick Clifton  <nickc@redhat.com>
 401
 402         * po/es.po: Updated Spanish translation.
 403
 404 2010-04-22  Nick Clifton  <nickc@redhat.com>
 405
 406         * po/opcodes.pot: Updated by the Translation project.
 407         * po/vi.po: Updated Vietnamese translation.
 408
 409 2010-04-16  H.J. Lu  <hongjiu.lu@intel.com>
 410
 411         * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
 412         bits in opcode.
 413
 414 2010-04-09  Nick Clifton  <nickc@redhat.com>
 415
 416         * i386-dis.c (print_insn): Remove unused variable op.
 417         (OP_sI): Remove unused variable mask.
 418
 419 2010-04-07  Alan Modra  <amodra@gmail.com>
 420
 421         * configure: Regenerate.
 422
 423 2010-04-06  Peter Bergner  <bergner@vnet.ibm.com>
 424
 425         * ppc-opc.c (RBOPT): New define.
 426         ("dccci"): Enable for PPCA2.  Make operands optional.
 427         ("iccci"): Likewise.  Do not deprecate for PPC476.
 428
 429 2010-04-02  Masaki Muranaka  <monaka@monami-software.com>
 430
 431         * cr16-opc.c (cr16_instruction): Fix typo in comment.
 432
 433 2010-03-25  Joseph Myers  <joseph@codesourcery.com>
 434
 435         * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
 436         * Makefile.in: Regenerate.
 437         * configure.in (bfd_tic6x_arch): New.
 438         * configure: Regenerate.
 439         * disassemble.c (ARCH_tic6x): Define if ARCH_all.
 440         (disassembler): Handle TI C6X.
 441         * tic6x-dis.c: New.
 442
 443 2010-03-24  Mike Frysinger  <vapier@gentoo.org>
 444
 445         * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
 446
 447 2010-03-23  Joseph Myers  <joseph@codesourcery.com>
 448
 449         * dis-buf.c (buffer_read_memory): Give error for reading just
 450         before the start of memory.
 451
 452 2010-03-22  Sebastian Pop  <sebastian.pop@amd.com>
 453             Quentin Neill <quentin.neill@amd.com>
 454
 455         * i386-dis.c (OP_LWP_I): Removed.
 456         (reg_table): Do not use OP_LWP_I, use Iq.
 457         (OP_LWPCB_E): Remove use of names16.
 458         (OP_LWP_E): Same.
 459         * i386-opc.tbl: Removed 16bit LWP insns.  32bit LWP insns
 460         should not set the Vex.length bit.
 461         * i386-tbl.h: Regenerated.
 462
 463 2010-02-25  Edmar Wienskoski  <edmar@freescale.com>
 464
 465         * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
 466
 467 2010-02-24  Nick Clifton  <nickc@redhat.com>
 468
 469         PR binutils/6773
 470         * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
 471         <prefix>asx.  Replace <prefix>subaddx with <prefix>sax.
 472         (thumb32_opcodes): Likewise.
 473
 474 2010-02-15  Nick Clifton  <nickc@redhat.com>
 475
 476         * po/vi.po: Updated Vietnamese translation.
 477
 478 2010-02-12  Doug Evans  <dje@sebabeach.org>
 479
 480         * lm32-opinst.c: Regenerate.
 481
 482 2010-02-11  Doug Evans  <dje@sebabeach.org>
 483
 484         * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
 485         (print_address): Delete CGEN_PRINT_ADDRESS.
 486         * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
 487         * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
 488         * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
 489         * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
 490
 491         * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
 492         * frv-desc.c, * frv-desc.h, * frv-opc.c,
 493         * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
 494         * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
 495         * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
 496         * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
 497         * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
 498         * mep-desc.c, * mep-desc.h, * mep-opc.c,
 499         * mt-desc.c, * mt-desc.h, * mt-opc.c,
 500         * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
 501         * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
 502         * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
 503
 504 2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 505
 506         * i386-dis.c: Update copyright.
 507         * i386-gen.c: Likewise.
 508         * i386-opc.h: Likewise.
 509         * i386-opc.tbl: Likewise.
 510
 511 2010-02-10  Quentin Neill  <quentin.neill@amd.com>
 512             Sebastian Pop  <sebastian.pop@amd.com>
 513
 514         * i386-dis.c (OP_EX_VexImmW): Reintroduced
 515         function to handle 5th imm8 operand.
 516         (PREFIX_VEX_3A48): Added.
 517         (PREFIX_VEX_3A49): Added.
 518         (VEX_W_3A48_P_2): Added.
 519         (VEX_W_3A49_P_2): Added.
 520         (prefix table): Added entries for PREFIX_VEX_3A48
 521         and PREFIX_VEX_3A49.
 522         (vex table): Added entries for VEX_W_3A48_P_2 and
 523         and VEX_W_3A49_P_2.
 524         * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
 525         for Vec_Imm4 operands.
 526         * i386-opc.h (enum): Added Vec_Imm4.
 527         (i386_operand_type): Added vec_imm4.
 528         * i386-opc.tbl: Add entries for vpermilp[ds].
 529         * i386-init.h: Regenerated.
 530         * i386-tbl.h: Regenerated.
 531
 532 2010-02-10  Richard Sandiford  <r.sandiford@uk.ibm.com>
 533
 534         * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
 535         and "pwr7".  Move "a2" into alphabetical order.
 536
 537 2010-02-08  Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 538
 539         * ppc-dis.c (ppc_opts): Add titan entry.
 540         * ppc-opc.c (TITAN, MULHW): Define.
 541         (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
 542
 543 2010-02-03  Quentin Neill  <quentin.neill@amd.com>
 544
 545         * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
 546         to CPU_BDVER1_FLAGS
 547         * i386-init.h: Regenerated.
 548
 549 2010-02-03  Anthony Green  <green@moxielogic.com>
 550
 551         * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
 552         0x0f, and make 0x00 an illegal instruction.
 553
 554 2010-01-29  Daniel Jacobowitz  <dan@codesourcery.com>
 555
 556         * opcodes/arm-dis.c (struct arm_private_data): New.
 557         (print_insn_coprocessor, print_insn_arm): Update to use struct
 558         arm_private_data.
 559         (is_mapping_symbol, get_map_sym_type): New functions.
 560         (get_sym_code_type): Check the symbol's section.  Do not check
 561         mapping symbols.
 562         (print_insn): Default to disassembling ARM mode code.  Check
 563         for mapping symbols separately from other symbols.  Use
 564         struct arm_private_data.
 565
 566 2010-01-28  H.J. Lu  <hongjiu.lu@intel.com>
 567
 568         * i386-dis.c (EXVexWdqScalar): New.
 569         (vex_scalar_w_dq_mode): Likewise.
 570         (prefix_table): Update entries for PREFIX_VEX_3899,
 571         PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
 572         PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
 573         PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
 574         PREFIX_VEX_38BD and PREFIX_VEX_38BF.
 575         (intel_operand_size): Handle vex_scalar_w_dq_mode.
 576         (OP_EX): Likewise.
 577
 578 2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>
 579
 580         * i386-dis.c (XMScalar): New.
 581         (EXdScalar): Likewise.
 582         (EXqScalar): Likewise.
 583         (EXqScalarS): Likewise.
 584         (VexScalar): Likewise.
 585         (EXdVexScalarS): Likewise.
 586         (EXqVexScalarS): Likewise.
 587         (XMVexScalar): Likewise.
 588         (scalar_mode): Likewise.
 589         (d_scalar_mode): Likewise.
 590         (d_scalar_swap_mode): Likewise.
 591         (q_scalar_mode): Likewise.
 592         (q_scalar_swap_mode): Likewise.
 593         (vex_scalar_mode): Likewise.
 594         (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
 595         VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
 596         VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
 597         VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
 598         VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
 599         VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
 600         VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
 601         VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
 602         VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
 603         VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
 604         (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
 605         VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
 606         VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
 607         VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
 608         VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
 609         VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
 610         VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
 611         VEX_W_7E_P_1, VEX_W_D6_P_2  VEX_W_C2_P_1, VEX_W_C2_P_3,
 612         VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
 613         (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
 614         q_scalar_mode, q_scalar_swap_mode.
 615         (OP_XMM): Handle scalar_mode.
 616         (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
 617         and q_scalar_swap_mode.
 618         (OP_VEX): Handle vex_scalar_mode.
 619
 620 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 621
 622         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 623
 624 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 625
 626         * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
 627
 628 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 629
 630         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 631
 632 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 633
 634         * i386-dis.c (Bad_Opcode): New.
 635         (bad_opcode): Likewise.
 636         (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
 637         (dis386_twobyte): Likewise.
 638         (reg_table): Likewise.
 639         (prefix_table): Likewise.
 640         (x86_64_table): Likewise.
 641         (vex_len_table): Likewise.
 642         (vex_w_table): Likewise.
 643         (mod_table): Likewise.
 644         (rm_table): Likewise.
 645         (float_reg): Likewise.
 646         (reg_table): Remove trailing "(bad)" entries.
 647         (prefix_table): Likewise.
 648         (x86_64_table): Likewise.
 649         (vex_len_table): Likewise.
 650         (vex_w_table): Likewise.
 651         (mod_table): Likewise.
 652         (rm_table): Likewise.
 653         (get_valid_dis386): Handle bytemode 0.
 654
 655 2010-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 656
 657         * i386-opc.h (VEXScalar): New.
 658
 659         * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
 660         instructions.
 661         * i386-tbl.h: Regenerated.
 662
 663 2010-01-21  H.J. Lu  <hongjiu.lu@intel.com>
 664
 665         * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
 666
 667         * i386-opc.tbl: Add xsave64 and xrstor64.
 668         * i386-tbl.h: Regenerated.
 669
 670 2010-01-20  Nick Clifton  <nickc@redhat.com>
 671
 672         PR 11170
 673         * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
 674         based post-indexed addressing.
 675
 676 2010-01-15  Sebastian Pop  <sebastian.pop@amd.com>
 677
 678         * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
 679         * i386-tbl.h: Regenerated.
 680
 681 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 682
 683         * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
 684         comments.
 685
 686 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 687
 688         * i386-dis.c (names_mm): New.
 689         (intel_names_mm): Likewise.
 690         (att_names_mm): Likewise.
 691         (names_xmm): Likewise.
 692         (intel_names_xmm): Likewise.
 693         (att_names_xmm): Likewise.
 694         (names_ymm): Likewise.
 695         (intel_names_ymm): Likewise.
 696         (att_names_ymm): Likewise.
 697         (print_insn): Set names_mm, names_xmm and names_ymm.
 698         (OP_MMX): Use names_mm, names_xmm and names_ymm.
 699         (OP_XMM): Likewise.
 700         (OP_EM): Likewise.
 701         (OP_EMC): Likewise.
 702         (OP_MXC): Likewise.
 703         (OP_EX): Likewise.
 704         (XMM_Fixup): Likewise.
 705         (OP_VEX): Likewise.
 706         (OP_EX_VexReg): Likewise.
 707         (OP_Vex_2src): Likewise.
 708         (OP_Vex_2src_1): Likewise.
 709         (OP_Vex_2src_2): Likewise.
 710         (OP_REG_VexI4): Likewise.
 711
 712 2010-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 713
 714         * i386-dis.c (print_insn): Update comments.
 715
 716 2010-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 717
 718         * i386-dis.c (rex_original): Removed.
 719         (ckprefix): Remove rex_original.
 720         (print_insn): Update comments.
 721
 722 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 723
 724         * Makefile.in: Regenerate.
 725         * configure: Regenerate.
 726
 727 2010-01-07  Doug Evans  <dje@sebabeach.org>
 728
 729         * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
 730         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 731         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 732         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 733         * xstormy16-ibld.c: Regenerate.
 734
 735 2010-01-06  Quentin Neill  <quentin.neill@amd.com>
 736
 737         * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
 738         * i386-init.h: Regenerated.
 739
 740 2010-01-06  Daniel Gutson  <dgutson@codesourcery.com>
 741
 742         * arm-dis.c (print_insn): Fixed search for next symbol and data
 743         dumping condition, and the initial mapping symbol state.
 744
 745 2010-01-05  Doug Evans  <dje@sebabeach.org>
 746
 747         * cgen-ibld.in: #include "cgen/basic-modes.h".
 748         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 749         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 750         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 751         * xstormy16-ibld.c: Regenerate.
 752
 753 2010-01-04  Nick Clifton  <nickc@redhat.com>
 754
 755         PR 11123
 756         * arm-dis.c (print_insn_coprocessor): Initialise value.
 757
 758 2010-01-04  Edmar Wienskoski  <edmar@freescale.com>
 759
 760         * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
 761
 762 2010-01-02  Doug Evans  <dje@sebabeach.org>
 763
 764         * cgen-asm.in: Update copyright year.
 765         * cgen-dis.in: Update copyright year.
 766         * cgen-ibld.in: Update copyright year.
 767         * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
 768         * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
 769         * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
 770         * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
 771         * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
 772         * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
 773         * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
 774         * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
 775         * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
 776         * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
 777         * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
 778         * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
 779         * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
 780         * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
 781         * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
 782         * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
 783         * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
 784         * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
 785         * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
 786         * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
 787         * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
 788
 789 For older changes see ChangeLog-2009
 790 \f
 791 Local Variables:
 792 mode: change-log
 793 left-margin: 8
 794 fill-column: 74
 795 version-control: never
 796 End: