Add AMD btver1 and btver2 support
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2012-08-17 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
2
3 * i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and
4 CPU_BTVER2_FLAGS.
5
6 * i386-opc.h: Update CpuPRFCHW comment.
7
8 * i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW.
9 * i386-init.h: Regenerated.
10 * i386-tbl.h: Likewise.
11
12 2012-08-17 Nick Clifton <nickc@redhat.com>
13
14 * po/uk.po: New Ukranian translation.
15 * configure.in (ALL_LINGUAS): Add uk.
16 * configure: Regenerate.
17
18 2012-08-16 Peter Bergner <bergner@vnet.ibm.com>
19
20 * ppc-opc.c (powerpc_opcodes) <"lswx">: Use RAX for the second and
21 RBX for the third operand.
22 <"lswi">: Use RAX for second and NBI for the third operand.
23
24 2012-08-15 DJ Delorie <dj@redhat.com>
25
26 * rl78-decode.opc (rl78_decode_opcode): Merge %e and %[01]
27 operands, so that data addresses can be corrected when not
28 ES-overridden.
29 * rl78-decode.c: Regenerate.
30 * rl78-dis.c (print_insn_rl78): Make order of modifiers
31 irrelevent. When the 'e' specifier is used on an operand and no
32 ES prefix is provided, adjust address to make it absolute.
33
34 2012-08-15 Peter Bergner <bergner@vnet.ibm.com>
35
36 * ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR.
37
38 2012-08-15 Peter Bergner <bergner@vnet.ibm.com>
39
40 * ppc-opc.c <xnop, yield, mdoio, mdoom>: New extended mnemonics.
41
42 2012-08-14 Maciej W. Rozycki <macro@codesourcery.com>
43
44 * mips-dis.c (print_insn_args): Add GET_OP and GET_OP_S local
45 macros, use local variables for info struct member accesses,
46 update the type of the variable used to hold the instruction
47 word.
48 (print_insn_mips, print_mips16_insn_arg): Likewise.
49 (print_insn_mips16): Add GET_OP and GET_OP_S local macros, use
50 local variables for info struct member accesses.
51 (print_insn_micromips): Add GET_OP_S local macro.
52 (_print_insn_mips): Update the type of the variable used to hold
53 the instruction word.
54
55 2012-08-13 Ian Bolton <ian.bolton@arm.com>
56 Laurent Desnogues <laurent.desnogues@arm.com>
57 Jim MacArthur <jim.macarthur@arm.com>
58 Marcus Shawcroft <marcus.shawcroft@arm.com>
59 Nigel Stephens <nigel.stephens@arm.com>
60 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
61 Richard Earnshaw <rearnsha@arm.com>
62 Sofiane Naci <sofiane.naci@arm.com>
63 Tejas Belagod <tejas.belagod@arm.com>
64 Yufeng Zhang <yufeng.zhang@arm.com>
65
66 * Makefile.am: Add AArch64.
67 * Makefile.in: Regenerate.
68 * aarch64-asm.c: New file.
69 * aarch64-asm.h: New file.
70 * aarch64-dis.c: New file.
71 * aarch64-dis.h: New file.
72 * aarch64-gen.c: New file.
73 * aarch64-opc.c: New file.
74 * aarch64-opc.h: New file.
75 * aarch64-tbl.h: New file.
76 * configure.in: Add AArch64.
77 * configure: Regenerate.
78 * disassemble.c: Add AArch64.
79 * aarch64-asm-2.c: New file (automatically generated).
80 * aarch64-dis-2.c: New file (automatically generated).
81 * aarch64-opc-2.c: New file (automatically generated).
82 * po/POTFILES.in: Regenerate.
83
84 2012-08-13 Maciej W. Rozycki <macro@codesourcery.com>
85
86 * micromips-opc.c (micromips_opcodes): Update comment.
87 * mips-opc.c (mips_builtin_opcodes): Likewise. Mark coprocessor
88 instructions for IOCT as appropriate.
89 * mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with
90 opcode_is_member.
91 * configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with
92 the result of a check for the -Wno-missing-field-initializers
93 GCC option.
94 * Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable.
95 (mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to
96 compilation.
97 (mips16-opc.lo): Likewise.
98 (micromips-opc.lo): Likewise.
99 * aclocal.m4: Regenerate.
100 * configure: Regenerate.
101 * Makefile.in: Regenerate.
102
103 2012-08-11 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
104
105 PR gas/14423
106 * i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS.
107 * i386-init.h: Regenerated.
108
109 2012-08-09 Nick Clifton <nickc@redhat.com>
110
111 * po/vi.po: Updated Vietnamese translation.
112
113 2012-08-07 Roland McGrath <mcgrathr@google.com>
114
115 * i386-dis.c (reg_table): Fill out REG_0F0D table with
116 AMD-reserved cases as "prefetch".
117 (MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants.
118 (MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise.
119 (reg_table): Use those under REG_0F18.
120 (mod_table): Add those cases as "nop/reserved".
121
122 2012-08-07 Jan Beulich <jbeulich@suse.com>
123
124 * i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
125
126 2012-08-06 Roland McGrath <mcgrathr@google.com>
127
128 * i386-dis.c (print_insn): Print spaces between multiple excess
129 prefixes. Return actual number of excess prefixes consumed,
130 not always one.
131
132 * i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
133
134 2012-08-06 Roland McGrath <mcgrathr@google.com>
135 Victor Khimenko <khim@google.com>
136 H.J. Lu <hongjiu.lu@intel.com>
137
138 * i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG.
139 (putop): For 'T', 'U', and 'V', treat REX_W like DFLAG.
140 (intel_operand_size): For stack_v_mode, treat REX_W like DFLAG.
141 (OP_E_register): Likewise.
142 (OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
143
144 2012-08-02 Jan-Benedict Glaw <jbglaw@lug-owl.de>
145
146 * configure.in: Formatting.
147 * configure: Regenerate.
148
149 2012-08-01 Alan Modra <amodra@gmail.com>
150
151 * h8300-dis.c: Fix printf arg warnings.
152 * i960-dis.c: Likewise.
153 * mips-dis.c: Likewise.
154 * pdp11-dis.c: Likewise.
155 * sh-dis.c: Likewise.
156 * v850-dis.c: Likewise.
157 * configure.in: Formatting.
158 * configure: Regenerate.
159 * rl78-decode.c: Regenerate.
160 * po/POTFILES.in: Regenerate.
161
162 2012-07-31 Chao-Ying Fu <fu@mips.com>
163 Catherine Moore <clm@codesourcery.com>
164 Maciej W. Rozycki <macro@codesourcery.com>
165
166 * micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
167 (DSP_VOLA): Likewise.
168 (D32, D33): Likewise.
169 (micromips_opcodes): Add DSP ASE instructions.
170 * mips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
171 <'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
172
173 2012-07-31 Jan Beulich <jbeulich@suse.com>
174
175 * i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2
176 instruction group. Mark as requiring AVX2.
177 * i386-tbl.h: Re-generate.
178
179 2012-07-30 Nick Clifton <nickc@redhat.com>
180
181 * po/opcodes.pot: Updated template.
182 * po/es.po: Updated Spanish translation.
183 * po/fi.po: Updated Finnish translation.
184
185 2012-07-27 Mike Frysinger <vapier@gentoo.org>
186
187 * configure.in (BFD_VERSION): Run bfd/configure --version and
188 parse the output of that.
189 * configure: Regenerate.
190
191 2012-07-25 James Lemke <jwlemke@codesourcery.com>
192
193 * ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
194
195 2012-07-24 Stephan McCamant <smcc@cs.berkeley.edu>
196 Dr David Alan Gilbert <dave@treblig.org>
197
198 PR binutils/13135
199 * arm-dis.c: Add necessary casts for printing integer values.
200 Use %s when printing string values.
201 * hppa-dis.c: Likewise.
202 * m68k-dis.c: Likewise.
203 * microblaze-dis.c: Likewise.
204 * mips-dis.c: Likewise.
205 * sparc-dis.c: Likewise.
206
207 2012-07-19 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
208
209 PR binutils/14355
210 * i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
211 (VEX_LEN_0FXOP_08_CD): Likewise.
212 (VEX_LEN_0FXOP_08_CE): Likewise.
213 (VEX_LEN_0FXOP_08_CF): Likewise.
214 (VEX_LEN_0FXOP_08_EC): Likewise.
215 (VEX_LEN_0FXOP_08_ED): Likewise.
216 (VEX_LEN_0FXOP_08_EE): Likewise.
217 (VEX_LEN_0FXOP_08_EF): Likewise.
218 (xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
219 vpcomub, vpcomuw, vpcomud, vpcomuq.
220 (vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
221 VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
222 VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
223 VEX_LEN_0FXOP_08_EF.
224
225 2012-07-16 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
226
227 * i386-dis.c (PREFIX_0F38F6): New.
228 (prefix_table): Add adcx, adox instructions.
229 (three_byte_table): Use PREFIX_0F38F6.
230 (mod_table): Add rdseed instruction.
231 * i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
232 (cpu_flags): Likewise.
233 * i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
234 (i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
235 * i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
236 prefetchw.
237 * i386-tbl.h: Regenerate.
238 * i386-init.h: Likewise.
239
240 2012-07-05 Thomas Schwinge <thomas@codesourcery.com>
241
242 * mips-dis.c: Remove gratuitous newline.
243
244 2012-07-05 Sean Keys <skeys@ipdatasys.com>
245
246 * xgate-dis.c: Removed an IF statement that will
247 always be false due to overlapping operand masks.
248 * xgate-opc.c: Corrected 'com' opcode entry and
249 fixed spacing.
250
251 2012-07-02 Roland McGrath <mcgrathr@google.com>
252
253 * i386-opc.tbl: Add RepPrefixOk to nop.
254 * i386-tbl.h: Regenerate.
255
256 2012-06-28 Nick Clifton <nickc@redhat.com>
257
258 * po/vi.po: Updated Vietnamese translation.
259
260 2012-06-22 Roland McGrath <mcgrathr@google.com>
261
262 * i386-opc.tbl: Add RepPrefixOk to ret.
263 * i386-tbl.h: Regenerate.
264
265 * i386-opc.h (RepPrefixOk): New enum constant.
266 (i386_opcode_modifier): New bitfield 'repprefixok'.
267 * i386-gen.c (opcode_modifiers): Add RepPrefixOk.
268 * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
269 instructions that have IsString.
270 * i386-tbl.h: Regenerate.
271
272 2012-06-11 Andreas Schwab <schwab@linux-m68k.org>
273
274 * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
275 (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
276 (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
277 (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
278 (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
279 (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
280 (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
281 (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
282 (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
283
284 2012-05-19 Alan Modra <amodra@gmail.com>
285
286 * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
287 (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
288
289 2012-05-18 Alan Modra <amodra@gmail.com>
290
291 * ia64-opc.c: Remove #include "ansidecl.h".
292 * z8kgen.c: Include sysdep.h first.
293
294 * arc-dis.c: Include sysdep.h first, remove some redundant includes.
295 * bfin-dis.c: Likewise.
296 * i860-dis.c: Likewise.
297 * ia64-dis.c: Likewise.
298 * ia64-gen.c: Likewise.
299 * m68hc11-dis.c: Likewise.
300 * mmix-dis.c: Likewise.
301 * msp430-dis.c: Likewise.
302 * or32-dis.c: Likewise.
303 * rl78-dis.c: Likewise.
304 * rx-dis.c: Likewise.
305 * tic4x-dis.c: Likewise.
306 * tilegx-opc.c: Likewise.
307 * tilepro-opc.c: Likewise.
308 * rx-decode.c: Regenerate.
309
310 2012-05-17 James Lemke <jwlemke@codesourcery.com>
311
312 * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
313
314 2012-05-17 James Lemke <jwlemke@codesourcery.com>
315
316 * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
317
318 2012-05-17 Daniel Richard G. <skunk@iskunk.org>
319 Nick Clifton <nickc@redhat.com>
320
321 PR 14072
322 * configure.in: Add check that sysdep.h has been included before
323 any system header files.
324 * configure: Regenerate.
325 * config.in: Regenerate.
326 * sysdep.h: Generate an error if included before config.h.
327 * alpha-opc.c: Include sysdep.h before any other header file.
328 * alpha-dis.c: Likewise.
329 * avr-dis.c: Likewise.
330 * cgen-opc.c: Likewise.
331 * cr16-dis.c: Likewise.
332 * cris-dis.c: Likewise.
333 * crx-dis.c: Likewise.
334 * d10v-dis.c: Likewise.
335 * d10v-opc.c: Likewise.
336 * d30v-dis.c: Likewise.
337 * d30v-opc.c: Likewise.
338 * h8500-dis.c: Likewise.
339 * i370-dis.c: Likewise.
340 * i370-opc.c: Likewise.
341 * m10200-dis.c: Likewise.
342 * m10300-dis.c: Likewise.
343 * micromips-opc.c: Likewise.
344 * mips-opc.c: Likewise.
345 * mips61-opc.c: Likewise.
346 * moxie-dis.c: Likewise.
347 * or32-opc.c: Likewise.
348 * pj-dis.c: Likewise.
349 * ppc-dis.c: Likewise.
350 * ppc-opc.c: Likewise.
351 * s390-dis.c: Likewise.
352 * sh-dis.c: Likewise.
353 * sh64-dis.c: Likewise.
354 * sparc-dis.c: Likewise.
355 * sparc-opc.c: Likewise.
356 * spu-dis.c: Likewise.
357 * tic30-dis.c: Likewise.
358 * tic54x-dis.c: Likewise.
359 * tic80-dis.c: Likewise.
360 * tic80-opc.c: Likewise.
361 * tilegx-dis.c: Likewise.
362 * tilepro-dis.c: Likewise.
363 * v850-dis.c: Likewise.
364 * v850-opc.c: Likewise.
365 * vax-dis.c: Likewise.
366 * w65-dis.c: Likewise.
367 * xgate-dis.c: Likewise.
368 * xtensa-dis.c: Likewise.
369 * rl78-decode.opc: Likewise.
370 * rl78-decode.c: Regenerate.
371 * rx-decode.opc: Likewise.
372 * rx-decode.c: Regenerate.
373
374 2012-05-17 Alan Modra <amodra@gmail.com>
375
376 * ppc_dis.c: Don't include elf/ppc.h.
377
378 2012-05-16 Meador Inge <meadori@codesourcery.com>
379
380 * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
381 to PUSH/POP {reg}.
382
383 2012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
384 Stephane Carrez <stcarrez@nerim.fr>
385
386 * configure.in: Add S12X and XGATE co-processor support to m68hc11
387 target.
388 * disassemble.c: Likewise.
389 * configure: Regenerate.
390 * m68hc11-dis.c: Make objdump output more consistent, use hex
391 instead of decimal and use 0x prefix for hex.
392 * m68hc11-opc.c: Add S12X and XGATE opcodes.
393
394 2012-05-14 James Lemke <jwlemke@codesourcery.com>
395
396 * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
397 (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
398 (vle_opcd_indices): New array.
399 (lookup_vle): New function.
400 (disassemble_init_powerpc): Revise for second (VLE) opcode table.
401 (print_insn_powerpc): Likewise.
402 * ppc-opc.c: Likewise.
403
404 2012-05-14 Catherine Moore <clm@codesourcery.com>
405 Maciej W. Rozycki <macro@codesourcery.com>
406 Rhonda Wittels <rhonda@codesourcery.com>
407 Nathan Froyd <froydnj@codesourcery.com>
408
409 * ppc-opc.c (insert_arx, extract_arx): New functions.
410 (insert_ary, extract_ary): New functions.
411 (insert_li20, extract_li20): New functions.
412 (insert_rx, extract_rx): New functions.
413 (insert_ry, extract_ry): New functions.
414 (insert_sci8, extract_sci8): New functions.
415 (insert_sci8n, extract_sci8n): New functions.
416 (insert_sd4h, extract_sd4h): New functions.
417 (insert_sd4w, extract_sd4w): New functions.
418 (insert_vlesi, extract_vlesi): New functions.
419 (insert_vlensi, extract_vlensi): New functions.
420 (insert_vleui, extract_vleui): New functions.
421 (insert_vleil, extract_vleil): New functions.
422 (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
423 (BI16, BI32, BO32, B8): New.
424 (B15, B24, CRD32, CRS): New.
425 (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
426 (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
427 (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
428 (SH6_MASK): Use PPC_OPSHIFT_INV.
429 (SI8, UI5, OIMM5, UI7, BO16): New.
430 (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
431 (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
432 (ALLOW8_SPRG): New.
433 (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
434 (OPVUP, OPVUP_MASK OPVUP): New
435 (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
436 (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
437 (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
438 (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
439 (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
440 (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
441 (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
442 (SE_IM5, SE_IM5_MASK): New.
443 (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
444 (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
445 (BO32DNZ, BO32DZ): New.
446 (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
447 (PPCVLE): New.
448 (powerpc_opcodes): Add new VLE instructions. Update existing
449 instruction to include PPCVLE if supported.
450 * ppc-dis.c (ppc_opts): Add vle entry.
451 (get_powerpc_dialect): New function.
452 (powerpc_init_dialect): VLE support.
453 (print_insn_big_powerpc): Call get_powerpc_dialect.
454 (print_insn_little_powerpc): Likewise.
455 (operand_value_powerpc): Handle negative shift counts.
456 (print_insn_powerpc): Handle 2-byte instruction lengths.
457
458 2012-05-11 Daniel Richard G. <skunk@iskunk.org>
459
460 PR binutils/14028
461 * configure.in: Invoke ACX_HEADER_STRING.
462 * configure: Regenerate.
463 * config.in: Regenerate.
464 * sysdep.h: If STRINGS_WITH_STRING is defined then include both
465 string.h and strings.h.
466
467 2012-05-11 Nick Clifton <nickc@redhat.com>
468
469 PR binutils/14006
470 * arm-dis.c (print_insn): Fix detection of instruction mode in
471 files containing multiple executable sections.
472
473 2012-05-03 Sean Keys <skeys@ipdatasys.com>
474
475 * Makefile.in, configure: regenerate
476 * disassemble.c (disassembler): Recognize ARCH_XGATE.
477 * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
478 New functions.
479 * configure.in: Recognize xgate.
480 * xgate-dis.c, xgate-opc.c: New files for support of xgate
481 * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
482 and opcode generation for xgate.
483
484 2012-04-30 DJ Delorie <dj@redhat.com>
485
486 * rx-decode.opc (MOV): Do not sign-extend immediates which are
487 already the maximum bit size.
488 * rx-decode.c: Regenerate.
489
490 2012-04-27 David S. Miller <davem@davemloft.net>
491
492 * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
493 * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
494
495 * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
496 * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
497
498 * sparc-opc.c (CBCOND): New define.
499 (CBCOND_XCC): Likewise.
500 (cbcond): New helper macro.
501 (sparc_opcodes): Add compare-and-branch instructions.
502
503 * sparc-dis.c (print_insn_sparc): Handle ')'.
504 * sparc-opc.c (sparc_opcodes): Add crypto instructions.
505
506 * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
507 into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
508
509 2012-04-12 David S. Miller <davem@davemloft.net>
510
511 * sparc-dis.c (X_DISP10): Define.
512 (print_insn_sparc): Handle '='.
513
514 2012-04-01 Mike Frysinger <vapier@gentoo.org>
515
516 * bfin-dis.c (fmtconst): Replace decimal handling with a single
517 sprintf call and the '*' field width.
518
519 2012-03-23 Maxim Kuvyrkov <maxim@codesourcery.com>
520
521 * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
522
523 2012-03-16 Alan Modra <amodra@gmail.com>
524
525 * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
526 (powerpc_opcd_indices): Bump array size.
527 (disassemble_init_powerpc): Set powerpc_opcd_indices entries
528 corresponding to unused opcodes to following entry.
529 (lookup_powerpc): New function, extracted and optimised from..
530 (print_insn_powerpc): ..here.
531
532 2012-03-15 Alan Modra <amodra@gmail.com>
533 James Lemke <jwlemke@codesourcery.com>
534
535 * disassemble.c (disassemble_init_for_target): Handle ppc init.
536 * ppc-dis.c (private): New var.
537 (powerpc_init_dialect): Don't return calloc failure, instead use
538 private.
539 (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
540 (powerpc_opcd_indices): New array.
541 (disassemble_init_powerpc): New function.
542 (print_insn_big_powerpc): Don't init dialect here.
543 (print_insn_little_powerpc): Likewise.
544 (print_insn_powerpc): Start search using powerpc_opcd_indices.
545
546 2012-03-10 Edmar Wienskoski <edmar@freescale.com>
547
548 * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
549 * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
550 (PPCVEC2, PPCTMR, E6500): New short names.
551 (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
552 mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
553 lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
554 lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
555 lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
556 optional operands on sync instruction for E6500 target.
557
558 2012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
559
560 * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
561
562 2012-02-27 Alan Modra <amodra@gmail.com>
563
564 * mt-dis.c: Regenerate.
565
566 2012-02-27 Alan Modra <amodra@gmail.com>
567
568 * v850-opc.c (extract_v8): Rearrange to make it obvious this
569 is the inverse of corresponding insert function.
570 (extract_d22, extract_u9, extract_r4): Likewise.
571 (extract_d9): Correct sign extension.
572 (extract_d16_15): Don't assume "long" is 32 bits, and don't
573 rely on implementation defined behaviour for shift right of
574 signed types.
575 (extract_d16_16, extract_d17_16, extract_i9): Likewise.
576 (extract_d23): Likewise, and correct mask.
577
578 2012-02-27 Alan Modra <amodra@gmail.com>
579
580 * crx-dis.c (print_arg): Mask constant to 32 bits.
581 * crx-opc.c (cst4_map): Use int array.
582
583 2012-02-27 Alan Modra <amodra@gmail.com>
584
585 * arc-dis.c (BITS): Don't use shifts to mask off bits.
586 (FIELDD): Sign extend with xor,sub.
587
588 2012-02-25 Walter Lee <walt@tilera.com>
589
590 * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
591 * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
592 TILEPRO_OPC_LW_TLS_SN.
593
594 2012-02-21 H.J. Lu <hongjiu.lu@intel.com>
595
596 * i386-opc.h (HLEPrefixNone): New.
597 (HLEPrefixLock): Likewise.
598 (HLEPrefixAny): Likewise.
599 (HLEPrefixRelease): Likewise.
600
601 2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
602
603 * i386-dis.c (HLE_Fixup1): New.
604 (HLE_Fixup2): Likewise.
605 (HLE_Fixup3): Likewise.
606 (Ebh1): Likewise.
607 (Evh1): Likewise.
608 (Ebh2): Likewise.
609 (Evh2): Likewise.
610 (Ebh3): Likewise.
611 (Evh3): Likewise.
612 (MOD_C6_REG_7): Likewise.
613 (MOD_C7_REG_7): Likewise.
614 (RM_C6_REG_7): Likewise.
615 (RM_C7_REG_7): Likewise.
616 (XACQUIRE_PREFIX): Likewise.
617 (XRELEASE_PREFIX): Likewise.
618 (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
619 cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
620 Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
621 (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
622 not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
623 MOD_C6_REG_7 and MOD_C7_REG_7.
624 (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
625 (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
626 xtest.
627 (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
628 (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
629
630 * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
631 CPU_RTM_FLAGS.
632 (cpu_flags): Add CpuHLE and CpuRTM.
633 (opcode_modifiers): Add HLEPrefixOk.
634
635 * i386-opc.h (CpuHLE): New.
636 (CpuRTM): Likewise.
637 (HLEPrefixOk): Likewise.
638 (i386_cpu_flags): Add cpuhle and cpurtm.
639 (i386_opcode_modifier): Add hleprefixok.
640
641 * i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
642 add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
643 sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
644 operand. Add xacquire, xrelease, xabort, xbegin, xend and
645 xtest.
646 * i386-init.h: Regenerated.
647 * i386-tbl.h: Likewise.
648
649 2012-01-24 DJ Delorie <dj@redhat.com>
650
651 * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
652 * rl78-decode.c: Regenerate.
653
654 2012-01-17 James Murray <jsm@jsm-net.demon.co.uk>
655
656 PR binutils/10173
657 * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
658
659 2012-01-17 Andreas Schwab <schwab@linux-m68k.org>
660
661 * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
662 register and move them after pmove with PSR/PCSR register.
663
664 2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
665
666 * i386-dis.c (mod_table): Add vmfunc.
667
668 * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
669 (cpu_flags): CpuVMFUNC.
670
671 * i386-opc.h (CpuVMFUNC): New.
672 (i386_cpu_flags): Add cpuvmfunc.
673
674 * i386-opc.tbl: Add vmfunc.
675 * i386-init.h: Regenerated.
676 * i386-tbl.h: Likewise.
677
678 For older changes see ChangeLog-2011
679 \f
680 Local Variables:
681 mode: change-log
682 left-margin: 8
683 fill-column: 74
684 version-control: never
685 End:
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