1 2010-07-03 Alan Modra <amodra@gmail.com>
3 * ppc-opc.c (PWR2COM): Define.
4 (PPCPWR2): Add PPC_OPCODE_COMMON.
5 (powerpc_opcodes): Add "subc", "subco", "subco.", "fcir", "fcir.",
6 "fcirz", "fcirz." to -mcom opcodes. Remove "mfsri", "dclst",
9 2010-07-01 H.J. Lu <hongjiu.lu@intel.com>
11 AVX Programming Reference (June, 2010)
12 * i386-dis.c (PREFIX_0FAE_REG_0): New.
13 (PREFIX_0FAE_REG_1): Likewise.
14 (PREFIX_0FAE_REG_2): Likewise.
15 (PREFIX_0FAE_REG_3): Likewise.
16 (PREFIX_VEX_3813): Likewise.
17 (PREFIX_VEX_3A1D): Likewise.
18 (prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
19 PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 and
21 (vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D.
22 (mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
23 PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd.
25 * i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS,
26 CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS.
27 (cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C.
29 * i386-opc.h (CpuXsaveopt): New.
30 (CpuFSGSBase):Likewise.
33 (i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and
36 * i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd,
37 wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph.
38 * i386-init.h: Regenerated.
39 * i386-tbl.h: Likewise.
41 2010-07-01 Sebastian Andrzej Siewior <bigeasy@linutronix.de>
43 * ppc-opc.c (powerpc_opcodes): Revert deprecation of mfocrf, mtcrf
46 2010-06-29 Alan Modra <amodra@gmail.com>
48 * maxq-dis.c: Delete file.
49 * Makefile.am: Remove references to maxq.
50 * configure.in: Likewise.
51 * disassemble.c: Likewise.
52 * Makefile.in: Regenerate.
53 * configure: Regenerate.
54 * po/POTFILES.in: Regenerate.
56 2010-06-29 Alan Modra <amodra@gmail.com>
58 * mep-dis.c: Regenerate.
60 2010-06-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
62 * arm-disc.c (parse_insn_neon): Fix Neon alignment syntax.
64 2010-06-27 Alan Modra <amodra@gmail.com>
66 * arc-dis.c (arc_sprintf): Delete set but unused variables.
67 (decodeInstr): Likewise.
68 * dlx-dis.c (print_insn_dlx): Likewise.
69 * h8300-dis.c (bfd_h8_disassemble_init): Likewise.
70 * maxq-dis.c (check_move, print_insn): Likewise.
71 * mep-dis.c (mep_examine_ivc2_insns): Likewise.
72 * msp430-dis.c (msp430_branchinstr): Likewise.
73 * bfin-dis.c (_print_insn_bfin): Avoid set but unused warning.
74 * cgen-asm.in (parse_insn_normal, _cgen_assemble_insn): Likewise.
75 * sparc-dis.c (print_insn_sparc): Likewise.
76 * fr30-asm.c: Regenerate.
77 * frv-asm.c: Regenerate.
78 * ip2k-asm.c: Regenerate.
79 * iq2000-asm.c: Regenerate.
80 * lm32-asm.c: Regenerate.
81 * m32c-asm.c: Regenerate.
82 * m32r-asm.c: Regenerate.
83 * mep-asm.c: Regenerate.
84 * mt-asm.c: Regenerate.
85 * openrisc-asm.c: Regenerate.
86 * xc16x-asm.c: Regenerate.
87 * xstormy16-asm.c: Regenerate.
89 2010-06-16 Vincent Rivière <vincent.riviere@freesbee.fr>
92 * m68k-opc.c (m68k_opcodes): Remove move.l for isab and later.
94 2010-06-16 Vincent Rivière <vincent.riviere@freesbee.fr>
97 * m68k-dis.c (print_insn_arg): Prefix float constants with #0e.
99 2010-06-14 Sebastian Andrzej Siewior <bigeasy@linutronix.de>
101 * ppc-dis.c (ppc_opts): Remove PPC_OPCODE_E500MC from e500 and
102 e500x2. Add PPC_OPCODE_E500 to e500 and e500x2
103 * ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which
104 touch floating point regs and are enabled by COM, PPC or PPCCOM.
105 Treat sync as msync on e500. Treat eieio as mbar 1 on e500.
106 Treat lwsync as msync on e500.
108 2010-06-07 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
110 * arm-dis.c (thumb-opcodes): Add disassembly for movs.
112 2010-05-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
114 * arm-dis.c (print_insn_neon): Ensure disassembly of Neon
115 constants is the same on 32-bit and 64-bit hosts.
117 2010-05-27 Jason Duerstock <jason.duerstock+binutils@gmail.com>
119 * m68k-dis.c (print_insn_m68k): Emit undefined instructions as
120 .short directives so that they can be reassembled.
122 2010-05-26 Catherine Moore <clm@codesourcery.com>
123 David Ung <davidu@mips.com>
125 * mips-opc.c: Change membership to I1 for instructions ssnop and
128 2010-05-26 H.J. Lu <hongjiu.lu@intel.com>
130 * i386-dis.c (sib): New.
132 (print_insn): Call get_sib.
133 OP_E_memory): Use sib.
135 2010-05-26 Catherine Moore <clm@codesoourcery.com>
137 * mips-dis.c (mips_arch): Remove INSN_MIPS16.
138 * mips-opc.c (I16): Remove.
139 (mips_builtin_op): Reclassify jalx.
141 2010-05-19 Alan Modra <amodra@gmail.com>
143 * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
144 divwe, divdeuo, divweuo, divdeo, divweo for A2. Add icswepx.
146 2010-05-13 Alan Modra <amodra@gmail.com>
148 * ppc-opc.c (powerpc_opcodes): Correct wclr encoding.
150 2010-05-11 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
152 * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
154 (print_insn_thumb16): Add support for new %W format.
156 2010-05-07 Tristan Gingold <gingold@adacore.com>
158 * Makefile.in: Regenerate with automake 1.11.1.
161 2010-05-05 Nick Clifton <nickc@redhat.com>
163 * po/es.po: Updated Spanish translation.
165 2010-04-22 Nick Clifton <nickc@redhat.com>
167 * po/opcodes.pot: Updated by the Translation project.
168 * po/vi.po: Updated Vietnamese translation.
170 2010-04-16 H.J. Lu <hongjiu.lu@intel.com>
172 * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
175 2010-04-09 Nick Clifton <nickc@redhat.com>
177 * i386-dis.c (print_insn): Remove unused variable op.
178 (OP_sI): Remove unused variable mask.
180 2010-04-07 Alan Modra <amodra@gmail.com>
182 * configure: Regenerate.
184 2010-04-06 Peter Bergner <bergner@vnet.ibm.com>
186 * ppc-opc.c (RBOPT): New define.
187 ("dccci"): Enable for PPCA2. Make operands optional.
188 ("iccci"): Likewise. Do not deprecate for PPC476.
190 2010-04-02 Masaki Muranaka <monaka@monami-software.com>
192 * cr16-opc.c (cr16_instruction): Fix typo in comment.
194 2010-03-25 Joseph Myers <joseph@codesourcery.com>
196 * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
197 * Makefile.in: Regenerate.
198 * configure.in (bfd_tic6x_arch): New.
199 * configure: Regenerate.
200 * disassemble.c (ARCH_tic6x): Define if ARCH_all.
201 (disassembler): Handle TI C6X.
204 2010-03-24 Mike Frysinger <vapier@gentoo.org>
206 * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
208 2010-03-23 Joseph Myers <joseph@codesourcery.com>
210 * dis-buf.c (buffer_read_memory): Give error for reading just
211 before the start of memory.
213 2010-03-22 Sebastian Pop <sebastian.pop@amd.com>
214 Quentin Neill <quentin.neill@amd.com>
216 * i386-dis.c (OP_LWP_I): Removed.
217 (reg_table): Do not use OP_LWP_I, use Iq.
218 (OP_LWPCB_E): Remove use of names16.
220 * i386-opc.tbl: Removed 16bit LWP insns. 32bit LWP insns
221 should not set the Vex.length bit.
222 * i386-tbl.h: Regenerated.
224 2010-02-25 Edmar Wienskoski <edmar@freescale.com>
226 * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
228 2010-02-24 Nick Clifton <nickc@redhat.com>
231 * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
232 <prefix>asx. Replace <prefix>subaddx with <prefix>sax.
233 (thumb32_opcodes): Likewise.
235 2010-02-15 Nick Clifton <nickc@redhat.com>
237 * po/vi.po: Updated Vietnamese translation.
239 2010-02-12 Doug Evans <dje@sebabeach.org>
241 * lm32-opinst.c: Regenerate.
243 2010-02-11 Doug Evans <dje@sebabeach.org>
245 * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
246 (print_address): Delete CGEN_PRINT_ADDRESS.
247 * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
248 * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
249 * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
250 * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
252 * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
253 * frv-desc.c, * frv-desc.h, * frv-opc.c,
254 * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
255 * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
256 * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
257 * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
258 * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
259 * mep-desc.c, * mep-desc.h, * mep-opc.c,
260 * mt-desc.c, * mt-desc.h, * mt-opc.c,
261 * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
262 * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
263 * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
265 2010-02-11 H.J. Lu <hongjiu.lu@intel.com>
267 * i386-dis.c: Update copyright.
268 * i386-gen.c: Likewise.
269 * i386-opc.h: Likewise.
270 * i386-opc.tbl: Likewise.
272 2010-02-10 Quentin Neill <quentin.neill@amd.com>
273 Sebastian Pop <sebastian.pop@amd.com>
275 * i386-dis.c (OP_EX_VexImmW): Reintroduced
276 function to handle 5th imm8 operand.
277 (PREFIX_VEX_3A48): Added.
278 (PREFIX_VEX_3A49): Added.
279 (VEX_W_3A48_P_2): Added.
280 (VEX_W_3A49_P_2): Added.
281 (prefix table): Added entries for PREFIX_VEX_3A48
283 (vex table): Added entries for VEX_W_3A48_P_2 and
285 * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
286 for Vec_Imm4 operands.
287 * i386-opc.h (enum): Added Vec_Imm4.
288 (i386_operand_type): Added vec_imm4.
289 * i386-opc.tbl: Add entries for vpermilp[ds].
290 * i386-init.h: Regenerated.
291 * i386-tbl.h: Regenerated.
293 2010-02-10 Richard Sandiford <r.sandiford@uk.ibm.com>
295 * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
296 and "pwr7". Move "a2" into alphabetical order.
298 2010-02-08 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
300 * ppc-dis.c (ppc_opts): Add titan entry.
301 * ppc-opc.c (TITAN, MULHW): Define.
302 (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
304 2010-02-03 Quentin Neill <quentin.neill@amd.com>
306 * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
308 * i386-init.h: Regenerated.
310 2010-02-03 Anthony Green <green@moxielogic.com>
312 * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
313 0x0f, and make 0x00 an illegal instruction.
315 2010-01-29 Daniel Jacobowitz <dan@codesourcery.com>
317 * opcodes/arm-dis.c (struct arm_private_data): New.
318 (print_insn_coprocessor, print_insn_arm): Update to use struct
320 (is_mapping_symbol, get_map_sym_type): New functions.
321 (get_sym_code_type): Check the symbol's section. Do not check
323 (print_insn): Default to disassembling ARM mode code. Check
324 for mapping symbols separately from other symbols. Use
325 struct arm_private_data.
327 2010-01-28 H.J. Lu <hongjiu.lu@intel.com>
329 * i386-dis.c (EXVexWdqScalar): New.
330 (vex_scalar_w_dq_mode): Likewise.
331 (prefix_table): Update entries for PREFIX_VEX_3899,
332 PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
333 PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
334 PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
335 PREFIX_VEX_38BD and PREFIX_VEX_38BF.
336 (intel_operand_size): Handle vex_scalar_w_dq_mode.
339 2010-01-27 H.J. Lu <hongjiu.lu@intel.com>
341 * i386-dis.c (XMScalar): New.
342 (EXdScalar): Likewise.
343 (EXqScalar): Likewise.
344 (EXqScalarS): Likewise.
345 (VexScalar): Likewise.
346 (EXdVexScalarS): Likewise.
347 (EXqVexScalarS): Likewise.
348 (XMVexScalar): Likewise.
349 (scalar_mode): Likewise.
350 (d_scalar_mode): Likewise.
351 (d_scalar_swap_mode): Likewise.
352 (q_scalar_mode): Likewise.
353 (q_scalar_swap_mode): Likewise.
354 (vex_scalar_mode): Likewise.
355 (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
356 VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
357 VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
358 VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
359 VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
360 VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
361 VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
362 VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
363 VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
364 VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
365 (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
366 VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
367 VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
368 VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
369 VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
370 VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
371 VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
372 VEX_W_7E_P_1, VEX_W_D6_P_2 VEX_W_C2_P_1, VEX_W_C2_P_3,
373 VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
374 (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
375 q_scalar_mode, q_scalar_swap_mode.
376 (OP_XMM): Handle scalar_mode.
377 (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
378 and q_scalar_swap_mode.
379 (OP_VEX): Handle vex_scalar_mode.
381 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
383 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
385 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
387 * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
389 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
391 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
393 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
395 * i386-dis.c (Bad_Opcode): New.
396 (bad_opcode): Likewise.
397 (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
398 (dis386_twobyte): Likewise.
399 (reg_table): Likewise.
400 (prefix_table): Likewise.
401 (x86_64_table): Likewise.
402 (vex_len_table): Likewise.
403 (vex_w_table): Likewise.
404 (mod_table): Likewise.
405 (rm_table): Likewise.
406 (float_reg): Likewise.
407 (reg_table): Remove trailing "(bad)" entries.
408 (prefix_table): Likewise.
409 (x86_64_table): Likewise.
410 (vex_len_table): Likewise.
411 (vex_w_table): Likewise.
412 (mod_table): Likewise.
413 (rm_table): Likewise.
414 (get_valid_dis386): Handle bytemode 0.
416 2010-01-23 H.J. Lu <hongjiu.lu@intel.com>
418 * i386-opc.h (VEXScalar): New.
420 * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
422 * i386-tbl.h: Regenerated.
424 2010-01-21 H.J. Lu <hongjiu.lu@intel.com>
426 * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
428 * i386-opc.tbl: Add xsave64 and xrstor64.
429 * i386-tbl.h: Regenerated.
431 2010-01-20 Nick Clifton <nickc@redhat.com>
434 * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
435 based post-indexed addressing.
437 2010-01-15 Sebastian Pop <sebastian.pop@amd.com>
439 * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
440 * i386-tbl.h: Regenerated.
442 2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
444 * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
447 2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
449 * i386-dis.c (names_mm): New.
450 (intel_names_mm): Likewise.
451 (att_names_mm): Likewise.
452 (names_xmm): Likewise.
453 (intel_names_xmm): Likewise.
454 (att_names_xmm): Likewise.
455 (names_ymm): Likewise.
456 (intel_names_ymm): Likewise.
457 (att_names_ymm): Likewise.
458 (print_insn): Set names_mm, names_xmm and names_ymm.
459 (OP_MMX): Use names_mm, names_xmm and names_ymm.
465 (XMM_Fixup): Likewise.
467 (OP_EX_VexReg): Likewise.
468 (OP_Vex_2src): Likewise.
469 (OP_Vex_2src_1): Likewise.
470 (OP_Vex_2src_2): Likewise.
471 (OP_REG_VexI4): Likewise.
473 2010-01-13 H.J. Lu <hongjiu.lu@intel.com>
475 * i386-dis.c (print_insn): Update comments.
477 2010-01-12 H.J. Lu <hongjiu.lu@intel.com>
479 * i386-dis.c (rex_original): Removed.
480 (ckprefix): Remove rex_original.
481 (print_insn): Update comments.
483 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
485 * Makefile.in: Regenerate.
486 * configure: Regenerate.
488 2010-01-07 Doug Evans <dje@sebabeach.org>
490 * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
491 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
492 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
493 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
494 * xstormy16-ibld.c: Regenerate.
496 2010-01-06 Quentin Neill <quentin.neill@amd.com>
498 * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
499 * i386-init.h: Regenerated.
501 2010-01-06 Daniel Gutson <dgutson@codesourcery.com>
503 * arm-dis.c (print_insn): Fixed search for next symbol and data
504 dumping condition, and the initial mapping symbol state.
506 2010-01-05 Doug Evans <dje@sebabeach.org>
508 * cgen-ibld.in: #include "cgen/basic-modes.h".
509 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
510 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
511 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
512 * xstormy16-ibld.c: Regenerate.
514 2010-01-04 Nick Clifton <nickc@redhat.com>
517 * arm-dis.c (print_insn_coprocessor): Initialise value.
519 2010-01-04 Edmar Wienskoski <edmar@freescale.com>
521 * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
523 2010-01-02 Doug Evans <dje@sebabeach.org>
525 * cgen-asm.in: Update copyright year.
526 * cgen-dis.in: Update copyright year.
527 * cgen-ibld.in: Update copyright year.
528 * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
529 * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
530 * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
531 * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
532 * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
533 * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
534 * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
535 * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
536 * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
537 * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
538 * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
539 * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
540 * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
541 * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
542 * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
543 * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
544 * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
545 * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
546 * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
547 * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
548 * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
550 For older changes see ChangeLog-2009
556 version-control: never