opcodes/ChangeLog

   1 2012-09-18  Chao-ying Fu  <fu@mips.com>
   2
   3         * micromips-opc.c (micromips_opcodes): Correct the encoding of
   4         the "swxc1" instruction.
   5
   6 2012-09-17  Yufeng Zhang  <yufeng.zhang@arm.com>
   7
   8         * aarch64-asm.c (aarch64_ins_imm_half): Remove ATTRIBUTE_UNUSED from
   9         the parameter 'inst'.
  10         (aarch64_ins_addr_simm): Add ATTRIBUTE_UNUSED to the parameter 'inst'.
  11         (convert_mov_to_movewide): Change to assert (0) when
  12         aarch64_wide_constant_p returns FALSE.
  13
  14 2012-09-14  David Edelsohn  <dje.gcc@gmail.com>
  15
  16         * configure: Regenerate.
  17
  18 2012-09-14  Anthony Green  <green@moxielogic.com>
  19
  20         * moxie-dis.c (print_insn_moxie): Branch targets are relative to
  21         the address after the branch instruction.
  22
  23 2012-09-13  Anthony Green  <green@moxielogic.com>
  24
  25         * moxie-dis.c (print_insn_moxie): Handle bi-endian encodings.
  26
  27 2012-09-10  Matthias Klose  <doko@ubuntu.com>
  28
  29         * config.in: Disable sanity check for kfreebsd.
  30
  31 2012-09-10  H.J. Lu  <hongjiu.lu@intel.com>
  32
  33         * configure: Regenerated.
  34
  35 2012-09-04  Sergey A. Guriev <sergey.a.guriev@intel.com>
  36
  37         * ia64-asmtab.h (completer_index): Extend bitfield to full uint.
  38         * ia64-gen.c: Promote completer index type to longlong.
  39         (irf_operand): Add new register recognition.
  40         (in_iclass_mov_x): Add an entry for the new mov_* instruction type.
  41         (lookup_specifier): Add new resource recognition.
  42         (insert_bit_table_ent): Relax abort condition according to the
  43         changed completer index type.
  44         (print_dis_table): Fix printf format for completer index.
  45         * ia64-ic.tbl: Add a new instruction class.
  46         * ia64-opc-i.c (ia64_opcodes_i): Define new I-instructions.
  47         * ia64-opc-m.c (ia64_opcodes_m): Define new M-instructions.
  48         * ia64-opc.h: Define short names for new operand types.
  49         * ia64-raw.tbl: Add new RAW resource for DAHR register.
  50         * ia64-waw.tbl: Add new WAW resource for DAHR register.
  51         * ia64-asmtab.c: Regenerate.
  52
  53 2012-08-29  Peter Bergner  <bergner@vnet.ibm.com>
  54
  55         * ppc-opc.c (VXASHB_MASK): New define.
  56         (powerpc_opcodes) <vsldoi>: Use VXASHB_MASK.
  57
  58 2012-08-28  Peter Bergner  <bergner@vnet.ibm.com>
  59
  60         * ppc-opc.c (UIMM4, UIMM3, UIMM2, VXVA_MASK, VXVB_MASK, VXVAVB_MASK,
  61         VXVDVA_MASK, VXUIMM4_MASK, VXUIMM3_MASK, VXUIMM2_MASK): New defines.
  62         (powerpc_opcodes) <vexptefp, vlogefp, vrefp, vrfim, vrfin, vrfip,
  63         vrfiz, vrsqrtefp, vupkhpx, vupkhsb, vupkhsh, vupklpx, vupklsb,
  64         vupklsh>: Use VXVA_MASK.
  65         <vspltisb, vspltish, vspltisw>: Use VXVB_MASK.
  66         <mfvscr>: Use VXVAVB_MASK.
  67         <mtvscr>: Use VXVDVA_MASK.
  68         <vspltb>: Use VXUIMM4_MASK.
  69         <vsplth>: Use VXUIMM3_MASK.
  70         <vspltw>: Use VXUIMM2_MASK.
  71
  72 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  73
  74         * arm-dis.c (neon_opcodes): Add 2 operand sha instructions.
  75
  76 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  77
  78         * arm-dis.c (neon_opcodes): Add SHA 3-operand instructions.
  79
  80 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  81
  82         * arm-dis.c (neon_opcodes): Handle VMULL.P64.
  83
  84 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  85
  86         * arm-dis.c (neon_opcodes): Add support for AES instructions.
  87
  88 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  89
  90         * arm-dis.c (coprocessor_opcodes): Add support for HP/DP
  91         conversions.
  92
  93 2012-08-24  Matthew  Gretton-Dann  <matthew.gretton-dann@arm.com>
  94
  95         * arm-dis.c (coprocessor_opcodes): Add VRINT.
  96         (neon_opcodes): Likewise.
  97
  98 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  99
 100         * arm-dis.c (coprocessor_opcodes): Add support for new VCVT
 101         variants.
 102         (neon_opcodes): Likewise.
 103
 104 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 105
 106         * arm-dis.c (coprocessor_opcodes): Add VMAXNM/VMINNM.
 107         (neon_opcodes): Likewise.
 108
 109 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 110
 111         * arm-dis.c (coprocessor_opcodes): Add VSEL.
 112         (print_insn_coprocessor): Add new %<>c bitfield format
 113         specifier.
 114
 115 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 116
 117         * arm-dis.c (arm_opcodes): Add LDRA/STRL instructions.
 118         (thumb32_opcodes): Likewise.
 119         (print_arm_insn): Add support for %<>T formatter.
 120
 121 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 122
 123         * arm-dis.c (arm_opcodes): Add HLT.
 124         (thumb_opcodes): Likewise.
 125
 126 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 127
 128         * arm-dis.c (thumb32_opcodes): Add DCPS instruction.
 129
 130 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 131
 132         * arm-dis.c (arm_opcodes): Add SEVL.
 133         (thumb_opcodes): Likewise.
 134         (thumb32_opcodes): Likewise.
 135
 136 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 137
 138         * arm-dis.c (data_barrier_option): New function.
 139         (print_insn_arm): Use data_barrier_option.
 140         (print_insn_thumb32): Use data_barrier_option.
 141
 142 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com
 143
 144         * arm-dis.c (COND_UNCOND): New constant.
 145         (print_insn_coprocessor): Add support for %u format specifier.
 146         (print_insn_neon): Likewise.
 147
 148 2012-08-21  David S. Miller  <davem@davemloft.net>
 149
 150         * sparc-opc.c (4-argument crypto instructions): Fix encoding using
 151         F3F4 macro.
 152
 153 2012-08-20  Edmar Wienskoski  <edmar@freescale.com>
 154
 155         * ppc-opc.c (powerpc_opcodes): Changed opcode for vabsdub,
 156         vabsduh, vabsduw, mviwsplt.
 157
 158 2012-08-17  Nagajyothi Eggone  <nagajyothi.eggone@amd.com>
 159
 160         * i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and
 161         CPU_BTVER2_FLAGS.
 162
 163         * i386-opc.h: Update CpuPRFCHW comment.
 164
 165         * i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW.
 166         * i386-init.h: Regenerated.
 167         * i386-tbl.h: Likewise.
 168
 169 2012-08-17  Nick Clifton  <nickc@redhat.com>
 170
 171         * po/uk.po: New Ukranian translation.
 172         * configure.in (ALL_LINGUAS): Add uk.
 173         * configure: Regenerate.
 174
 175 2012-08-16  Peter Bergner  <bergner@vnet.ibm.com>
 176
 177         * ppc-opc.c (powerpc_opcodes) <"lswx">: Use RAX for the second and
 178         RBX for the third operand.
 179         <"lswi">: Use RAX for second and NBI for the third operand.
 180
 181 2012-08-15  DJ Delorie  <dj@redhat.com>
 182
 183         * rl78-decode.opc (rl78_decode_opcode): Merge %e and %[01]
 184         operands, so that data addresses can be corrected when not
 185         ES-overridden.
 186         * rl78-decode.c: Regenerate.
 187         * rl78-dis.c (print_insn_rl78): Make order of modifiers
 188         irrelevent.  When the 'e' specifier is used on an operand and no
 189         ES prefix is provided, adjust address to make it absolute.
 190
 191 2012-08-15  Peter Bergner  <bergner@vnet.ibm.com>
 192
 193         * ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR.
 194
 195 2012-08-15  Peter Bergner  <bergner@vnet.ibm.com>
 196
 197         * ppc-opc.c <xnop, yield, mdoio, mdoom>: New extended mnemonics.
 198
 199 2012-08-14  Maciej W. Rozycki  <macro@codesourcery.com>
 200
 201         * mips-dis.c (print_insn_args): Add GET_OP and GET_OP_S local
 202         macros, use local variables for info struct member accesses,
 203         update the type of the variable used to hold the instruction
 204         word.
 205         (print_insn_mips, print_mips16_insn_arg): Likewise.
 206         (print_insn_mips16): Add GET_OP and GET_OP_S local macros, use
 207         local variables for info struct member accesses.
 208         (print_insn_micromips): Add GET_OP_S local macro.
 209         (_print_insn_mips): Update the type of the variable used to hold
 210         the instruction word.
 211
 212 2012-08-13  Ian Bolton  <ian.bolton@arm.com>
 213             Laurent Desnogues  <laurent.desnogues@arm.com>
 214             Jim MacArthur  <jim.macarthur@arm.com>
 215             Marcus Shawcroft  <marcus.shawcroft@arm.com>
 216             Nigel Stephens  <nigel.stephens@arm.com>
 217             Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 218             Richard Earnshaw  <rearnsha@arm.com>
 219             Sofiane Naci  <sofiane.naci@arm.com>
 220             Tejas Belagod  <tejas.belagod@arm.com>
 221             Yufeng Zhang  <yufeng.zhang@arm.com>
 222
 223         * Makefile.am: Add AArch64.
 224         * Makefile.in: Regenerate.
 225         * aarch64-asm.c: New file.
 226         * aarch64-asm.h: New file.
 227         * aarch64-dis.c: New file.
 228         * aarch64-dis.h: New file.
 229         * aarch64-gen.c: New file.
 230         * aarch64-opc.c: New file.
 231         * aarch64-opc.h: New file.
 232         * aarch64-tbl.h: New file.
 233         * configure.in: Add AArch64.
 234         * configure: Regenerate.
 235         * disassemble.c: Add AArch64.
 236         * aarch64-asm-2.c: New file (automatically generated).
 237         * aarch64-dis-2.c: New file (automatically generated).
 238         * aarch64-opc-2.c: New file (automatically generated).
 239         * po/POTFILES.in: Regenerate.
 240
 241 2012-08-13  Maciej W. Rozycki  <macro@codesourcery.com>
 242
 243         * micromips-opc.c (micromips_opcodes): Update comment.
 244         * mips-opc.c (mips_builtin_opcodes): Likewise.  Mark coprocessor
 245         instructions for IOCT as appropriate.
 246         * mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with
 247         opcode_is_member.
 248         * configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with
 249         the result of a check for the -Wno-missing-field-initializers
 250         GCC option.
 251         * Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable.
 252         (mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to
 253         compilation.
 254         (mips16-opc.lo): Likewise.
 255         (micromips-opc.lo): Likewise.
 256         * aclocal.m4: Regenerate.
 257         * configure: Regenerate.
 258         * Makefile.in: Regenerate.
 259
 260 2012-08-11  Saravanan Ekanathan <saravanan.ekanathan@amd.com>
 261
 262         PR gas/14423
 263         * i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS.
 264         * i386-init.h: Regenerated.
 265
 266 2012-08-09  Nick Clifton  <nickc@redhat.com>
 267
 268         * po/vi.po: Updated Vietnamese translation.
 269
 270 2012-08-07  Roland McGrath  <mcgrathr@google.com>
 271
 272         * i386-dis.c (reg_table): Fill out REG_0F0D table with
 273         AMD-reserved cases as "prefetch".
 274         (MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants.
 275         (MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise.
 276         (reg_table): Use those under REG_0F18.
 277         (mod_table): Add those cases as "nop/reserved".
 278
 279 2012-08-07  Jan Beulich <jbeulich@suse.com>
 280
 281         * i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
 282
 283 2012-08-06  Roland McGrath  <mcgrathr@google.com>
 284
 285         * i386-dis.c (print_insn): Print spaces between multiple excess
 286         prefixes.  Return actual number of excess prefixes consumed,
 287         not always one.
 288
 289         * i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
 290
 291 2012-08-06  Roland McGrath  <mcgrathr@google.com>
 292             Victor Khimenko  <khim@google.com>
 293             H.J. Lu  <hongjiu.lu@intel.com>
 294
 295         * i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG.
 296         (putop): For 'T', 'U', and 'V', treat REX_W like DFLAG.
 297         (intel_operand_size): For stack_v_mode, treat REX_W like DFLAG.
 298         (OP_E_register): Likewise.
 299         (OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
 300
 301 2012-08-02  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 302
 303         * configure.in: Formatting.
 304         * configure: Regenerate.
 305
 306 2012-08-01  Alan Modra  <amodra@gmail.com>
 307
 308         * h8300-dis.c: Fix printf arg warnings.
 309         * i960-dis.c: Likewise.
 310         * mips-dis.c: Likewise.
 311         * pdp11-dis.c: Likewise.
 312         * sh-dis.c: Likewise.
 313         * v850-dis.c: Likewise.
 314         * configure.in: Formatting.
 315         * configure: Regenerate.
 316         * rl78-decode.c: Regenerate.
 317         * po/POTFILES.in: Regenerate.
 318
 319 2012-07-31  Chao-Ying Fu  <fu@mips.com>
 320             Catherine Moore  <clm@codesourcery.com>
 321             Maciej W. Rozycki  <macro@codesourcery.com>
 322
 323         * micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
 324         (DSP_VOLA): Likewise.
 325         (D32, D33): Likewise.
 326         (micromips_opcodes): Add DSP ASE instructions.
 327         * mips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
 328         <'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
 329
 330 2012-07-31  Jan Beulich <jbeulich@suse.com>
 331
 332         * i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2
 333         instruction group. Mark as requiring AVX2.
 334         * i386-tbl.h: Re-generate.
 335
 336 2012-07-30  Nick Clifton  <nickc@redhat.com>
 337
 338         * po/opcodes.pot: Updated template.
 339         * po/es.po: Updated Spanish translation.
 340         * po/fi.po: Updated Finnish translation.
 341
 342 2012-07-27  Mike Frysinger  <vapier@gentoo.org>
 343
 344         * configure.in (BFD_VERSION): Run bfd/configure --version and
 345         parse the output of that.
 346         * configure: Regenerate.
 347
 348 2012-07-25  James Lemke  <jwlemke@codesourcery.com>
 349
 350         * ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
 351
 352 2012-07-24  Stephan McCamant  <smcc@cs.berkeley.edu>
 353             Dr David Alan Gilbert  <dave@treblig.org>
 354
 355         PR binutils/13135
 356         * arm-dis.c: Add necessary casts for printing integer values.
 357         Use %s when printing string values.
 358         * hppa-dis.c: Likewise.
 359         * m68k-dis.c: Likewise.
 360         * microblaze-dis.c: Likewise.
 361         * mips-dis.c: Likewise.
 362         * sparc-dis.c: Likewise.
 363
 364 2012-07-19  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 365
 366         PR binutils/14355
 367         * i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
 368         (VEX_LEN_0FXOP_08_CD): Likewise.
 369         (VEX_LEN_0FXOP_08_CE): Likewise.
 370         (VEX_LEN_0FXOP_08_CF): Likewise.
 371         (VEX_LEN_0FXOP_08_EC): Likewise.
 372         (VEX_LEN_0FXOP_08_ED): Likewise.
 373         (VEX_LEN_0FXOP_08_EE): Likewise.
 374         (VEX_LEN_0FXOP_08_EF): Likewise.
 375         (xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
 376         vpcomub, vpcomuw, vpcomud, vpcomuq.
 377         (vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
 378         VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
 379         VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
 380         VEX_LEN_0FXOP_08_EF.
 381
 382 2012-07-16  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 383
 384         * i386-dis.c (PREFIX_0F38F6): New.
 385         (prefix_table): Add adcx, adox instructions.
 386         (three_byte_table): Use PREFIX_0F38F6.
 387         (mod_table): Add rdseed instruction.
 388         * i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
 389         (cpu_flags): Likewise.
 390         * i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
 391         (i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
 392         * i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
 393         prefetchw.
 394         * i386-tbl.h: Regenerate.
 395         * i386-init.h: Likewise.
 396
 397 2012-07-05  Thomas Schwinge  <thomas@codesourcery.com>
 398
 399         * mips-dis.c: Remove gratuitous newline.
 400
 401 2012-07-05  Sean Keys  <skeys@ipdatasys.com>
 402
 403         * xgate-dis.c: Removed an IF statement that will
 404         always be false due to overlapping operand masks.
 405         * xgate-opc.c: Corrected 'com' opcode entry and
 406         fixed spacing.
 407
 408 2012-07-02  Roland McGrath  <mcgrathr@google.com>
 409
 410         * i386-opc.tbl: Add RepPrefixOk to nop.
 411         * i386-tbl.h: Regenerate.
 412
 413 2012-06-28  Nick Clifton  <nickc@redhat.com>
 414
 415         * po/vi.po: Updated Vietnamese translation.
 416
 417 2012-06-22  Roland McGrath  <mcgrathr@google.com>
 418
 419         * i386-opc.tbl: Add RepPrefixOk to ret.
 420         * i386-tbl.h: Regenerate.
 421
 422         * i386-opc.h (RepPrefixOk): New enum constant.
 423         (i386_opcode_modifier): New bitfield 'repprefixok'.
 424         * i386-gen.c (opcode_modifiers): Add RepPrefixOk.
 425         * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
 426         instructions that have IsString.
 427         * i386-tbl.h: Regenerate.
 428
 429 2012-06-11  Andreas Schwab  <schwab@linux-m68k.org>
 430
 431         * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
 432         (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
 433         (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
 434         (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
 435         (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
 436         (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
 437         (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
 438         (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
 439         (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
 440
 441 2012-05-19  Alan Modra  <amodra@gmail.com>
 442
 443         * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
 444         (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
 445
 446 2012-05-18  Alan Modra  <amodra@gmail.com>
 447
 448         * ia64-opc.c: Remove #include "ansidecl.h".
 449         * z8kgen.c: Include sysdep.h first.
 450
 451         * arc-dis.c: Include sysdep.h first, remove some redundant includes.
 452         * bfin-dis.c: Likewise.
 453         * i860-dis.c: Likewise.
 454         * ia64-dis.c: Likewise.
 455         * ia64-gen.c: Likewise.
 456         * m68hc11-dis.c: Likewise.
 457         * mmix-dis.c: Likewise.
 458         * msp430-dis.c: Likewise.
 459         * or32-dis.c: Likewise.
 460         * rl78-dis.c: Likewise.
 461         * rx-dis.c: Likewise.
 462         * tic4x-dis.c: Likewise.
 463         * tilegx-opc.c: Likewise.
 464         * tilepro-opc.c: Likewise.
 465         * rx-decode.c: Regenerate.
 466
 467 2012-05-17  James Lemke  <jwlemke@codesourcery.com>
 468
 469         * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
 470
 471 2012-05-17  James Lemke  <jwlemke@codesourcery.com>
 472
 473         * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
 474
 475 2012-05-17  Daniel Richard G.  <skunk@iskunk.org>
 476             Nick Clifton  <nickc@redhat.com>
 477
 478         PR 14072
 479         * configure.in: Add check that sysdep.h has been included before
 480         any system header files.
 481         * configure: Regenerate.
 482         * config.in: Regenerate.
 483         * sysdep.h: Generate an error if included before config.h.
 484         * alpha-opc.c: Include sysdep.h before any other header file.
 485         * alpha-dis.c: Likewise.
 486         * avr-dis.c: Likewise.
 487         * cgen-opc.c: Likewise.
 488         * cr16-dis.c: Likewise.
 489         * cris-dis.c: Likewise.
 490         * crx-dis.c: Likewise.
 491         * d10v-dis.c: Likewise.
 492         * d10v-opc.c: Likewise.
 493         * d30v-dis.c: Likewise.
 494         * d30v-opc.c: Likewise.
 495         * h8500-dis.c: Likewise.
 496         * i370-dis.c: Likewise.
 497         * i370-opc.c: Likewise.
 498         * m10200-dis.c: Likewise.
 499         * m10300-dis.c: Likewise.
 500         * micromips-opc.c: Likewise.
 501         * mips-opc.c: Likewise.
 502         * mips61-opc.c: Likewise.
 503         * moxie-dis.c: Likewise.
 504         * or32-opc.c: Likewise.
 505         * pj-dis.c: Likewise.
 506         * ppc-dis.c: Likewise.
 507         * ppc-opc.c: Likewise.
 508         * s390-dis.c: Likewise.
 509         * sh-dis.c: Likewise.
 510         * sh64-dis.c: Likewise.
 511         * sparc-dis.c: Likewise.
 512         * sparc-opc.c: Likewise.
 513         * spu-dis.c: Likewise.
 514         * tic30-dis.c: Likewise.
 515         * tic54x-dis.c: Likewise.
 516         * tic80-dis.c: Likewise.
 517         * tic80-opc.c: Likewise.
 518         * tilegx-dis.c: Likewise.
 519         * tilepro-dis.c: Likewise.
 520         * v850-dis.c: Likewise.
 521         * v850-opc.c: Likewise.
 522         * vax-dis.c: Likewise.
 523         * w65-dis.c: Likewise.
 524         * xgate-dis.c: Likewise.
 525         * xtensa-dis.c: Likewise.
 526         * rl78-decode.opc: Likewise.
 527         * rl78-decode.c: Regenerate.
 528         * rx-decode.opc: Likewise.
 529         * rx-decode.c: Regenerate.
 530
 531 2012-05-17  Alan Modra  <amodra@gmail.com>
 532
 533         * ppc_dis.c: Don't include elf/ppc.h.
 534
 535 2012-05-16  Meador Inge  <meadori@codesourcery.com>
 536
 537         * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
 538         to PUSH/POP {reg}.
 539
 540 2012-05-15  James Murray <jsm@jsm-net.demon.co.uk>
 541             Stephane Carrez <stcarrez@nerim.fr>
 542
 543         * configure.in: Add S12X and XGATE co-processor support to m68hc11
 544         target.
 545         * disassemble.c: Likewise.
 546         * configure: Regenerate.
 547         * m68hc11-dis.c: Make objdump output more consistent, use hex
 548         instead of decimal and use 0x prefix for hex.
 549         * m68hc11-opc.c: Add S12X and XGATE opcodes.
 550
 551 2012-05-14  James Lemke  <jwlemke@codesourcery.com>
 552
 553         * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
 554         (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
 555         (vle_opcd_indices): New array.
 556         (lookup_vle): New function.
 557         (disassemble_init_powerpc): Revise for second (VLE) opcode table.
 558         (print_insn_powerpc): Likewise.
 559         * ppc-opc.c: Likewise.
 560
 561 2012-05-14  Catherine Moore  <clm@codesourcery.com>
 562             Maciej W. Rozycki  <macro@codesourcery.com>
 563             Rhonda Wittels  <rhonda@codesourcery.com>
 564             Nathan Froyd <froydnj@codesourcery.com>
 565
 566         * ppc-opc.c (insert_arx, extract_arx): New functions.
 567         (insert_ary, extract_ary): New functions.
 568         (insert_li20, extract_li20): New functions.
 569         (insert_rx, extract_rx): New functions.
 570         (insert_ry, extract_ry): New functions.
 571         (insert_sci8, extract_sci8): New functions.
 572         (insert_sci8n, extract_sci8n): New functions.
 573         (insert_sd4h, extract_sd4h): New functions.
 574         (insert_sd4w, extract_sd4w): New functions.
 575         (insert_vlesi, extract_vlesi): New functions.
 576         (insert_vlensi, extract_vlensi): New functions.
 577         (insert_vleui, extract_vleui): New functions.
 578         (insert_vleil, extract_vleil): New functions.
 579         (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
 580         (BI16, BI32, BO32, B8): New.
 581         (B15, B24, CRD32, CRS): New.
 582         (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
 583         (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
 584         (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
 585         (SH6_MASK): Use PPC_OPSHIFT_INV.
 586         (SI8, UI5, OIMM5, UI7, BO16): New.
 587         (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
 588         (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
 589         (ALLOW8_SPRG): New.
 590         (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
 591         (OPVUP, OPVUP_MASK OPVUP): New
 592         (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
 593         (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
 594         (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
 595         (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
 596         (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
 597         (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
 598         (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
 599         (SE_IM5, SE_IM5_MASK): New.
 600         (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
 601         (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
 602         (BO32DNZ, BO32DZ): New.
 603         (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
 604         (PPCVLE): New.
 605         (powerpc_opcodes): Add new VLE instructions.  Update existing
 606         instruction to include PPCVLE if supported.
 607         * ppc-dis.c (ppc_opts): Add vle entry.
 608         (get_powerpc_dialect): New function.
 609         (powerpc_init_dialect): VLE support.
 610         (print_insn_big_powerpc): Call get_powerpc_dialect.
 611         (print_insn_little_powerpc): Likewise.
 612         (operand_value_powerpc): Handle negative shift counts.
 613         (print_insn_powerpc): Handle 2-byte instruction lengths.
 614
 615 2012-05-11  Daniel Richard G.  <skunk@iskunk.org>
 616
 617         PR binutils/14028
 618         * configure.in: Invoke ACX_HEADER_STRING.
 619         * configure: Regenerate.
 620         * config.in: Regenerate.
 621         * sysdep.h: If STRINGS_WITH_STRING is defined then include both
 622         string.h and strings.h.
 623
 624 2012-05-11  Nick Clifton  <nickc@redhat.com>
 625
 626         PR binutils/14006
 627         * arm-dis.c (print_insn): Fix detection of instruction mode in
 628         files containing multiple executable sections.
 629
 630 2012-05-03  Sean Keys  <skeys@ipdatasys.com>
 631
 632         * Makefile.in, configure: regenerate
 633         * disassemble.c (disassembler): Recognize ARCH_XGATE.
 634         * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
 635         New functions.
 636         * configure.in: Recognize xgate.
 637         * xgate-dis.c, xgate-opc.c: New files for support of xgate
 638         * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
 639         and opcode generation for xgate.
 640
 641 2012-04-30  DJ Delorie  <dj@redhat.com>
 642
 643         * rx-decode.opc (MOV): Do not sign-extend immediates which are
 644         already the maximum bit size.
 645         * rx-decode.c: Regenerate.
 646
 647 2012-04-27  David S. Miller  <davem@davemloft.net>
 648
 649         * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
 650         * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
 651
 652         * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
 653         * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
 654
 655         * sparc-opc.c (CBCOND): New define.
 656         (CBCOND_XCC): Likewise.
 657         (cbcond): New helper macro.
 658         (sparc_opcodes): Add compare-and-branch instructions.
 659
 660         * sparc-dis.c (print_insn_sparc): Handle ')'.
 661         * sparc-opc.c (sparc_opcodes): Add crypto instructions.
 662
 663         * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
 664         into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
 665
 666 2012-04-12  David S. Miller  <davem@davemloft.net>
 667
 668         * sparc-dis.c (X_DISP10): Define.
 669         (print_insn_sparc): Handle '='.
 670
 671 2012-04-01  Mike Frysinger  <vapier@gentoo.org>
 672
 673         * bfin-dis.c (fmtconst): Replace decimal handling with a single
 674         sprintf call and the '*' field width.
 675
 676 2012-03-23  Maxim Kuvyrkov  <maxim@codesourcery.com>
 677
 678         * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
 679
 680 2012-03-16  Alan Modra  <amodra@gmail.com>
 681
 682         * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
 683         (powerpc_opcd_indices): Bump array size.
 684         (disassemble_init_powerpc): Set powerpc_opcd_indices entries
 685         corresponding to unused opcodes to following entry.
 686         (lookup_powerpc): New function, extracted and optimised from..
 687         (print_insn_powerpc): ..here.
 688
 689 2012-03-15  Alan Modra  <amodra@gmail.com>
 690             James Lemke  <jwlemke@codesourcery.com>
 691
 692         * disassemble.c (disassemble_init_for_target): Handle ppc init.
 693         * ppc-dis.c (private): New var.
 694         (powerpc_init_dialect): Don't return calloc failure, instead use
 695         private.
 696         (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
 697         (powerpc_opcd_indices): New array.
 698         (disassemble_init_powerpc): New function.
 699         (print_insn_big_powerpc): Don't init dialect here.
 700         (print_insn_little_powerpc): Likewise.
 701         (print_insn_powerpc): Start search using powerpc_opcd_indices.
 702
 703 2012-03-10  Edmar Wienskoski  <edmar@freescale.com>
 704
 705         * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
 706         * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
 707         (PPCVEC2, PPCTMR, E6500): New short names.
 708         (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
 709         mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
 710         lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
 711         lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
 712         lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
 713         optional operands on sync instruction for E6500 target.
 714
 715 2012-03-08  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 716
 717         * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
 718
 719 2012-02-27  Alan Modra  <amodra@gmail.com>
 720
 721         * mt-dis.c: Regenerate.
 722
 723 2012-02-27  Alan Modra  <amodra@gmail.com>
 724
 725         * v850-opc.c (extract_v8): Rearrange to make it obvious this
 726         is the inverse of corresponding insert function.
 727         (extract_d22, extract_u9, extract_r4): Likewise.
 728         (extract_d9): Correct sign extension.
 729         (extract_d16_15): Don't assume "long" is 32 bits, and don't
 730         rely on implementation defined behaviour for shift right of
 731         signed types.
 732         (extract_d16_16, extract_d17_16, extract_i9): Likewise.
 733         (extract_d23): Likewise, and correct mask.
 734
 735 2012-02-27  Alan Modra  <amodra@gmail.com>
 736
 737         * crx-dis.c (print_arg): Mask constant to 32 bits.
 738         * crx-opc.c (cst4_map): Use int array.
 739
 740 2012-02-27  Alan Modra  <amodra@gmail.com>
 741
 742         * arc-dis.c (BITS): Don't use shifts to mask off bits.
 743         (FIELDD): Sign extend with xor,sub.
 744
 745 2012-02-25  Walter Lee  <walt@tilera.com>
 746
 747         * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
 748         * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
 749         TILEPRO_OPC_LW_TLS_SN.
 750
 751 2012-02-21  H.J. Lu  <hongjiu.lu@intel.com>
 752
 753         * i386-opc.h (HLEPrefixNone): New.
 754         (HLEPrefixLock): Likewise.
 755         (HLEPrefixAny): Likewise.
 756         (HLEPrefixRelease): Likewise.
 757
 758 2012-02-08  H.J. Lu  <hongjiu.lu@intel.com>
 759
 760         * i386-dis.c (HLE_Fixup1): New.
 761         (HLE_Fixup2): Likewise.
 762         (HLE_Fixup3): Likewise.
 763         (Ebh1): Likewise.
 764         (Evh1): Likewise.
 765         (Ebh2): Likewise.
 766         (Evh2): Likewise.
 767         (Ebh3): Likewise.
 768         (Evh3): Likewise.
 769         (MOD_C6_REG_7): Likewise.
 770         (MOD_C7_REG_7): Likewise.
 771         (RM_C6_REG_7): Likewise.
 772         (RM_C7_REG_7): Likewise.
 773         (XACQUIRE_PREFIX): Likewise.
 774         (XRELEASE_PREFIX): Likewise.
 775         (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
 776         cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
 777         Ebh2/Evh2 on xchg.  Use Ebh3/Evh3 on mov.
 778         (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
 779         not, or, sbb, sub and xor.  Use Ebh3/Evh3 on mov.  Use
 780         MOD_C6_REG_7 and MOD_C7_REG_7.
 781         (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
 782         (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7.  Add xend and
 783         xtest.
 784         (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
 785         (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
 786
 787         * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
 788         CPU_RTM_FLAGS.
 789         (cpu_flags): Add CpuHLE and CpuRTM.
 790         (opcode_modifiers): Add HLEPrefixOk.
 791
 792         * i386-opc.h (CpuHLE): New.
 793         (CpuRTM): Likewise.
 794         (HLEPrefixOk): Likewise.
 795         (i386_cpu_flags): Add cpuhle and cpurtm.
 796         (i386_opcode_modifier): Add hleprefixok.
 797
 798         * i386-opc.tbl: Add HLEPrefixOk=3 to mov.  Add HLEPrefixOk to
 799         add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
 800         sbb, sub, xor and xadd.  Add HLEPrefixOk=2 to xchg with memory
 801         operand.  Add xacquire, xrelease, xabort, xbegin, xend and
 802         xtest.
 803         * i386-init.h: Regenerated.
 804         * i386-tbl.h: Likewise.
 805
 806 2012-01-24  DJ Delorie  <dj@redhat.com>
 807
 808         * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
 809         * rl78-decode.c: Regenerate.
 810
 811 2012-01-17  James Murray  <jsm@jsm-net.demon.co.uk>
 812
 813         PR binutils/10173
 814         * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
 815
 816 2012-01-17  Andreas Schwab  <schwab@linux-m68k.org>
 817
 818         * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
 819         register and move them after pmove with PSR/PCSR register.
 820
 821 2012-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 822
 823         * i386-dis.c (mod_table): Add vmfunc.
 824
 825         * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
 826         (cpu_flags): CpuVMFUNC.
 827
 828         * i386-opc.h (CpuVMFUNC): New.
 829         (i386_cpu_flags): Add cpuvmfunc.
 830
 831         * i386-opc.tbl: Add vmfunc.
 832         * i386-init.h: Regenerated.
 833         * i386-tbl.h: Likewise.
 834
 835 For older changes see ChangeLog-2011
 836 \f
 837 Local Variables:
 838 mode: change-log
 839 left-margin: 8
 840 fill-column: 74
 841 version-control: never
 842 End: