1 2005-07-18 Nick Clifton <nickc@redhat.com>
3 * configure.in: Restore alpha ordering to list of arches.
4 * configure: Regenerate.
5 * disassemble.c: Restore alpha ordering to list of arches.
7 2005-07-18 Nick Clifton <nickc@redhat.com>
9 * m32c-asm.c: Regenerate.
10 * m32c-desc.c: Regenerate.
11 * m32c-desc.h: Regenerate.
12 * m32c-dis.c: Regenerate.
13 * m32c-ibld.h: Regenerate.
14 * m32c-opc.c: Regenerate.
15 * m32c-opc.h: Regenerate.
17 2005-07-18 H.J. Lu <hongjiu.lu@intel.com>
19 * i386-dis.c (PNI_Fixup): Update comment.
20 (VMX_Fixup): Properly handle the suffix check.
22 2005-07-16 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
24 * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
27 2005-07-16 Alan Modra <amodra@bigpond.net.au>
29 * Makefile.am: Run "make dep-am".
30 (stamp-m32c): Fix cpu dependencies.
31 * Makefile.in: Regenerate.
32 * ip2k-dis.c: Regenerate.
34 2007-07-15 H.J. Lu <hongjiu.lu@intel.com>
36 * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
37 (VMX_Fixup): New. Fix up Intel VMX Instructions.
41 (dis386_twobyte): Updated entries 0x78 and 0x79.
42 (twobyte_has_modrm): Likewise.
43 (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
44 (OP_G): Handle m_mode.
46 2005-07-14 Jim Blandy <jimb@redhat.com>
48 Add support for the Renesas M32C and M16C.
49 * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
50 * m32c-desc.h, m32c-opc.h: New.
51 * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
52 (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
54 (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
55 m32c-ibld.lo, m32c-opc.lo.
56 (CLEANFILES): List stamp-m32c.
57 (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
58 (CGEN_CPUS): Add m32c.
59 (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
60 (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
61 (m32c_opc_h): New variable.
62 (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
63 (m32c-opc.lo): New rules.
64 * Makefile.in: Regenerated.
65 * configure.in: Add case for bfd_m32c_arch.
66 * configure: Regenerated.
67 * disassemble.c (ARCH_m32c): New.
68 [ARCH_m32c]: #include "m32c-desc.h".
69 (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
70 (disassemble_init_for_target) [ARCH_m32c]: Same.
72 * cgen-ops.h, cgen-types.h: New files.
73 * Makefile.am (HFILES): List them.
74 * Makefile.in: Regenerated.
76 2005-07-07 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
78 * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
79 d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
80 ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
81 m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
82 ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
83 v850-dis.c: Fix format bugs.
84 * ia64-gen.c (fail, warn): Add format attribute.
85 * or32-opc.c (debug): Likewise.
87 2005-07-07 Khem Raj <kraj@mvista.com>
89 * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
92 2005-07-06 Alan Modra <amodra@bigpond.net.au>
94 * Makefile.am (stamp-m32r): Fix path to cpu files.
95 (stamp-m32r, stamp-iq2000): Likewise.
96 * Makefile.in: Regenerate.
97 * m32r-asm.c: Regenerate.
98 * po/POTFILES.in: Remove arm-opc.h. Add ms1-asm.c, ms1-desc.c,
99 ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
101 2005-07-05 Nick Clifton <nickc@redhat.com>
103 * iq2000-asm.c: Regenerate.
104 * ms1-asm.c: Regenerate.
106 2005-07-05 Jan Beulich <jbeulich@novell.com>
108 * i386-dis.c (SVME_Fixup): New.
109 (grps): Use it for the lidt entry.
110 (PNI_Fixup): Call OP_M rather than OP_E.
111 (INVLPG_Fixup): Likewise.
113 2005-07-04 H.J. Lu <hongjiu.lu@intel.com>
115 * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
117 2005-07-01 Nick Clifton <nickc@redhat.com>
119 * a29k-dis.c: Update to ISO C90 style function declarations and
121 * alpha-opc.c: Likewise.
122 * arc-dis.c: Likewise.
123 * arc-opc.c: Likewise.
124 * avr-dis.c: Likewise.
125 * cgen-asm.in: Likewise.
126 * cgen-dis.in: Likewise.
127 * cgen-ibld.in: Likewise.
128 * cgen-opc.c: Likewise.
129 * cris-dis.c: Likewise.
130 * d10v-dis.c: Likewise.
131 * d30v-dis.c: Likewise.
132 * d30v-opc.c: Likewise.
133 * dis-buf.c: Likewise.
134 * dlx-dis.c: Likewise.
135 * h8300-dis.c: Likewise.
136 * h8500-dis.c: Likewise.
137 * hppa-dis.c: Likewise.
138 * i370-dis.c: Likewise.
139 * i370-opc.c: Likewise.
140 * m10200-dis.c: Likewise.
141 * m10300-dis.c: Likewise.
142 * m68k-dis.c: Likewise.
143 * m88k-dis.c: Likewise.
144 * mips-dis.c: Likewise.
145 * mmix-dis.c: Likewise.
146 * msp430-dis.c: Likewise.
147 * ns32k-dis.c: Likewise.
148 * or32-dis.c: Likewise.
149 * or32-opc.c: Likewise.
150 * pdp11-dis.c: Likewise.
151 * pj-dis.c: Likewise.
152 * s390-dis.c: Likewise.
153 * sh-dis.c: Likewise.
154 * sh64-dis.c: Likewise.
155 * sparc-dis.c: Likewise.
156 * sparc-opc.c: Likewise.
157 * sysdep.h: Likewise.
158 * tic30-dis.c: Likewise.
159 * tic4x-dis.c: Likewise.
160 * tic80-dis.c: Likewise.
161 * v850-dis.c: Likewise.
162 * v850-opc.c: Likewise.
163 * vax-dis.c: Likewise.
164 * w65-dis.c: Likewise.
165 * z8kgen.c: Likewise.
167 * fr30-*: Regenerate.
169 * ip2k-*: Regenerate.
170 * iq2000-*: Regenerate.
171 * m32r-*: Regenerate.
173 * openrisc-*: Regenerate.
174 * xstormy16-*: Regenerate.
176 2005-06-23 Ben Elliston <bje@gnu.org>
178 * m68k-dis.c: Use ISC C90.
179 * m68k-opc.c: Formatting fixes.
181 2005-06-16 David Ung <davidu@mips.com>
183 * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
184 instructions to the table; seb/seh/sew/zeb/zeh/zew.
186 2005-06-15 Dave Brolley <brolley@redhat.com>
188 Contribute Morpho ms1 on behalf of Red Hat
189 * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
190 ms1-opc.h: New files, Morpho ms1 target.
192 2004-05-14 Stan Cox <scox@redhat.com>
194 * disassemble.c (ARCH_ms1): Define.
195 (disassembler): Handle bfd_arch_ms1
197 2004-05-13 Michael Snyder <msnyder@redhat.com>
199 * Makefile.am, Makefile.in: Add ms1 target.
200 * configure.in: Ditto.
202 2005-06-08 Zack Weinberg <zack@codesourcery.com>
204 * arm-opc.h: Delete; fold contents into ...
205 * arm-dis.c: ... here. Move includes of internal COFF headers
206 next to includes of internal ELF headers.
207 (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
208 (struct arm_opcode): Rename struct opcode32. Make 'assembler' const.
209 (struct thumb_opcode): Rename struct opcode16. Make 'assembler' const.
210 (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
211 (iwmmxt_wwnames, iwmmxt_wwssnames):
213 (regnames): Remove iWMMXt coprocessor register sets.
214 (iwmmxt_regnames, iwmmxt_cregnames): New statics.
215 (get_arm_regnames): Adjust fourth argument to match above changes.
216 (set_iwmmxt_regnames): Delete.
217 (print_insn_arm): Constify 'c'. Use ISO syntax for function
218 pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames
219 and iwmmxt_cregnames, not set_iwmmxt_regnames.
220 (print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use
221 ISO syntax for function pointer calls.
223 2005-06-07 Zack Weinberg <zack@codesourcery.com>
225 * arm-dis.c: Split up the comments describing the format codes, so
226 that the ARM and 16-bit Thumb opcode tables each have comments
227 preceding them that describe all the codes, and only the codes,
228 valid in those tables. (32-bit Thumb table is already like this.)
229 Reorder the lists in all three comments to match the order in
230 which the codes are implemented.
231 Remove all forward declarations of static functions. Convert all
232 function definitions to ISO C format.
233 (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
235 (print_insn_thumb16): Remove unused case 'I'.
236 (print_insn): Update for changed calling convention of subroutines.
238 2005-05-25 Jan Beulich <jbeulich@novell.com>
240 * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
241 hex (but retain it being displayed as signed). Remove redundant
242 checks. Add handling of displacements for 16-bit addressing in Intel
245 2005-05-25 Jan Beulich <jbeulich@novell.com>
247 * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
248 (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
249 masking of 'rm' in 16-bit memory address handling.
251 2005-05-19 Anton Blanchard <anton@samba.org>
253 * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
254 (print_ppc_disassembler_options): Document it.
255 * ppc-opc.c (SVC_LEV): Define.
256 (LEV): Allow optional operand.
258 (powerpc_opcodes): Extend "sc". Adjust "svc" and "svcl". Add
259 "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
261 2005-05-19 Kelley Cook <kcook@gcc.gnu.org>
263 * Makefile.in: Regenerate.
265 2005-05-17 Zack Weinberg <zack@codesourcery.com>
267 * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
268 instructions. Adjust disassembly of some opcodes to match
270 (thumb32_opcodes): New table.
271 (print_insn_thumb): Rename print_insn_thumb16; don't handle
272 two-halfword branches here.
273 (print_insn_thumb32): New function.
274 (print_insn): Choose among print_insn_arm, print_insn_thumb16,
275 and print_insn_thumb32. Be consistent about order of
276 halfwords when printing 32-bit instructions.
278 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
281 * i386-dis.c (branch_v_mode): New.
282 (indirEv): Use branch_v_mode instead of v_mode.
283 (OP_E): Handle branch_v_mode.
285 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
287 * d10v-dis.c (dis_2_short): Support 64bit host.
289 2005-05-07 Nick Clifton <nickc@redhat.com>
291 * po/nl.po: Updated translation.
293 2005-05-07 Nick Clifton <nickc@redhat.com>
295 * Update the address and phone number of the FSF organization in
296 the GPL notices in the following files:
297 a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
298 arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
299 avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
300 cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
301 crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
302 d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
303 fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
304 fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
305 frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
306 h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
307 i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
308 ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
309 ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
310 ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
311 ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
312 iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
313 iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
314 m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
315 m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
316 m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
317 maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
318 mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
319 openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
320 openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
321 or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
322 pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
323 s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
324 sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
325 tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
326 v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
327 xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
328 xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
329 xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
331 2005-05-05 James E Wilson <wilson@specifixinc.com>
333 * ia64-opc.c: Include sysdep.h before libiberty.h.
335 2005-05-05 Nick Clifton <nickc@redhat.com>
337 * configure.in (ALL_LINGUAS): Add vi.
338 * configure: Regenerate.
341 2005-04-26 Jerome Guitton <guitton@gnat.com>
343 * configure.in: Fix the check for basename declaration.
344 * configure: Regenerate.
346 2005-04-19 Alan Modra <amodra@bigpond.net.au>
348 * ppc-opc.c (RTO): Define.
349 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
350 entries to suit PPC440.
352 2005-04-18 Mark Kettenis <kettenis@gnu.org>
354 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
357 2005-04-14 Nick Clifton <nickc@redhat.com>
359 * po/fi.po: New translation: Finnish.
360 * configure.in (ALL_LINGUAS): Add fi.
361 * configure: Regenerate.
363 2005-04-14 Alan Modra <amodra@bigpond.net.au>
365 * Makefile.am (NO_WERROR): Define.
366 * configure.in: Invoke AM_BINUTILS_WARNINGS.
367 * Makefile.in: Regenerate.
368 * aclocal.m4: Regenerate.
369 * configure: Regenerate.
371 2005-04-04 Nick Clifton <nickc@redhat.com>
373 * fr30-asm.c: Regenerate.
374 * frv-asm.c: Regenerate.
375 * iq2000-asm.c: Regenerate.
376 * m32r-asm.c: Regenerate.
377 * openrisc-asm.c: Regenerate.
379 2005-04-01 Jan Beulich <jbeulich@novell.com>
381 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
382 visible operands in Intel mode. The first operand of monitor is
385 2005-04-01 Jan Beulich <jbeulich@novell.com>
387 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
388 easier future additions.
390 2005-03-31 Jerome Guitton <guitton@gnat.com>
392 * configure.in: Check for basename.
393 * configure: Regenerate.
396 2005-03-29 H.J. Lu <hongjiu.lu@intel.com>
398 * i386-dis.c (SEG_Fixup): New.
400 (dis386): Use "Sv" for 0x8c and 0x8e.
402 2005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
403 Nick Clifton <nickc@redhat.com>
405 * vax-dis.c: (entry_addr): New varible: An array of user supplied
406 function entry mask addresses.
407 (entry_addr_occupied_slots): New variable: The number of occupied
408 elements in entry_addr.
409 (entry_addr_total_slots): New variable: The total number of
410 elements in entry_addr.
411 (parse_disassembler_options): New function. Fills in the entry_addr
413 (free_entry_array): New function. Release the memory used by the
414 entry addr array. Suppressed because there is no way to call it.
415 (is_function_entry): Check if a given address is a function's
416 start address by looking at supplied entry mask addresses and
417 symbol information, if available.
418 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
420 2005-03-23 H.J. Lu <hongjiu.lu@intel.com>
422 * cris-dis.c (print_with_operands): Use ~31L for long instead
425 2005-03-20 H.J. Lu <hongjiu.lu@intel.com>
427 * mmix-opc.c (O): Revert the last change.
430 2005-03-19 H.J. Lu <hongjiu.lu@intel.com>
432 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
435 2005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
437 * mmix-opc.c (O, Z): Force expression as unsigned long.
439 2005-03-18 Nick Clifton <nickc@redhat.com>
441 * ip2k-asm.c: Regenerate.
442 * op/opcodes.pot: Regenerate.
444 2005-03-16 Nick Clifton <nickc@redhat.com>
445 Ben Elliston <bje@au.ibm.com>
447 * configure.in (werror): New switch: Add -Werror to the
448 compiler command line. Enabled by default. Disable via
450 * configure: Regenerate.
452 2005-03-16 Alan Modra <amodra@bigpond.net.au>
454 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
457 2005-03-15 Alan Modra <amodra@bigpond.net.au>
459 * po/es.po: Commit new Spanish translation.
461 * po/fr.po: Commit new French translation.
463 2005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
465 * vax-dis.c: Fix spelling error
466 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
467 of just "Entry mask: < r1 ... >"
469 2005-03-12 Zack Weinberg <zack@codesourcery.com>
471 * arm-dis.c (arm_opcodes): Document %E and %V.
472 Add entries for v6T2 ARM instructions:
473 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
474 (print_insn_arm): Add support for %E and %V.
475 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
477 2005-03-10 Jeff Baker <jbaker@qnx.com>
478 Alan Modra <amodra@bigpond.net.au>
480 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
481 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
483 (XSPRG_MASK): Mask off extra bits now part of sprg field.
484 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
485 mfsprg4..7 after msprg and consolidate.
487 2005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
489 * vax-dis.c (entry_mask_bit): New array.
490 (print_insn_vax): Decode function entry mask.
492 2005-03-07 Aldy Hernandez <aldyh@redhat.com>
494 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
496 2005-03-05 Alan Modra <amodra@bigpond.net.au>
498 * po/opcodes.pot: Regenerate.
500 2005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
502 * arc-dis.c (a4_decoding_class): New enum.
503 (dsmOneArcInst): Use the enum values for the decoding class.
504 Remove redundant case in the switch for decodingClass value 11.
506 2005-03-02 Jan Beulich <jbeulich@novell.com>
508 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
510 (OP_C): Consider lock prefix in non-64-bit modes.
512 2005-02-24 Alan Modra <amodra@bigpond.net.au>
514 * cris-dis.c (format_hex): Remove ineffective warning fix.
515 * crx-dis.c (make_instruction): Warning fix.
516 * frv-asm.c: Regenerate.
518 2005-02-23 Nick Clifton <nickc@redhat.com>
520 * cgen-dis.in: Use bfd_byte for buffers that are passed to
523 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
525 * crx-dis.c (make_instruction): Move argument structure into inner
526 scope and ensure that all of its fields are initialised before
529 * fr30-asm.c: Regenerate.
530 * fr30-dis.c: Regenerate.
531 * frv-asm.c: Regenerate.
532 * frv-dis.c: Regenerate.
533 * ip2k-asm.c: Regenerate.
534 * ip2k-dis.c: Regenerate.
535 * iq2000-asm.c: Regenerate.
536 * iq2000-dis.c: Regenerate.
537 * m32r-asm.c: Regenerate.
538 * m32r-dis.c: Regenerate.
539 * openrisc-asm.c: Regenerate.
540 * openrisc-dis.c: Regenerate.
541 * xstormy16-asm.c: Regenerate.
542 * xstormy16-dis.c: Regenerate.
544 2005-02-22 Alan Modra <amodra@bigpond.net.au>
546 * arc-ext.c: Warning fixes.
547 * arc-ext.h: Likewise.
548 * cgen-opc.c: Likewise.
549 * ia64-gen.c: Likewise.
550 * maxq-dis.c: Likewise.
551 * ns32k-dis.c: Likewise.
552 * w65-dis.c: Likewise.
553 * ia64-asmtab.c: Regenerate.
555 2005-02-22 Alan Modra <amodra@bigpond.net.au>
557 * fr30-desc.c: Regenerate.
558 * fr30-desc.h: Regenerate.
559 * fr30-opc.c: Regenerate.
560 * fr30-opc.h: Regenerate.
561 * frv-desc.c: Regenerate.
562 * frv-desc.h: Regenerate.
563 * frv-opc.c: Regenerate.
564 * frv-opc.h: Regenerate.
565 * ip2k-desc.c: Regenerate.
566 * ip2k-desc.h: Regenerate.
567 * ip2k-opc.c: Regenerate.
568 * ip2k-opc.h: Regenerate.
569 * iq2000-desc.c: Regenerate.
570 * iq2000-desc.h: Regenerate.
571 * iq2000-opc.c: Regenerate.
572 * iq2000-opc.h: Regenerate.
573 * m32r-desc.c: Regenerate.
574 * m32r-desc.h: Regenerate.
575 * m32r-opc.c: Regenerate.
576 * m32r-opc.h: Regenerate.
577 * m32r-opinst.c: Regenerate.
578 * openrisc-desc.c: Regenerate.
579 * openrisc-desc.h: Regenerate.
580 * openrisc-opc.c: Regenerate.
581 * openrisc-opc.h: Regenerate.
582 * xstormy16-desc.c: Regenerate.
583 * xstormy16-desc.h: Regenerate.
584 * xstormy16-opc.c: Regenerate.
585 * xstormy16-opc.h: Regenerate.
587 2005-02-21 Alan Modra <amodra@bigpond.net.au>
589 * Makefile.am: Run "make dep-am"
590 * Makefile.in: Regenerate.
592 2005-02-15 Nick Clifton <nickc@redhat.com>
594 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
595 compile time warnings.
596 (print_keyword): Likewise.
597 (default_print_insn): Likewise.
599 * fr30-desc.c: Regenerated.
600 * fr30-desc.h: Regenerated.
601 * fr30-dis.c: Regenerated.
602 * fr30-opc.c: Regenerated.
603 * fr30-opc.h: Regenerated.
604 * frv-desc.c: Regenerated.
605 * frv-dis.c: Regenerated.
606 * frv-opc.c: Regenerated.
607 * ip2k-asm.c: Regenerated.
608 * ip2k-desc.c: Regenerated.
609 * ip2k-desc.h: Regenerated.
610 * ip2k-dis.c: Regenerated.
611 * ip2k-opc.c: Regenerated.
612 * ip2k-opc.h: Regenerated.
613 * iq2000-desc.c: Regenerated.
614 * iq2000-dis.c: Regenerated.
615 * iq2000-opc.c: Regenerated.
616 * m32r-asm.c: Regenerated.
617 * m32r-desc.c: Regenerated.
618 * m32r-desc.h: Regenerated.
619 * m32r-dis.c: Regenerated.
620 * m32r-opc.c: Regenerated.
621 * m32r-opc.h: Regenerated.
622 * m32r-opinst.c: Regenerated.
623 * openrisc-desc.c: Regenerated.
624 * openrisc-desc.h: Regenerated.
625 * openrisc-dis.c: Regenerated.
626 * openrisc-opc.c: Regenerated.
627 * openrisc-opc.h: Regenerated.
628 * xstormy16-desc.c: Regenerated.
629 * xstormy16-desc.h: Regenerated.
630 * xstormy16-dis.c: Regenerated.
631 * xstormy16-opc.c: Regenerated.
632 * xstormy16-opc.h: Regenerated.
634 2005-02-14 H.J. Lu <hongjiu.lu@intel.com>
636 * dis-buf.c (perror_memory): Use sprintf_vma to print out
639 2005-02-11 Nick Clifton <nickc@redhat.com>
641 * iq2000-asm.c: Regenerate.
643 * frv-dis.c: Regenerate.
645 2005-02-07 Jim Blandy <jimb@redhat.com>
647 * Makefile.am (CGEN): Load guile.scm before calling the main
649 * Makefile.in: Regenerated.
650 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
651 Simply pass the cgen-opc.scm path to ${cgen} as its first
652 argument; ${cgen} itself now contains the '-s', or whatever is
653 appropriate for the Scheme being used.
655 2005-01-31 Andrew Cagney <cagney@gnu.org>
657 * configure: Regenerate to track ../gettext.m4.
659 2005-01-31 Jan Beulich <jbeulich@novell.com>
661 * ia64-gen.c (NELEMS): Define.
662 (shrink): Generate alias with missing second predicate register when
663 opcode has two outputs and these are both predicates.
664 * ia64-opc-i.c (FULL17): Define.
665 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
666 here to generate output template.
667 (TBITCM, TNATCM): Undefine after use.
668 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
669 first input. Add ld16 aliases without ar.csd as second output. Add
670 st16 aliases without ar.csd as second input. Add cmpxchg aliases
671 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
672 ar.ccv as third/fourth inputs. Consolidate through...
673 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
674 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
675 * ia64-asmtab.c: Regenerate.
677 2005-01-27 Andrew Cagney <cagney@gnu.org>
679 * configure: Regenerate to track ../gettext.m4 change.
681 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
683 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
684 * frv-asm.c: Rebuilt.
685 * frv-desc.c: Rebuilt.
686 * frv-desc.h: Rebuilt.
687 * frv-dis.c: Rebuilt.
688 * frv-ibld.c: Rebuilt.
689 * frv-opc.c: Rebuilt.
690 * frv-opc.h: Rebuilt.
692 2005-01-24 Andrew Cagney <cagney@gnu.org>
694 * configure: Regenerate, ../gettext.m4 was updated.
696 2005-01-21 Fred Fish <fnf@specifixinc.com>
698 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
699 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
700 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
703 2005-01-20 Alan Modra <amodra@bigpond.net.au>
705 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
707 2005-01-19 Fred Fish <fnf@specifixinc.com>
709 * mips-dis.c (no_aliases): New disassembly option flag.
710 (set_default_mips_dis_options): Init no_aliases to zero.
711 (parse_mips_dis_option): Handle no-aliases option.
712 (print_insn_mips): Ignore table entries that are aliases
713 if no_aliases is set.
714 (print_insn_mips16): Ditto.
715 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
716 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
717 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
718 * mips16-opc.c (mips16_opcodes): Ditto.
720 2005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
722 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
723 (inheritance diagram): Add missing edge.
724 (arch_sh1_up): Rename arch_sh_up to match external name to make life
725 easier for the testsuite.
726 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
727 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
728 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
729 arch_sh2a_or_sh4_up child.
730 (sh_table): Do renaming as above.
731 Correct comment for ldc.l for gas testsuite to read.
732 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
733 Correct comments for movy.w and movy.l for gas testsuite to read.
734 Correct comments for fmov.d and fmov.s for gas testsuite to read.
736 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
738 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
740 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
742 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
744 2005-01-10 Andreas Schwab <schwab@suse.de>
746 * disassemble.c (disassemble_init_for_target) <case
747 bfd_arch_ia64>: Set skip_zeroes to 16.
748 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
750 2004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
752 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
754 2004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
756 * avr-dis.c: Prettyprint. Added printing of symbol names in all
757 memory references. Convert avr_operand() to C90 formatting.
759 2004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
761 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
763 2004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
765 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
766 (no_op_insn): Initialize array with instructions that have no
768 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
770 2004-11-29 Richard Earnshaw <rearnsha@arm.com>
772 * arm-dis.c: Correct top-level comment.
774 2004-11-27 Richard Earnshaw <rearnsha@arm.com>
776 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
777 architecuture defining the insn.
778 (arm_opcodes, thumb_opcodes): Delete. Move to ...
779 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
781 Also include opcode/arm.h.
782 * Makefile.am (arm-dis.lo): Update dependency list.
783 * Makefile.in: Regenerate.
785 2004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
787 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
788 reflect the change to the short immediate syntax.
790 2004-11-19 Alan Modra <amodra@bigpond.net.au>
792 * or32-opc.c (debug): Warning fix.
793 * po/POTFILES.in: Regenerate.
795 * maxq-dis.c: Formatting.
796 (print_insn): Warning fix.
798 2004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
800 * arm-dis.c (WORD_ADDRESS): Define.
801 (print_insn): Use it. Correct big-endian end-of-section handling.
803 2004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
804 Vineet Sharma <vineets@noida.hcltech.com>
806 * maxq-dis.c: New file.
807 * disassemble.c (ARCH_maxq): Define.
808 (disassembler): Add 'print_insn_maxq_little' for handling maxq
810 * configure.in: Add case for bfd_maxq_arch.
811 * configure: Regenerate.
812 * Makefile.am: Add support for maxq-dis.c
813 * Makefile.in: Regenerate.
814 * aclocal.m4: Regenerate.
816 2004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
818 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
820 * crx-dis.c: Likewise.
822 2004-11-04 Hans-Peter Nilsson <hp@axis.com>
824 Generally, handle CRISv32.
825 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
826 (struct cris_disasm_data): New type.
827 (format_reg, format_hex, cris_constraint, print_flags)
828 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
830 (format_sup_reg, print_insn_crisv32_with_register_prefix)
831 (print_insn_crisv32_without_register_prefix)
832 (print_insn_crisv10_v32_with_register_prefix)
833 (print_insn_crisv10_v32_without_register_prefix)
834 (cris_parse_disassembler_options): New functions.
835 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
836 parameter. All callers changed.
837 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
839 (cris_constraint) <case 'Y', 'U'>: New cases.
840 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
842 (print_with_operands) <case 'Y'>: New case.
843 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
844 <case 'N', 'Y', 'Q'>: New cases.
845 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
846 (print_insn_cris_with_register_prefix)
847 (print_insn_cris_without_register_prefix): Call
848 cris_parse_disassembler_options.
849 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
850 for CRISv32 and the size of immediate operands. New v32-only
851 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
852 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
853 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
854 Change brp to be v3..v10.
855 (cris_support_regs): New vector.
856 (cris_opcodes): Update head comment. New format characters '[',
857 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
858 Add new opcodes for v32 and adjust existing opcodes to accommodate
859 differences to earlier variants.
860 (cris_cond15s): New vector.
862 2004-11-04 Jan Beulich <jbeulich@novell.com>
864 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
866 (Mp): Use f_mode rather than none at all.
867 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
868 replaces what previously was x_mode; x_mode now means 128-bit SSE
870 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
871 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
872 pinsrw's second operand is Edqw.
873 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
874 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
875 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
876 mode when an operand size override is present or always suffixing.
877 More instructions will need to be added to this group.
878 (putop): Handle new macro chars 'C' (short/long suffix selector),
879 'I' (Intel mode override for following macro char), and 'J' (for
880 adding the 'l' prefix to far branches in AT&T mode). When an
881 alternative was specified in the template, honor macro character when
882 specified for Intel mode.
883 (OP_E): Handle new *_mode values. Correct pointer specifications for
884 memory operands. Consolidate output of index register.
885 (OP_G): Handle new *_mode values.
886 (OP_I): Handle const_1_mode.
887 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
888 respective opcode prefix bits have been consumed.
889 (OP_EM, OP_EX): Provide some default handling for generating pointer
892 2004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
894 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
897 2004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
899 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
900 (getregliststring): Support HI/LO and user registers.
901 * crx-opc.c (crx_instruction): Update data structure according to the
902 rearrangement done in CRX opcode header file.
903 (crx_regtab): Likewise.
904 (crx_optab): Likewise.
905 (crx_instruction): Reorder load/stor instructions, remove unsupported
907 support new Co-Processor instruction 'cpi'.
909 2004-10-27 Nick Clifton <nickc@redhat.com>
911 * opcodes/iq2000-asm.c: Regenerate.
912 * opcodes/iq2000-desc.c: Regenerate.
913 * opcodes/iq2000-desc.h: Regenerate.
914 * opcodes/iq2000-dis.c: Regenerate.
915 * opcodes/iq2000-ibld.c: Regenerate.
916 * opcodes/iq2000-opc.c: Regenerate.
917 * opcodes/iq2000-opc.h: Regenerate.
919 2004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
921 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
922 us4, us5 (respectively).
923 Remove unsupported 'popa' instruction.
924 Reverse operands order in store co-processor instructions.
926 2004-10-15 Alan Modra <amodra@bigpond.net.au>
928 * Makefile.am: Run "make dep-am"
929 * Makefile.in: Regenerate.
931 2004-10-12 Bob Wilson <bob.wilson@acm.org>
933 * xtensa-dis.c: Use ISO C90 formatting.
935 2004-10-09 Alan Modra <amodra@bigpond.net.au>
937 * ppc-opc.c: Revert 2004-09-09 change.
939 2004-10-07 Bob Wilson <bob.wilson@acm.org>
941 * xtensa-dis.c (state_names): Delete.
942 (fetch_data): Use xtensa_isa_maxlength.
943 (print_xtensa_operand): Replace operand parameter with opcode/operand
944 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
945 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
946 instruction bundles. Use xmalloc instead of malloc.
948 2004-10-07 David Gibson <david@gibson.dropbear.id.au>
950 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
953 2004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
955 * crx-opc.c (crx_instruction): Support Co-processor insns.
956 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
957 (getregliststring): Change function to use the above enum.
958 (print_arg): Handle CO-Processor insns.
959 (crx_cinvs): Add 'b' option to invalidate the branch-target
962 2004-10-06 Aldy Hernandez <aldyh@redhat.com>
964 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
965 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
966 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
967 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
968 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
970 2004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
972 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
975 2004-09-30 Paul Brook <paul@codesourcery.com>
977 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
978 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
980 2004-09-17 H.J. Lu <hongjiu.lu@intel.com>
982 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
983 (CONFIG_STATUS_DEPENDENCIES): New.
985 (config.status): Likewise.
986 * Makefile.in: Regenerated.
988 2004-09-17 Alan Modra <amodra@bigpond.net.au>
990 * Makefile.am: Run "make dep-am".
991 * Makefile.in: Regenerate.
992 * aclocal.m4: Regenerate.
993 * configure: Regenerate.
994 * po/POTFILES.in: Regenerate.
995 * po/opcodes.pot: Regenerate.
997 2004-09-11 Andreas Schwab <schwab@suse.de>
999 * configure: Rebuild.
1001 2004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
1003 * ppc-opc.c (L): Make this field not optional.
1005 2004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
1007 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1008 Fix parameter to 'm[t|f]csr' insns.
1010 2004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
1012 * configure.in: Autoupdate to autoconf 2.59.
1013 * aclocal.m4: Rebuild with aclocal 1.4p6.
1014 * configure: Rebuild with autoconf 2.59.
1015 * Makefile.in: Rebuild with automake 1.4p6 (picking up
1016 bfd changes for autoconf 2.59 on the way).
1017 * config.in: Rebuild with autoheader 2.59.
1019 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
1021 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1023 2004-07-30 Michal Ludvig <mludvig@suse.cz>
1025 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1026 (GRPPADLCK2): New define.
1027 (twobyte_has_modrm): True for 0xA6.
1028 (grps): GRPPADLCK2 for opcode 0xA6.
1030 2004-07-29 Alexandre Oliva <aoliva@redhat.com>
1032 Introduce SH2a support.
1033 * sh-opc.h (arch_sh2a_base): Renumber.
1034 (arch_sh2a_nofpu_base): Remove.
1035 (arch_sh_base_mask): Adjust.
1036 (arch_opann_mask): New.
1037 (arch_sh2a, arch_sh2a_nofpu): Adjust.
1038 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1039 (sh_table): Adjust whitespace.
1040 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
1041 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
1042 instruction list throughout.
1043 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
1044 of arch_sh2a in instruction list throughout.
1045 (arch_sh2e_up): Accomodate above changes.
1046 (arch_sh2_up): Ditto.
1047 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
1048 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1049 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
1050 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1051 * sh-opc.h (arch_sh2a_nofpu): New.
1052 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1053 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1055 2004-01-20 DJ Delorie <dj@redhat.com>
1056 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1057 2003-12-29 DJ Delorie <dj@redhat.com>
1058 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1059 sh_opcode_info, sh_table): Add sh2a support.
1060 (arch_op32): New, to tag 32-bit opcodes.
1061 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1062 2003-12-02 Michael Snyder <msnyder@redhat.com>
1063 * sh-opc.h (arch_sh2a): Add.
1064 * sh-dis.c (arch_sh2a): Handle.
1065 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1067 2004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
1069 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1071 2004-07-22 Nick Clifton <nickc@redhat.com>
1074 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1075 insns - this is done by objdump itself.
1076 * h8500-dis.c (print_insn_h8500): Likewise.
1078 2004-07-21 Jan Beulich <jbeulich@novell.com>
1080 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1081 regardless of address size prefix in effect.
1082 (ptr_reg): Size or address registers does not depend on rex64, but
1083 on the presence of an address size override.
1084 (OP_MMX): Use rex.x only for xmm registers.
1085 (OP_EM): Use rex.z only for xmm registers.
1087 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1089 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1090 move/branch operations to the bottom so that VR5400 multimedia
1091 instructions take precedence in disassembly.
1093 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1095 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1096 ISA-specific "break" encoding.
1098 2004-07-13 Elvis Chiang <elvisfb@gmail.com>
1100 * arm-opc.h: Fix typo in comment.
1102 2004-07-11 Andreas Schwab <schwab@suse.de>
1104 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1106 2004-07-09 Andreas Schwab <schwab@suse.de>
1108 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1110 2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
1112 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1113 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1114 (crx-dis.lo): New target.
1115 (crx-opc.lo): Likewise.
1116 * Makefile.in: Regenerate.
1117 * configure.in: Handle bfd_crx_arch.
1118 * configure: Regenerate.
1119 * crx-dis.c: New file.
1120 * crx-opc.c: New file.
1121 * disassemble.c (ARCH_crx): Define.
1122 (disassembler): Handle ARCH_crx.
1124 2004-06-29 James E Wilson <wilson@specifixinc.com>
1126 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1127 * ia64-asmtab.c: Regnerate.
1129 2004-06-28 Alan Modra <amodra@bigpond.net.au>
1131 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1132 (extract_fxm): Don't test dialect.
1133 (XFXFXM_MASK): Include the power4 bit.
1134 (XFXM): Add p4 param.
1135 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
1137 2004-06-27 Alexandre Oliva <aoliva@redhat.com>
1139 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
1140 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1142 2004-06-26 Alan Modra <amodra@bigpond.net.au>
1144 * ppc-opc.c (BH, XLBH_MASK): Define.
1145 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1147 2004-06-24 Alan Modra <amodra@bigpond.net.au>
1149 * i386-dis.c (x_mode): Comment.
1150 (two_source_ops): File scope.
1151 (float_mem): Correct fisttpll and fistpll.
1152 (float_mem_mode): New table.
1154 (OP_E): Correct intel mode PTR output.
1155 (ptr_reg): Use open_char and close_char.
1156 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
1157 operands. Set two_source_ops.
1159 2004-06-15 Alan Modra <amodra@bigpond.net.au>
1161 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1162 instead of _raw_size.
1164 2004-06-08 Jakub Jelinek <jakub@redhat.com>
1166 * ia64-gen.c (in_iclass): Handle more postinc st
1168 * ia64-asmtab.c: Rebuilt.
1170 2004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
1172 * s390-opc.txt: Correct architecture mask for some opcodes.
1173 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1174 in the esa mode as well.
1176 2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
1178 * sh-dis.c (target_arch): Make unsigned.
1179 (print_insn_sh): Replace (most of) switch with a call to
1180 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1181 * sh-opc.h: Redefine architecture flags values.
1182 Add sh3-nommu architecture.
1183 Reorganise <arch>_up macros so they make more visual sense.
1184 (SH_MERGE_ARCH_SET): Define new macro.
1185 (SH_VALID_BASE_ARCH_SET): Likewise.
1186 (SH_VALID_MMU_ARCH_SET): Likewise.
1187 (SH_VALID_CO_ARCH_SET): Likewise.
1188 (SH_VALID_ARCH_SET): Likewise.
1189 (SH_MERGE_ARCH_SET_VALID): Likewise.
1190 (SH_ARCH_SET_HAS_FPU): Likewise.
1191 (SH_ARCH_SET_HAS_DSP): Likewise.
1192 (SH_ARCH_UNKNOWN_ARCH): Likewise.
1193 (sh_get_arch_from_bfd_mach): Add prototype.
1194 (sh_get_arch_up_from_bfd_mach): Likewise.
1195 (sh_get_bfd_mach_from_arch_set): Likewise.
1196 (sh_merge_bfd_arc): Likewise.
1198 2004-05-24 Peter Barada <peter@the-baradas.com>
1200 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1201 into new match_insn_m68k function. Loop over canidate
1202 matches and select first that completely matches.
1203 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1204 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1205 to verify addressing for MAC/EMAC.
1206 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1207 reigster halves since 'fpu' and 'spl' look misleading.
1208 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1209 * m68k-opc.c: Rearragne mac/emac cases to use longest for
1210 first, tighten up match masks.
1211 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
1212 'size' from special case code in print_insn_m68k to
1213 determine decode size of insns.
1215 2004-05-19 Alan Modra <amodra@bigpond.net.au>
1217 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1218 well as when -mpower4.
1220 2004-05-13 Nick Clifton <nickc@redhat.com>
1222 * po/fr.po: Updated French translation.
1224 2004-05-05 Peter Barada <peter@the-baradas.com>
1226 * m68k-dis.c(print_insn_m68k): Add new chips, use core
1227 variants in arch_mask. Only set m68881/68851 for 68k chips.
1228 * m68k-op.c: Switch from ColdFire chips to core variants.
1230 2004-05-05 Alan Modra <amodra@bigpond.net.au>
1233 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1235 2004-04-29 Ben Elliston <bje@au.ibm.com>
1237 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1238 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1240 2004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
1242 * sh-dis.c (print_insn_sh): Print the value in constant pool
1243 as a symbol if it looks like a symbol.
1245 2004-04-22 Peter Barada <peter@the-baradas.com>
1247 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1248 appropriate ColdFire architectures.
1249 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1251 Add EMAC instructions, fix MAC instructions. Remove
1252 macmw/macml/msacmw/msacml instructions since mask addressing now
1255 2004-04-20 Jakub Jelinek <jakub@redhat.com>
1257 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1258 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1259 suffix. Use fmov*x macros, create all 3 fpsize variants in one
1260 macro. Adjust all users.
1262 2004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
1264 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1267 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1269 * m32r-asm.c: Regenerate.
1271 2004-03-29 Stan Shebs <shebs@apple.com>
1273 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1276 2004-03-19 Alan Modra <amodra@bigpond.net.au>
1278 * aclocal.m4: Regenerate.
1279 * config.in: Regenerate.
1280 * configure: Regenerate.
1281 * po/POTFILES.in: Regenerate.
1282 * po/opcodes.pot: Regenerate.
1284 2004-03-16 Alan Modra <amodra@bigpond.net.au>
1286 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
1288 * ppc-opc.c (RA0): Define.
1289 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1290 (RAOPT): Rename from RAO. Update all uses.
1291 (powerpc_opcodes): Use RA0 as appropriate.
1293 2004-03-15 Aldy Hernandez <aldyh@redhat.com>
1295 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1297 2004-03-15 Alan Modra <amodra@bigpond.net.au>
1299 * sparc-dis.c (print_insn_sparc): Update getword prototype.
1301 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1303 * i386-dis.c (GRPPLOCK): Delete.
1304 (grps): Delete GRPPLOCK entry.
1306 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1308 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1310 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1311 (GRPPADLCK): Define.
1312 (dis386): Use NOP_Fixup on "nop".
1313 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1314 (twobyte_has_modrm): Set for 0xa7.
1315 (padlock_table): Delete. Move to..
1316 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
1318 (print_insn): Revert PADLOCK_SPECIAL code.
1319 (OP_E): Delete sfence, lfence, mfence checks.
1321 2004-03-12 Jakub Jelinek <jakub@redhat.com>
1323 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1324 (INVLPG_Fixup): New function.
1325 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1327 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1329 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1330 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1331 (padlock_table): New struct with PadLock instructions.
1332 (print_insn): Handle PADLOCK_SPECIAL.
1334 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1336 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1337 (OP_E): Twiddle clflush to sfence here.
1339 2004-03-08 Nick Clifton <nickc@redhat.com>
1341 * po/de.po: Updated German translation.
1343 2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
1345 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1346 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
1347 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1350 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1352 * frv-asm.c: Regenerate.
1353 * frv-desc.c: Regenerate.
1354 * frv-desc.h: Regenerate.
1355 * frv-dis.c: Regenerate.
1356 * frv-ibld.c: Regenerate.
1357 * frv-opc.c: Regenerate.
1358 * frv-opc.h: Regenerate.
1360 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1362 * frv-desc.c, frv-opc.c: Regenerate.
1364 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1366 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1368 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1370 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1371 Also correct mistake in the comment.
1373 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1375 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1376 ensure that double registers have even numbers.
1377 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1378 that reserved instruction 0xfffd does not decode the same
1380 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1381 REG_N refers to a double register.
1382 Add REG_N_B01 nibble type and use it instead of REG_NM
1384 Adjust the bit patterns in a few comments.
1386 2004-02-25 Aldy Hernandez <aldyh@redhat.com>
1388 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1390 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1392 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1394 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1396 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1398 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1400 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1401 mtivor32, mtivor33, mtivor34.
1403 2004-02-19 Aldy Hernandez <aldyh@redhat.com>
1405 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1407 2004-02-10 Petko Manolov <petkan@nucleusys.com>
1409 * arm-opc.h Maverick accumulator register opcode fixes.
1411 2004-02-13 Ben Elliston <bje@wasabisystems.com>
1413 * m32r-dis.c: Regenerate.
1415 2004-01-27 Michael Snyder <msnyder@redhat.com>
1417 * sh-opc.h (sh_table): "fsrra", not "fssra".
1419 2004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1421 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1424 2004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1426 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1428 2004-01-19 Alan Modra <amodra@bigpond.net.au>
1430 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1431 1. Don't print scale factor on AT&T mode when index missing.
1433 2004-01-16 Alexandre Oliva <aoliva@redhat.com>
1435 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1436 when loaded into XR registers.
1438 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
1440 * frv-desc.h: Regenerate.
1441 * frv-desc.c: Regenerate.
1442 * frv-opc.c: Regenerate.
1444 2004-01-13 Michael Snyder <msnyder@redhat.com>
1446 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1448 2004-01-09 Paul Brook <paul@codesourcery.com>
1450 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1453 2004-01-07 Daniel Jacobowitz <drow@mvista.com>
1455 * Makefile.am (libopcodes_la_DEPENDENCIES)
1456 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1457 comment about the problem.
1458 * Makefile.in: Regenerate.
1460 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
1462 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1463 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1464 cut&paste errors in shifting/truncating numerical operands.
1465 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1466 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1467 (parse_uslo16): Likewise.
1468 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1469 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1470 (parse_s12): Likewise.
1471 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1472 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1473 (parse_uslo16): Likewise.
1474 (parse_uhi16): Parse gothi and gotfuncdeschi.
1475 (parse_d12): Parse got12 and gotfuncdesc12.
1476 (parse_s12): Likewise.
1478 2004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1480 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1481 instruction which looks similar to an 'rla' instruction.
1483 For older changes see ChangeLog-0203
1489 version-control: never