opcodes/ChangeLog

   1 2005-09-02  Paul Brook  <paul@codesourcery.com>
   2
   3         * arm-dis.c (coprocessor_opcodes): New.
   4         (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
   5         (print_insn_coprocessor): New function.
   6         (print_insn_arm): Use print_insn_coprocessor.  Remove coprocessor
   7         format characters.
   8         (print_insn_thumb32): Use print_insn_coprocessor.
   9
  10 2005-08-30  Paul Brook  <paul@codesourcery.com>
  11
  12         * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
  13
  14 2005-08-26  Jan Beulich  <jbeulich@novell.com>
  15
  16         * i386-dis.c (intel_operand_size): New, broken out from OP_E for
  17         re-use.
  18         (OP_E): Call intel_operand_size, move call site out of mode
  19         dependent code.
  20         (OP_OFF): Call intel_operand_size if suffix_always. Remove
  21         ATTRIBUTE_UNUSED from parameters.
  22         (OP_OFF64): Likewise.
  23         (OP_ESreg): Call intel_operand_size.
  24         (OP_DSreg): Likewise.
  25         (OP_DIR): Use colon rather than semicolon as separator of far
  26         jump/call operands.
  27
  28 2005-08-25  Chao-ying Fu  <fu@mips.com>
  29
  30         * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
  31         (mips_builtin_opcodes): Add DSP instructions.
  32         * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
  33         mips64, mips64r2.
  34         (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
  35         operand formats.
  36
  37 2005-08-23  David Ung  <davidu@mips.com>
  38
  39         * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
  40         instructions to the table.
  41
  42 2005-08-18  Alan Modra  <amodra@bigpond.net.au>
  43
  44         * a29k-dis.c: Delete.
  45         * Makefile.am: Remove a29k support.
  46         * configure.in: Likewise.
  47         * disassemble.c: Likewise.
  48         * Makefile.in: Regenerate.
  49         * configure: Regenerate.
  50         * po/POTFILES.in: Regenerate.
  51
  52 2005-08-15  Daniel Jacobowitz  <dan@codesourcery.com>
  53
  54         * ppc-dis.c (powerpc_dialect): Handle e300.
  55         (print_ppc_disassembler_options): Likewise.
  56         * ppc-opc.c (PPCE300): Define.
  57         (powerpc_opcodes): Mark icbt as available for the e300.
  58
  59 2005-08-13  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
  60
  61         * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
  62         Use "rp" instead of "%r2" in "b,l" insns.
  63
  64 2005-08-12 Martin Schwidefsky  <schwidefsky@de.ibm.com>
  65
  66         * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
  67         * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
  68         (main): Likewise.
  69         * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
  70         and 4 bit optional masks.
  71         (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
  72         INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
  73         (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
  74         MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
  75         (s390_opformats): Likewise.
  76         * s390-opc.txt: Add new instructions for cpu type z9-109.
  77
  78 2005-08-05  John David Anglin  <dave.anglin@nrc-crnc.gc.ca>
  79
  80         * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
  81
  82 2005-07-29  Paul Brook  <paul@codesourcery.com>
  83
  84         * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
  85
  86 2005-07-29  Paul Brook  <paul@codesourcery.com>
  87
  88         * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
  89         (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
  90
  91 2005-07-25  DJ Delorie  <dj@redhat.com>
  92
  93         * m32c-asm.c Regenerate.
  94         * m32c-dis.c Regenerate.
  95
  96 2005-07-20  DJ Delorie  <dj@redhat.com>
  97
  98         * disassemble.c (disassemble_init_for_target): M32C ISAs are
  99         enums, so convert them to bit masks, which attributes are.
 100
 101 2005-07-18  Nick Clifton  <nickc@redhat.com>
 102
 103         * configure.in: Restore alpha ordering to list of arches.
 104         * configure: Regenerate.
 105         * disassemble.c: Restore alpha ordering to list of arches.
 106
 107 2005-07-18  Nick Clifton  <nickc@redhat.com>
 108
 109         * m32c-asm.c: Regenerate.
 110         * m32c-desc.c: Regenerate.
 111         * m32c-desc.h: Regenerate.
 112         * m32c-dis.c: Regenerate.
 113         * m32c-ibld.h: Regenerate.
 114         * m32c-opc.c: Regenerate.
 115         * m32c-opc.h: Regenerate.
 116
 117 2005-07-18  H.J. Lu  <hongjiu.lu@intel.com>
 118
 119         * i386-dis.c (PNI_Fixup): Update comment.
 120         (VMX_Fixup): Properly handle the suffix check.
 121
 122 2005-07-16  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
 123
 124         * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
 125         mfctl disassembly.
 126
 127 2005-07-16  Alan Modra  <amodra@bigpond.net.au>
 128
 129         * Makefile.am: Run "make dep-am".
 130         (stamp-m32c): Fix cpu dependencies.
 131         * Makefile.in: Regenerate.
 132         * ip2k-dis.c: Regenerate.
 133
 134 2007-07-15  H.J. Lu <hongjiu.lu@intel.com>
 135
 136         * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
 137         (VMX_Fixup): New. Fix up Intel VMX Instructions.
 138         (Em): New.
 139         (Gm): New.
 140         (VM): New.
 141         (dis386_twobyte): Updated entries 0x78 and 0x79.
 142         (twobyte_has_modrm): Likewise.
 143         (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
 144         (OP_G): Handle m_mode.
 145
 146 2005-07-14  Jim Blandy  <jimb@redhat.com>
 147
 148         Add support for the Renesas M32C and M16C.
 149         * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
 150         * m32c-desc.h, m32c-opc.h: New.
 151         * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
 152         (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
 153         m32c-opc.c.
 154         (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
 155         m32c-ibld.lo, m32c-opc.lo.
 156         (CLEANFILES): List stamp-m32c.
 157         (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
 158         (CGEN_CPUS): Add m32c.
 159         (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
 160         (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
 161         (m32c_opc_h): New variable.
 162         (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
 163         (m32c-opc.lo): New rules.
 164         * Makefile.in: Regenerated.
 165         * configure.in: Add case for bfd_m32c_arch.
 166         * configure: Regenerated.
 167         * disassemble.c (ARCH_m32c): New.
 168         [ARCH_m32c]: #include "m32c-desc.h".
 169         (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
 170         (disassemble_init_for_target) [ARCH_m32c]: Same.
 171
 172         * cgen-ops.h, cgen-types.h: New files.
 173         * Makefile.am (HFILES): List them.
 174         * Makefile.in: Regenerated.
 175
 176 2005-07-07  Kaveh R. Ghazi  <ghazi@caip.rutgers.edu>
 177
 178         * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
 179         d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
 180         ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
 181         m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
 182         ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
 183         v850-dis.c: Fix format bugs.
 184         * ia64-gen.c (fail, warn): Add format attribute.
 185         * or32-opc.c (debug): Likewise.
 186
 187 2005-07-07  Khem Raj  <kraj@mvista.com>
 188
 189         * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
 190         disassembly pattern.
 191
 192 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 193
 194         * Makefile.am (stamp-m32r): Fix path to cpu files.
 195         (stamp-m32r, stamp-iq2000): Likewise.
 196         * Makefile.in: Regenerate.
 197         * m32r-asm.c: Regenerate.
 198         * po/POTFILES.in: Remove arm-opc.h.  Add ms1-asm.c, ms1-desc.c,
 199         ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
 200
 201 2005-07-05  Nick Clifton  <nickc@redhat.com>
 202
 203         * iq2000-asm.c: Regenerate.
 204         * ms1-asm.c: Regenerate.
 205
 206 2005-07-05  Jan Beulich  <jbeulich@novell.com>
 207
 208         * i386-dis.c (SVME_Fixup): New.
 209         (grps): Use it for the lidt entry.
 210         (PNI_Fixup): Call OP_M rather than OP_E.
 211         (INVLPG_Fixup): Likewise.
 212
 213 2005-07-04  H.J. Lu  <hongjiu.lu@intel.com>
 214
 215         * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
 216
 217 2005-07-01  Nick Clifton  <nickc@redhat.com>
 218
 219         * a29k-dis.c: Update to ISO C90 style function declarations and
 220         fix formatting.
 221         * alpha-opc.c: Likewise.
 222         * arc-dis.c: Likewise.
 223         * arc-opc.c: Likewise.
 224         * avr-dis.c: Likewise.
 225         * cgen-asm.in: Likewise.
 226         * cgen-dis.in: Likewise.
 227         * cgen-ibld.in: Likewise.
 228         * cgen-opc.c: Likewise.
 229         * cris-dis.c: Likewise.
 230         * d10v-dis.c: Likewise.
 231         * d30v-dis.c: Likewise.
 232         * d30v-opc.c: Likewise.
 233         * dis-buf.c: Likewise.
 234         * dlx-dis.c: Likewise.
 235         * h8300-dis.c: Likewise.
 236         * h8500-dis.c: Likewise.
 237         * hppa-dis.c: Likewise.
 238         * i370-dis.c: Likewise.
 239         * i370-opc.c: Likewise.
 240         * m10200-dis.c: Likewise.
 241         * m10300-dis.c: Likewise.
 242         * m68k-dis.c: Likewise.
 243         * m88k-dis.c: Likewise.
 244         * mips-dis.c: Likewise.
 245         * mmix-dis.c: Likewise.
 246         * msp430-dis.c: Likewise.
 247         * ns32k-dis.c: Likewise.
 248         * or32-dis.c: Likewise.
 249         * or32-opc.c: Likewise.
 250         * pdp11-dis.c: Likewise.
 251         * pj-dis.c: Likewise.
 252         * s390-dis.c: Likewise.
 253         * sh-dis.c: Likewise.
 254         * sh64-dis.c: Likewise.
 255         * sparc-dis.c: Likewise.
 256         * sparc-opc.c: Likewise.
 257         * sysdep.h: Likewise.
 258         * tic30-dis.c: Likewise.
 259         * tic4x-dis.c: Likewise.
 260         * tic80-dis.c: Likewise.
 261         * v850-dis.c: Likewise.
 262         * v850-opc.c: Likewise.
 263         * vax-dis.c: Likewise.
 264         * w65-dis.c: Likewise.
 265         * z8kgen.c: Likewise.
 266
 267         * fr30-*: Regenerate.
 268         * frv-*: Regenerate.
 269         * ip2k-*: Regenerate.
 270         * iq2000-*: Regenerate.
 271         * m32r-*: Regenerate.
 272         * ms1-*: Regenerate.
 273         * openrisc-*: Regenerate.
 274         * xstormy16-*: Regenerate.
 275
 276 2005-06-23  Ben Elliston  <bje@gnu.org>
 277
 278         * m68k-dis.c: Use ISC C90.
 279         * m68k-opc.c: Formatting fixes.
 280
 281 2005-06-16  David Ung  <davidu@mips.com>
 282
 283         * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
 284         instructions to the table; seb/seh/sew/zeb/zeh/zew.
 285
 286 2005-06-15  Dave Brolley  <brolley@redhat.com>
 287
 288         Contribute Morpho ms1 on behalf of Red Hat
 289         * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
 290         ms1-opc.h: New files, Morpho ms1 target.
 291
 292         2004-05-14  Stan Cox  <scox@redhat.com>
 293
 294         * disassemble.c (ARCH_ms1): Define.
 295         (disassembler): Handle bfd_arch_ms1
 296
 297         2004-05-13  Michael Snyder  <msnyder@redhat.com>
 298
 299         * Makefile.am, Makefile.in: Add ms1 target.
 300         * configure.in: Ditto.
 301
 302 2005-06-08  Zack Weinberg  <zack@codesourcery.com>
 303
 304         * arm-opc.h: Delete; fold contents into ...
 305         * arm-dis.c: ... here.  Move includes of internal COFF headers
 306         next to includes of internal ELF headers.
 307         (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
 308         (struct arm_opcode): Rename struct opcode32.  Make 'assembler' const.
 309         (struct thumb_opcode): Rename struct opcode16.  Make 'assembler' const.
 310         (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
 311         (iwmmxt_wwnames, iwmmxt_wwssnames):
 312         Make const.
 313         (regnames): Remove iWMMXt coprocessor register sets.
 314         (iwmmxt_regnames, iwmmxt_cregnames): New statics.
 315         (get_arm_regnames): Adjust fourth argument to match above changes.
 316         (set_iwmmxt_regnames): Delete.
 317         (print_insn_arm): Constify 'c'.  Use ISO syntax for function
 318         pointer calls.  Expand sole use of BDISP.  Use iwmmxt_regnames
 319         and iwmmxt_cregnames, not set_iwmmxt_regnames.
 320         (print_insn_thumb16, print_insn_thumb32): Constify 'c'.  Use
 321         ISO syntax for function pointer calls.
 322
 323 2005-06-07  Zack Weinberg  <zack@codesourcery.com>
 324
 325         * arm-dis.c: Split up the comments describing the format codes, so
 326         that the ARM and 16-bit Thumb opcode tables each have comments
 327         preceding them that describe all the codes, and only the codes,
 328         valid in those tables.  (32-bit Thumb table is already like this.)
 329         Reorder the lists in all three comments to match the order in
 330         which the codes are implemented.
 331         Remove all forward declarations of static functions.  Convert all
 332         function definitions to ISO C format.
 333         (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
 334         Return nothing.
 335         (print_insn_thumb16): Remove unused case 'I'.
 336         (print_insn): Update for changed calling convention of subroutines.
 337
 338 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 339
 340         * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
 341         hex (but retain it being displayed as signed). Remove redundant
 342         checks. Add handling of displacements for 16-bit addressing in Intel
 343         mode.
 344
 345 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 346
 347         * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
 348         (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
 349         masking of 'rm' in 16-bit memory address handling.
 350
 351 2005-05-19  Anton Blanchard  <anton@samba.org>
 352
 353         * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
 354         (print_ppc_disassembler_options): Document it.
 355         * ppc-opc.c (SVC_LEV): Define.
 356         (LEV): Allow optional operand.
 357         (POWER5): Define.
 358         (powerpc_opcodes): Extend "sc".  Adjust "svc" and "svcl".  Add
 359         "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
 360
 361 2005-05-19  Kelley Cook  <kcook@gcc.gnu.org>
 362
 363         * Makefile.in:  Regenerate.
 364
 365 2005-05-17  Zack Weinberg  <zack@codesourcery.com>
 366
 367         * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
 368         instructions.  Adjust disassembly of some opcodes to match
 369         unified syntax.
 370         (thumb32_opcodes): New table.
 371         (print_insn_thumb): Rename print_insn_thumb16; don't handle
 372         two-halfword branches here.
 373         (print_insn_thumb32): New function.
 374         (print_insn): Choose among print_insn_arm, print_insn_thumb16,
 375         and print_insn_thumb32.  Be consistent about order of
 376         halfwords when printing 32-bit instructions.
 377
 378 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 379
 380         PR 843
 381         * i386-dis.c (branch_v_mode): New.
 382         (indirEv): Use branch_v_mode instead of v_mode.
 383         (OP_E): Handle branch_v_mode.
 384
 385 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 386
 387         * d10v-dis.c (dis_2_short): Support 64bit host.
 388
 389 2005-05-07  Nick Clifton  <nickc@redhat.com>
 390
 391         * po/nl.po: Updated translation.
 392
 393 2005-05-07  Nick Clifton  <nickc@redhat.com>
 394
 395         * Update the address and phone number of the FSF organization in
 396         the GPL notices in the following files:
 397         a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
 398         arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
 399         avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
 400         cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
 401         crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
 402         d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
 403         fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
 404         fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
 405         frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
 406         h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
 407         i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
 408         ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
 409         ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
 410         ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
 411         ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
 412         iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
 413         iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
 414         m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
 415         m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
 416         m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
 417         maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
 418         mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
 419         openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
 420         openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
 421         or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
 422         pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
 423         s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
 424         sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
 425         tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
 426         v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
 427         xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
 428         xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
 429         xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
 430
 431 2005-05-05  James E Wilson  <wilson@specifixinc.com>
 432
 433         * ia64-opc.c: Include sysdep.h before libiberty.h.
 434
 435 2005-05-05  Nick Clifton  <nickc@redhat.com>
 436
 437         * configure.in (ALL_LINGUAS): Add vi.
 438         * configure: Regenerate.
 439         * po/vi.po: New.
 440
 441 2005-04-26  Jerome Guitton  <guitton@gnat.com>
 442
 443         * configure.in: Fix the check for basename declaration.
 444         * configure: Regenerate.
 445
 446 2005-04-19  Alan Modra  <amodra@bigpond.net.au>
 447
 448         * ppc-opc.c (RTO): Define.
 449         (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
 450         entries to suit PPC440.
 451
 452 2005-04-18  Mark Kettenis  <kettenis@gnu.org>
 453
 454         * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
 455         Add xcrypt-ctr.
 456
 457 2005-04-14  Nick Clifton  <nickc@redhat.com>
 458
 459         * po/fi.po: New translation: Finnish.
 460         * configure.in (ALL_LINGUAS): Add fi.
 461         * configure: Regenerate.
 462
 463 2005-04-14  Alan Modra  <amodra@bigpond.net.au>
 464
 465         * Makefile.am (NO_WERROR): Define.
 466         * configure.in: Invoke AM_BINUTILS_WARNINGS.
 467         * Makefile.in: Regenerate.
 468         * aclocal.m4: Regenerate.
 469         * configure: Regenerate.
 470
 471 2005-04-04  Nick Clifton  <nickc@redhat.com>
 472
 473         * fr30-asm.c: Regenerate.
 474         * frv-asm.c: Regenerate.
 475         * iq2000-asm.c: Regenerate.
 476         * m32r-asm.c: Regenerate.
 477         * openrisc-asm.c: Regenerate.
 478
 479 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 480
 481         * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
 482         visible operands in Intel mode. The first operand of monitor is
 483         %rax in 64-bit mode.
 484
 485 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 486
 487         * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
 488         easier future additions.
 489
 490 2005-03-31  Jerome Guitton  <guitton@gnat.com>
 491
 492         * configure.in: Check for basename.
 493         * configure: Regenerate.
 494         * config.in: Ditto.
 495
 496 2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>
 497
 498         * i386-dis.c (SEG_Fixup): New.
 499         (Sv): New.
 500         (dis386): Use "Sv" for 0x8c and 0x8e.
 501
 502 2005-03-21  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 503             Nick Clifton  <nickc@redhat.com>
 504
 505         * vax-dis.c: (entry_addr): New varible:  An array of user supplied
 506         function entry mask addresses.
 507         (entry_addr_occupied_slots): New variable: The number of occupied
 508         elements in entry_addr.
 509         (entry_addr_total_slots): New variable: The total number of
 510         elements in entry_addr.
 511         (parse_disassembler_options): New function.  Fills in the entry_addr
 512         array.
 513         (free_entry_array): New function.  Release the memory used by the
 514         entry addr array.  Suppressed because there is no way to call it.
 515         (is_function_entry): Check if a given address is a function's
 516         start address by looking at supplied entry mask addresses and
 517         symbol information, if available.
 518         (print_insn_vax): Use parse_disassembler_options and is_function_entry.
 519
 520 2005-03-23  H.J. Lu  <hongjiu.lu@intel.com>
 521
 522         * cris-dis.c (print_with_operands): Use ~31L for long instead
 523         of ~31.
 524
 525 2005-03-20  H.J. Lu  <hongjiu.lu@intel.com>
 526
 527         * mmix-opc.c (O): Revert the last change.
 528         (Z): Likewise.
 529
 530 2005-03-19  H.J. Lu  <hongjiu.lu@intel.com>
 531
 532         * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
 533         (Z): Likewise.
 534
 535 2005-03-19  Hans-Peter Nilsson  <hp@bitrange.com>
 536
 537         * mmix-opc.c (O, Z): Force expression as unsigned long.
 538
 539 2005-03-18  Nick Clifton  <nickc@redhat.com>
 540
 541         * ip2k-asm.c: Regenerate.
 542         * op/opcodes.pot: Regenerate.
 543
 544 2005-03-16  Nick Clifton  <nickc@redhat.com>
 545             Ben Elliston  <bje@au.ibm.com>
 546
 547         * configure.in (werror): New switch: Add -Werror to the
 548         compiler command line.  Enabled by default.  Disable via
 549         --disable-werror.
 550         * configure: Regenerate.
 551
 552 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
 553
 554         * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
 555         BOOKE.
 556
 557 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
 558
 559         * po/es.po: Commit new Spanish translation.
 560
 561         * po/fr.po: Commit new French translation.
 562
 563 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 564
 565         * vax-dis.c: Fix spelling error
 566         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
 567         of just "Entry mask: < r1 ... >"
 568
 569 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
 570
 571         * arm-dis.c (arm_opcodes): Document %E and %V.
 572         Add entries for v6T2 ARM instructions:
 573         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
 574         (print_insn_arm): Add support for %E and %V.
 575         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
 576
 577 2005-03-10  Jeff Baker  <jbaker@qnx.com>
 578             Alan Modra  <amodra@bigpond.net.au>
 579
 580         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
 581         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
 582         (SPRG_MASK): Delete.
 583         (XSPRG_MASK): Mask off extra bits now part of sprg field.
 584         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
 585         mfsprg4..7 after msprg and consolidate.
 586
 587 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 588
 589         * vax-dis.c (entry_mask_bit): New array.
 590         (print_insn_vax): Decode function entry mask.
 591
 592 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
 593
 594         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
 595
 596 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
 597
 598         * po/opcodes.pot: Regenerate.
 599
 600 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
 601
 602         * arc-dis.c (a4_decoding_class): New enum.
 603         (dsmOneArcInst): Use the enum values for the decoding class.
 604         Remove redundant case in the switch for decodingClass value 11.
 605
 606 2005-03-02  Jan Beulich  <jbeulich@novell.com>
 607
 608         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
 609         accesses.
 610         (OP_C): Consider lock prefix in non-64-bit modes.
 611
 612 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 613
 614         * cris-dis.c (format_hex): Remove ineffective warning fix.
 615         * crx-dis.c (make_instruction): Warning fix.
 616         * frv-asm.c: Regenerate.
 617
 618 2005-02-23  Nick Clifton  <nickc@redhat.com>
 619
 620         * cgen-dis.in: Use bfd_byte for buffers that are passed to
 621         read_memory.
 622
 623         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
 624
 625         * crx-dis.c (make_instruction): Move argument structure into inner
 626         scope and ensure that all of its fields are initialised before
 627         they are used.
 628
 629         * fr30-asm.c: Regenerate.
 630         * fr30-dis.c: Regenerate.
 631         * frv-asm.c: Regenerate.
 632         * frv-dis.c: Regenerate.
 633         * ip2k-asm.c: Regenerate.
 634         * ip2k-dis.c: Regenerate.
 635         * iq2000-asm.c: Regenerate.
 636         * iq2000-dis.c: Regenerate.
 637         * m32r-asm.c: Regenerate.
 638         * m32r-dis.c: Regenerate.
 639         * openrisc-asm.c: Regenerate.
 640         * openrisc-dis.c: Regenerate.
 641         * xstormy16-asm.c: Regenerate.
 642         * xstormy16-dis.c: Regenerate.
 643
 644 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 645
 646         * arc-ext.c: Warning fixes.
 647         * arc-ext.h: Likewise.
 648         * cgen-opc.c: Likewise.
 649         * ia64-gen.c: Likewise.
 650         * maxq-dis.c: Likewise.
 651         * ns32k-dis.c: Likewise.
 652         * w65-dis.c: Likewise.
 653         * ia64-asmtab.c: Regenerate.
 654
 655 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 656
 657         * fr30-desc.c: Regenerate.
 658         * fr30-desc.h: Regenerate.
 659         * fr30-opc.c: Regenerate.
 660         * fr30-opc.h: Regenerate.
 661         * frv-desc.c: Regenerate.
 662         * frv-desc.h: Regenerate.
 663         * frv-opc.c: Regenerate.
 664         * frv-opc.h: Regenerate.
 665         * ip2k-desc.c: Regenerate.
 666         * ip2k-desc.h: Regenerate.
 667         * ip2k-opc.c: Regenerate.
 668         * ip2k-opc.h: Regenerate.
 669         * iq2000-desc.c: Regenerate.
 670         * iq2000-desc.h: Regenerate.
 671         * iq2000-opc.c: Regenerate.
 672         * iq2000-opc.h: Regenerate.
 673         * m32r-desc.c: Regenerate.
 674         * m32r-desc.h: Regenerate.
 675         * m32r-opc.c: Regenerate.
 676         * m32r-opc.h: Regenerate.
 677         * m32r-opinst.c: Regenerate.
 678         * openrisc-desc.c: Regenerate.
 679         * openrisc-desc.h: Regenerate.
 680         * openrisc-opc.c: Regenerate.
 681         * openrisc-opc.h: Regenerate.
 682         * xstormy16-desc.c: Regenerate.
 683         * xstormy16-desc.h: Regenerate.
 684         * xstormy16-opc.c: Regenerate.
 685         * xstormy16-opc.h: Regenerate.
 686
 687 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
 688
 689         * Makefile.am: Run "make dep-am"
 690         * Makefile.in: Regenerate.
 691
 692 2005-02-15  Nick Clifton  <nickc@redhat.com>
 693
 694         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
 695         compile time warnings.
 696         (print_keyword): Likewise.
 697         (default_print_insn): Likewise.
 698
 699         * fr30-desc.c: Regenerated.
 700         * fr30-desc.h: Regenerated.
 701         * fr30-dis.c: Regenerated.
 702         * fr30-opc.c: Regenerated.
 703         * fr30-opc.h: Regenerated.
 704         * frv-desc.c: Regenerated.
 705         * frv-dis.c: Regenerated.
 706         * frv-opc.c: Regenerated.
 707         * ip2k-asm.c: Regenerated.
 708         * ip2k-desc.c: Regenerated.
 709         * ip2k-desc.h: Regenerated.
 710         * ip2k-dis.c: Regenerated.
 711         * ip2k-opc.c: Regenerated.
 712         * ip2k-opc.h: Regenerated.
 713         * iq2000-desc.c: Regenerated.
 714         * iq2000-dis.c: Regenerated.
 715         * iq2000-opc.c: Regenerated.
 716         * m32r-asm.c: Regenerated.
 717         * m32r-desc.c: Regenerated.
 718         * m32r-desc.h: Regenerated.
 719         * m32r-dis.c: Regenerated.
 720         * m32r-opc.c: Regenerated.
 721         * m32r-opc.h: Regenerated.
 722         * m32r-opinst.c: Regenerated.
 723         * openrisc-desc.c: Regenerated.
 724         * openrisc-desc.h: Regenerated.
 725         * openrisc-dis.c: Regenerated.
 726         * openrisc-opc.c: Regenerated.
 727         * openrisc-opc.h: Regenerated.
 728         * xstormy16-desc.c: Regenerated.
 729         * xstormy16-desc.h: Regenerated.
 730         * xstormy16-dis.c: Regenerated.
 731         * xstormy16-opc.c: Regenerated.
 732         * xstormy16-opc.h: Regenerated.
 733
 734 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 735
 736         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 737         address.
 738
 739 2005-02-11  Nick Clifton  <nickc@redhat.com>
 740
 741         * iq2000-asm.c: Regenerate.
 742
 743         * frv-dis.c: Regenerate.
 744
 745 2005-02-07  Jim Blandy  <jimb@redhat.com>
 746
 747         * Makefile.am (CGEN): Load guile.scm before calling the main
 748         application script.
 749         * Makefile.in: Regenerated.
 750         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 751         Simply pass the cgen-opc.scm path to ${cgen} as its first
 752         argument; ${cgen} itself now contains the '-s', or whatever is
 753         appropriate for the Scheme being used.
 754
 755 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 756
 757         * configure: Regenerate to track ../gettext.m4.
 758
 759 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 760
 761         * ia64-gen.c (NELEMS): Define.
 762         (shrink): Generate alias with missing second predicate register when
 763         opcode has two outputs and these are both predicates.
 764         * ia64-opc-i.c (FULL17): Define.
 765         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 766         here to generate output template.
 767         (TBITCM, TNATCM): Undefine after use.
 768         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 769         first input. Add ld16 aliases without ar.csd as second output. Add
 770         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 771         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 772         ar.ccv as third/fourth inputs. Consolidate through...
 773         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 774         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 775         * ia64-asmtab.c: Regenerate.
 776
 777 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 778
 779         * configure: Regenerate to track ../gettext.m4 change.
 780
 781 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 782
 783         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 784         * frv-asm.c: Rebuilt.
 785         * frv-desc.c: Rebuilt.
 786         * frv-desc.h: Rebuilt.
 787         * frv-dis.c: Rebuilt.
 788         * frv-ibld.c: Rebuilt.
 789         * frv-opc.c: Rebuilt.
 790         * frv-opc.h: Rebuilt.
 791
 792 2005-01-24  Andrew Cagney  <cagney@gnu.org>
 793
 794         * configure: Regenerate, ../gettext.m4 was updated.
 795
 796 2005-01-21  Fred Fish  <fnf@specifixinc.com>
 797
 798         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
 799         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
 800         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
 801         * mips-dis.c: Ditto.
 802
 803 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
 804
 805         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
 806
 807 2005-01-19  Fred Fish  <fnf@specifixinc.com>
 808
 809         * mips-dis.c (no_aliases): New disassembly option flag.
 810         (set_default_mips_dis_options): Init no_aliases to zero.
 811         (parse_mips_dis_option): Handle no-aliases option.
 812         (print_insn_mips): Ignore table entries that are aliases
 813         if no_aliases is set.
 814         (print_insn_mips16): Ditto.
 815         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
 816         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
 817         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
 818         * mips16-opc.c (mips16_opcodes): Ditto.
 819
 820 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
 821
 822         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
 823         (inheritance diagram): Add missing edge.
 824         (arch_sh1_up): Rename arch_sh_up to match external name to make life
 825         easier for the testsuite.
 826         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
 827         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
 828         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
 829         arch_sh2a_or_sh4_up child.
 830         (sh_table): Do renaming as above.
 831         Correct comment for ldc.l for gas testsuite to read.
 832         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
 833         Correct comments for movy.w and movy.l for gas testsuite to read.
 834         Correct comments for fmov.d and fmov.s for gas testsuite to read.
 835
 836 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 837
 838         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
 839
 840 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 841
 842         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
 843
 844 2005-01-10  Andreas Schwab  <schwab@suse.de>
 845
 846         * disassemble.c (disassemble_init_for_target) <case
 847         bfd_arch_ia64>: Set skip_zeroes to 16.
 848         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
 849
 850 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
 851
 852         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
 853
 854 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
 855
 856         * avr-dis.c: Prettyprint. Added printing of symbol names in all
 857         memory references. Convert avr_operand() to C90 formatting.
 858
 859 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
 860
 861         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
 862
 863 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
 864
 865         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
 866         (no_op_insn): Initialize array with instructions that have no
 867         operands.
 868         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
 869
 870 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
 871
 872         * arm-dis.c: Correct top-level comment.
 873
 874 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
 875
 876         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
 877         architecuture defining the insn.
 878         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
 879         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
 880         field.
 881         Also include opcode/arm.h.
 882         * Makefile.am (arm-dis.lo): Update dependency list.
 883         * Makefile.in: Regenerate.
 884
 885 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
 886
 887         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
 888         reflect the change to the short immediate syntax.
 889
 890 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
 891
 892         * or32-opc.c (debug): Warning fix.
 893         * po/POTFILES.in: Regenerate.
 894
 895         * maxq-dis.c: Formatting.
 896         (print_insn): Warning fix.
 897
 898 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
 899
 900         * arm-dis.c (WORD_ADDRESS): Define.
 901         (print_insn): Use it.  Correct big-endian end-of-section handling.
 902
 903 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
 904             Vineet Sharma      <vineets@noida.hcltech.com>
 905
 906         * maxq-dis.c: New file.
 907         * disassemble.c (ARCH_maxq): Define.
 908         (disassembler): Add 'print_insn_maxq_little' for handling maxq
 909         instructions..
 910         * configure.in: Add case for bfd_maxq_arch.
 911         * configure: Regenerate.
 912         * Makefile.am: Add support for maxq-dis.c
 913         * Makefile.in: Regenerate.
 914         * aclocal.m4: Regenerate.
 915
 916 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
 917
 918         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
 919         mode.
 920         * crx-dis.c: Likewise.
 921
 922 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
 923
 924         Generally, handle CRISv32.
 925         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
 926         (struct cris_disasm_data): New type.
 927         (format_reg, format_hex, cris_constraint, print_flags)
 928         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
 929         callers changed.
 930         (format_sup_reg, print_insn_crisv32_with_register_prefix)
 931         (print_insn_crisv32_without_register_prefix)
 932         (print_insn_crisv10_v32_with_register_prefix)
 933         (print_insn_crisv10_v32_without_register_prefix)
 934         (cris_parse_disassembler_options): New functions.
 935         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
 936         parameter.  All callers changed.
 937         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
 938         failure.
 939         (cris_constraint) <case 'Y', 'U'>: New cases.
 940         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
 941         for constraint 'n'.
 942         (print_with_operands) <case 'Y'>: New case.
 943         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
 944         <case 'N', 'Y', 'Q'>: New cases.
 945         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
 946         (print_insn_cris_with_register_prefix)
 947         (print_insn_cris_without_register_prefix): Call
 948         cris_parse_disassembler_options.
 949         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
 950         for CRISv32 and the size of immediate operands.  New v32-only
 951         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
 952         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
 953         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
 954         Change brp to be v3..v10.
 955         (cris_support_regs): New vector.
 956         (cris_opcodes): Update head comment.  New format characters '[',
 957         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
 958         Add new opcodes for v32 and adjust existing opcodes to accommodate
 959         differences to earlier variants.
 960         (cris_cond15s): New vector.
 961
 962 2004-11-04 Jan Beulich <jbeulich@novell.com>
 963
 964         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
 965         (indirEb): Remove.
 966         (Mp): Use f_mode rather than none at all.
 967         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
 968         replaces what previously was x_mode; x_mode now means 128-bit SSE
 969         operands.
 970         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
 971         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
 972         pinsrw's second operand is Edqw.
 973         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
 974         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
 975         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
 976         mode when an operand size override is present or always suffixing.
 977         More instructions will need to be added to this group.
 978         (putop): Handle new macro chars 'C' (short/long suffix selector),
 979         'I' (Intel mode override for following macro char), and 'J' (for
 980         adding the 'l' prefix to far branches in AT&T mode). When an
 981         alternative was specified in the template, honor macro character when
 982         specified for Intel mode.
 983         (OP_E): Handle new *_mode values. Correct pointer specifications for
 984         memory operands. Consolidate output of index register.
 985         (OP_G): Handle new *_mode values.
 986         (OP_I): Handle const_1_mode.
 987         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
 988         respective opcode prefix bits have been consumed.
 989         (OP_EM, OP_EX): Provide some default handling for generating pointer
 990         specifications.
 991
 992 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
 993
 994         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
 995         COP_INST macro.
 996
 997 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
 998
 999         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
1000         (getregliststring): Support HI/LO and user registers.
1001         * crx-opc.c (crx_instruction): Update data structure according to the
1002         rearrangement done in CRX opcode header file.
1003         (crx_regtab):  Likewise.
1004         (crx_optab):  Likewise.
1005         (crx_instruction): Reorder load/stor instructions, remove unsupported
1006         formats.
1007         support new Co-Processor instruction 'cpi'.
1008
1009 2004-10-27  Nick Clifton  <nickc@redhat.com>
1010
1011         * opcodes/iq2000-asm.c: Regenerate.
1012         * opcodes/iq2000-desc.c: Regenerate.
1013         * opcodes/iq2000-desc.h: Regenerate.
1014         * opcodes/iq2000-dis.c: Regenerate.
1015         * opcodes/iq2000-ibld.c: Regenerate.
1016         * opcodes/iq2000-opc.c: Regenerate.
1017         * opcodes/iq2000-opc.h: Regenerate.
1018
1019 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
1020
1021         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1022         us4, us5 (respectively).
1023         Remove unsupported 'popa' instruction.
1024         Reverse operands order in store co-processor instructions.
1025
1026 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
1027
1028         * Makefile.am: Run "make dep-am"
1029         * Makefile.in: Regenerate.
1030
1031 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
1032
1033         * xtensa-dis.c: Use ISO C90 formatting.
1034
1035 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
1036
1037         * ppc-opc.c: Revert 2004-09-09 change.
1038
1039 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
1040
1041         * xtensa-dis.c (state_names): Delete.
1042         (fetch_data): Use xtensa_isa_maxlength.
1043         (print_xtensa_operand): Replace operand parameter with opcode/operand
1044         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
1045         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
1046         instruction bundles.  Use xmalloc instead of malloc.
1047
1048 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
1049
1050         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1051         initializers.
1052
1053 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
1054
1055         * crx-opc.c (crx_instruction): Support Co-processor insns.
1056         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1057         (getregliststring): Change function to use the above enum.
1058         (print_arg): Handle CO-Processor insns.
1059         (crx_cinvs): Add 'b' option to invalidate the branch-target
1060         cache.
1061
1062 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
1063
1064         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1065         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1066         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1067         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1068         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1069
1070 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
1071
1072         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1073         rather than add it.
1074
1075 2004-09-30  Paul Brook  <paul@codesourcery.com>
1076
1077         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1078         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
1079
1080 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
1081
1082         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1083         (CONFIG_STATUS_DEPENDENCIES): New.
1084         (Makefile): Removed.
1085         (config.status): Likewise.
1086         * Makefile.in: Regenerated.
1087
1088 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
1089
1090         * Makefile.am: Run "make dep-am".
1091         * Makefile.in: Regenerate.
1092         * aclocal.m4: Regenerate.
1093         * configure: Regenerate.
1094         * po/POTFILES.in: Regenerate.
1095         * po/opcodes.pot: Regenerate.
1096
1097 2004-09-11  Andreas Schwab  <schwab@suse.de>
1098
1099         * configure: Rebuild.
1100
1101 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
1102
1103         * ppc-opc.c (L): Make this field not optional.
1104
1105 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
1106
1107         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1108         Fix parameter to 'm[t|f]csr' insns.
1109
1110 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
1111
1112         * configure.in: Autoupdate to autoconf 2.59.
1113         * aclocal.m4: Rebuild with aclocal 1.4p6.
1114         * configure: Rebuild with autoconf 2.59.
1115         * Makefile.in: Rebuild with automake 1.4p6 (picking up
1116         bfd changes for autoconf 2.59 on the way).
1117         * config.in: Rebuild with autoheader 2.59.
1118
1119 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
1120
1121         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1122
1123 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
1124
1125         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1126         (GRPPADLCK2): New define.
1127         (twobyte_has_modrm): True for 0xA6.
1128         (grps): GRPPADLCK2 for opcode 0xA6.
1129
1130 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
1131
1132         Introduce SH2a support.
1133         * sh-opc.h (arch_sh2a_base): Renumber.
1134         (arch_sh2a_nofpu_base): Remove.
1135         (arch_sh_base_mask): Adjust.
1136         (arch_opann_mask): New.
1137         (arch_sh2a, arch_sh2a_nofpu): Adjust.
1138         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1139         (sh_table): Adjust whitespace.
1140         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
1141         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
1142         instruction list throughout.
1143         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
1144         of arch_sh2a in instruction list throughout.
1145         (arch_sh2e_up): Accomodate above changes.
1146         (arch_sh2_up): Ditto.
1147         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
1148         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1149         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
1150         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1151         * sh-opc.h (arch_sh2a_nofpu): New.
1152         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1153         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1154         instruction.
1155         2004-01-20  DJ Delorie  <dj@redhat.com>
1156         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1157         2003-12-29  DJ Delorie  <dj@redhat.com>
1158         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1159         sh_opcode_info, sh_table): Add sh2a support.
1160         (arch_op32): New, to tag 32-bit opcodes.
1161         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1162         2003-12-02  Michael Snyder  <msnyder@redhat.com>
1163         * sh-opc.h (arch_sh2a): Add.
1164         * sh-dis.c (arch_sh2a): Handle.
1165         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1166
1167 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
1168
1169         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1170
1171 2004-07-22  Nick Clifton  <nickc@redhat.com>
1172
1173         PR/280
1174         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1175         insns - this is done by objdump itself.
1176         * h8500-dis.c (print_insn_h8500): Likewise.
1177
1178 2004-07-21  Jan Beulich <jbeulich@novell.com>
1179
1180         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1181         regardless of address size prefix in effect.
1182         (ptr_reg): Size or address registers does not depend on rex64, but
1183         on the presence of an address size override.
1184         (OP_MMX): Use rex.x only for xmm registers.
1185         (OP_EM): Use rex.z only for xmm registers.
1186
1187 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1188
1189         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1190         move/branch operations to the bottom so that VR5400 multimedia
1191         instructions take precedence in disassembly.
1192
1193 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1194
1195         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1196         ISA-specific "break" encoding.
1197
1198 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
1199
1200         * arm-opc.h: Fix typo in comment.
1201
1202 2004-07-11  Andreas Schwab  <schwab@suse.de>
1203
1204         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1205
1206 2004-07-09  Andreas Schwab  <schwab@suse.de>
1207
1208         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1209
1210 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
1211
1212         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1213         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1214         (crx-dis.lo): New target.
1215         (crx-opc.lo): Likewise.
1216         * Makefile.in: Regenerate.
1217         * configure.in: Handle bfd_crx_arch.
1218         * configure: Regenerate.
1219         * crx-dis.c: New file.
1220         * crx-opc.c: New file.
1221         * disassemble.c (ARCH_crx): Define.
1222         (disassembler): Handle ARCH_crx.
1223
1224 2004-06-29  James E Wilson  <wilson@specifixinc.com>
1225
1226         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1227         * ia64-asmtab.c: Regnerate.
1228
1229 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
1230
1231         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1232         (extract_fxm): Don't test dialect.
1233         (XFXFXM_MASK): Include the power4 bit.
1234         (XFXM): Add p4 param.
1235         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
1236
1237 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
1238
1239         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
1240         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1241
1242 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
1243
1244         * ppc-opc.c (BH, XLBH_MASK): Define.
1245         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1246
1247 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
1248
1249         * i386-dis.c (x_mode): Comment.
1250         (two_source_ops): File scope.
1251         (float_mem): Correct fisttpll and fistpll.
1252         (float_mem_mode): New table.
1253         (dofloat): Use it.
1254         (OP_E): Correct intel mode PTR output.
1255         (ptr_reg): Use open_char and close_char.
1256         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
1257         operands.  Set two_source_ops.
1258
1259 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
1260
1261         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1262         instead of _raw_size.
1263
1264 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
1265
1266         * ia64-gen.c (in_iclass): Handle more postinc st
1267         and ld variants.
1268         * ia64-asmtab.c: Rebuilt.
1269
1270 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
1271
1272         * s390-opc.txt: Correct architecture mask for some opcodes.
1273         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1274         in the esa mode as well.
1275
1276 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
1277
1278         * sh-dis.c (target_arch): Make unsigned.
1279         (print_insn_sh): Replace (most of) switch with a call to
1280         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1281         * sh-opc.h: Redefine architecture flags values.
1282         Add sh3-nommu architecture.
1283         Reorganise <arch>_up macros so they make more visual sense.
1284         (SH_MERGE_ARCH_SET): Define new macro.
1285         (SH_VALID_BASE_ARCH_SET): Likewise.
1286         (SH_VALID_MMU_ARCH_SET): Likewise.
1287         (SH_VALID_CO_ARCH_SET): Likewise.
1288         (SH_VALID_ARCH_SET): Likewise.
1289         (SH_MERGE_ARCH_SET_VALID): Likewise.
1290         (SH_ARCH_SET_HAS_FPU): Likewise.
1291         (SH_ARCH_SET_HAS_DSP): Likewise.
1292         (SH_ARCH_UNKNOWN_ARCH): Likewise.
1293         (sh_get_arch_from_bfd_mach): Add prototype.
1294         (sh_get_arch_up_from_bfd_mach): Likewise.
1295         (sh_get_bfd_mach_from_arch_set): Likewise.
1296         (sh_merge_bfd_arc): Likewise.
1297
1298 2004-05-24  Peter Barada  <peter@the-baradas.com>
1299
1300         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1301         into new match_insn_m68k function.  Loop over canidate
1302         matches and select first that completely matches.
1303         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1304         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1305         to verify addressing for MAC/EMAC.
1306         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1307         reigster halves since 'fpu' and 'spl' look misleading.
1308         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1309         * m68k-opc.c: Rearragne mac/emac cases to use longest for
1310         first, tighten up match masks.
1311         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
1312         'size' from special case code in print_insn_m68k to
1313         determine decode size of insns.
1314
1315 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
1316
1317         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1318         well as when -mpower4.
1319
1320 2004-05-13  Nick Clifton  <nickc@redhat.com>
1321
1322         * po/fr.po: Updated French translation.
1323
1324 2004-05-05  Peter Barada  <peter@the-baradas.com>
1325
1326         * m68k-dis.c(print_insn_m68k): Add new chips, use core
1327         variants in arch_mask.  Only set m68881/68851 for 68k chips.
1328         * m68k-op.c: Switch from ColdFire chips to core variants.
1329
1330 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
1331
1332         PR 147.
1333         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1334
1335 2004-04-29  Ben Elliston  <bje@au.ibm.com>
1336
1337         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1338         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1339
1340 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
1341
1342         * sh-dis.c (print_insn_sh): Print the value in constant pool
1343         as a symbol if it looks like a symbol.
1344
1345 2004-04-22  Peter Barada <peter@the-baradas.com>
1346
1347         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1348         appropriate ColdFire architectures.
1349         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1350         mask addressing.
1351         Add EMAC instructions, fix MAC instructions. Remove
1352         macmw/macml/msacmw/msacml instructions since mask addressing now
1353         supported.
1354
1355 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
1356
1357         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1358         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1359         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
1360         macro.  Adjust all users.
1361
1362 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
1363
1364         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1365         separately.
1366
1367 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1368
1369         * m32r-asm.c: Regenerate.
1370
1371 2004-03-29  Stan Shebs  <shebs@apple.com>
1372
1373         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1374         used.
1375
1376 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
1377
1378         * aclocal.m4: Regenerate.
1379         * config.in: Regenerate.
1380         * configure: Regenerate.
1381         * po/POTFILES.in: Regenerate.
1382         * po/opcodes.pot: Regenerate.
1383
1384 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
1385
1386         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
1387         PPC_OPERANDS_GPR_0.
1388         * ppc-opc.c (RA0): Define.
1389         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1390         (RAOPT): Rename from RAO.  Update all uses.
1391         (powerpc_opcodes): Use RA0 as appropriate.
1392
1393 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
1394
1395         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1396
1397 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
1398
1399         * sparc-dis.c (print_insn_sparc): Update getword prototype.
1400
1401 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1402
1403         * i386-dis.c (GRPPLOCK): Delete.
1404         (grps): Delete GRPPLOCK entry.
1405
1406 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1407
1408         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1409         (M, Mp): Use OP_M.
1410         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1411         (GRPPADLCK): Define.
1412         (dis386): Use NOP_Fixup on "nop".
1413         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1414         (twobyte_has_modrm): Set for 0xa7.
1415         (padlock_table): Delete.  Move to..
1416         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
1417         and clflush.
1418         (print_insn): Revert PADLOCK_SPECIAL code.
1419         (OP_E): Delete sfence, lfence, mfence checks.
1420
1421 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
1422
1423         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1424         (INVLPG_Fixup): New function.
1425         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1426
1427 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1428
1429         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1430         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1431         (padlock_table): New struct with PadLock instructions.
1432         (print_insn): Handle PADLOCK_SPECIAL.
1433
1434 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1435
1436         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1437         (OP_E): Twiddle clflush to sfence here.
1438
1439 2004-03-08  Nick Clifton  <nickc@redhat.com>
1440
1441         * po/de.po: Updated German translation.
1442
1443 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
1444
1445         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1446         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
1447         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1448         accordingly.
1449
1450 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1451
1452         * frv-asm.c: Regenerate.
1453         * frv-desc.c: Regenerate.
1454         * frv-desc.h: Regenerate.
1455         * frv-dis.c: Regenerate.
1456         * frv-ibld.c: Regenerate.
1457         * frv-opc.c: Regenerate.
1458         * frv-opc.h: Regenerate.
1459
1460 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1461
1462         * frv-desc.c, frv-opc.c: Regenerate.
1463
1464 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1465
1466         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1467
1468 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
1469
1470         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1471         Also correct mistake in the comment.
1472
1473 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
1474
1475         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1476         ensure that double registers have even numbers.
1477         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1478         that reserved instruction 0xfffd does not decode the same
1479         as 0xfdfd (ftrv).
1480         * sh-opc.h: Add REG_N_D nibble type and use it whereever
1481         REG_N refers to a double register.
1482         Add REG_N_B01 nibble type and use it instead of REG_NM
1483         in ftrv.
1484         Adjust the bit patterns in a few comments.
1485
1486 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
1487
1488         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1489
1490 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1491
1492         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1493
1494 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1495
1496         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1497
1498 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1499
1500         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1501         mtivor32, mtivor33, mtivor34.
1502
1503 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
1504
1505         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1506
1507 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
1508
1509         * arm-opc.h Maverick accumulator register opcode fixes.
1510
1511 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
1512
1513         * m32r-dis.c: Regenerate.
1514
1515 2004-01-27  Michael Snyder  <msnyder@redhat.com>
1516
1517         * sh-opc.h (sh_table): "fsrra", not "fssra".
1518
1519 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
1520
1521         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1522         contraints.
1523
1524 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
1525
1526         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1527
1528 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
1529
1530         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1531         1.  Don't print scale factor on AT&T mode when index missing.
1532
1533 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
1534
1535         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1536         when loaded into XR registers.
1537
1538 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1539
1540         * frv-desc.h: Regenerate.
1541         * frv-desc.c: Regenerate.
1542         * frv-opc.c: Regenerate.
1543
1544 2004-01-13  Michael Snyder  <msnyder@redhat.com>
1545
1546         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1547
1548 2004-01-09  Paul Brook  <paul@codesourcery.com>
1549
1550         * arm-opc.h (arm_opcodes): Move generic mcrr after known
1551         specific opcodes.
1552
1553 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
1554
1555         * Makefile.am (libopcodes_la_DEPENDENCIES)
1556         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1557         comment about the problem.
1558         * Makefile.in: Regenerate.
1559
1560 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1561
1562         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1563         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1564         cut&paste errors in shifting/truncating numerical operands.
1565         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1566         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1567         (parse_uslo16): Likewise.
1568         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1569         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1570         (parse_s12): Likewise.
1571         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1572         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1573         (parse_uslo16): Likewise.
1574         (parse_uhi16): Parse gothi and gotfuncdeschi.
1575         (parse_d12): Parse got12 and gotfuncdesc12.
1576         (parse_s12): Likewise.
1577
1578 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1579
1580         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1581         instruction which looks similar to an 'rla' instruction.
1582
1583 For older changes see ChangeLog-0203
1584 \f
1585 Local Variables:
1586 mode: change-log
1587 left-margin: 8
1588 fill-column: 74
1589 version-control: never
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