opcodes/ChangeLog

   1 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
   2
   3         * arm-dis.c (neon_opcodes): Add support for AES instructions.
   4
   5 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
   6
   7         * arm-dis.c (coprocessor_opcodes): Add support for HP/DP
   8         conversions.
   9
  10 2012-08-24  Matthew  Gretton-Dann  <matthew.gretton-dann@arm.com>
  11
  12         * arm-dis.c (coprocessor_opcodes): Add VRINT.
  13         (neon_opcodes): Likewise.
  14
  15 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  16
  17         * arm-dis.c (coprocessor_opcodes): Add support for new VCVT
  18         variants.
  19         (neon_opcodes): Likewise.
  20
  21 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  22
  23         * arm-dis.c (coprocessor_opcodes): Add VMAXNM/VMINNM.
  24         (neon_opcodes): Likewise.
  25
  26 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  27
  28         * arm-dis.c (coprocessor_opcodes): Add VSEL.
  29         (print_insn_coprocessor): Add new %<>c bitfield format
  30         specifier.
  31
  32 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  33
  34         * arm-dis.c (arm_opcodes): Add LDRA/STRL instructions.
  35         (thumb32_opcodes): Likewise.
  36         (print_arm_insn): Add support for %<>T formatter.
  37
  38 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  39
  40         * arm-dis.c (arm_opcodes): Add HLT.
  41         (thumb_opcodes): Likewise.
  42
  43 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  44
  45         * arm-dis.c (thumb32_opcodes): Add DCPS instruction.
  46
  47 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  48
  49         * arm-dis.c (arm_opcodes): Add SEVL.
  50         (thumb_opcodes): Likewise.
  51         (thumb32_opcodes): Likewise.
  52
  53 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  54
  55         * arm-dis.c (data_barrier_option): New function.
  56         (print_insn_arm): Use data_barrier_option.
  57         (print_insn_thumb32): Use data_barrier_option.
  58
  59 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com
  60
  61         * arm-dis.c (COND_UNCOND): New constant.
  62         (print_insn_coprocessor): Add support for %u format specifier.
  63         (print_insn_neon): Likewise.
  64
  65 2012-08-21  David S. Miller  <davem@davemloft.net>
  66
  67         * sparc-opc.c (4-argument crypto instructions): Fix encoding using
  68         F3F4 macro.
  69
  70 2012-08-20  Edmar Wienskoski  <edmar@freescale.com>
  71
  72         * ppc-opc.c (powerpc_opcodes): Changed opcode for vabsdub,
  73         vabsduh, vabsduw, mviwsplt.
  74
  75 2012-08-17  Nagajyothi Eggone  <nagajyothi.eggone@amd.com>
  76
  77         * i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and
  78         CPU_BTVER2_FLAGS.
  79
  80         * i386-opc.h: Update CpuPRFCHW comment.
  81
  82         * i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW.
  83         * i386-init.h: Regenerated.
  84         * i386-tbl.h: Likewise.
  85
  86 2012-08-17  Nick Clifton  <nickc@redhat.com>
  87
  88         * po/uk.po: New Ukranian translation.
  89         * configure.in (ALL_LINGUAS): Add uk.
  90         * configure: Regenerate.
  91
  92 2012-08-16  Peter Bergner  <bergner@vnet.ibm.com>
  93
  94         * ppc-opc.c (powerpc_opcodes) <"lswx">: Use RAX for the second and
  95         RBX for the third operand.
  96         <"lswi">: Use RAX for second and NBI for the third operand.
  97
  98 2012-08-15  DJ Delorie  <dj@redhat.com>
  99
 100         * rl78-decode.opc (rl78_decode_opcode): Merge %e and %[01]
 101         operands, so that data addresses can be corrected when not
 102         ES-overridden.
 103         * rl78-decode.c: Regenerate.
 104         * rl78-dis.c (print_insn_rl78): Make order of modifiers
 105         irrelevent.  When the 'e' specifier is used on an operand and no
 106         ES prefix is provided, adjust address to make it absolute.
 107
 108 2012-08-15  Peter Bergner  <bergner@vnet.ibm.com>
 109
 110         * ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR.
 111
 112 2012-08-15  Peter Bergner  <bergner@vnet.ibm.com>
 113
 114         * ppc-opc.c <xnop, yield, mdoio, mdoom>: New extended mnemonics.
 115
 116 2012-08-14  Maciej W. Rozycki  <macro@codesourcery.com>
 117
 118         * mips-dis.c (print_insn_args): Add GET_OP and GET_OP_S local
 119         macros, use local variables for info struct member accesses,
 120         update the type of the variable used to hold the instruction
 121         word.
 122         (print_insn_mips, print_mips16_insn_arg): Likewise.
 123         (print_insn_mips16): Add GET_OP and GET_OP_S local macros, use
 124         local variables for info struct member accesses.
 125         (print_insn_micromips): Add GET_OP_S local macro.
 126         (_print_insn_mips): Update the type of the variable used to hold
 127         the instruction word.
 128
 129 2012-08-13  Ian Bolton  <ian.bolton@arm.com>
 130             Laurent Desnogues  <laurent.desnogues@arm.com>
 131             Jim MacArthur  <jim.macarthur@arm.com>
 132             Marcus Shawcroft  <marcus.shawcroft@arm.com>
 133             Nigel Stephens  <nigel.stephens@arm.com>
 134             Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 135             Richard Earnshaw  <rearnsha@arm.com>
 136             Sofiane Naci  <sofiane.naci@arm.com>
 137             Tejas Belagod  <tejas.belagod@arm.com>
 138             Yufeng Zhang  <yufeng.zhang@arm.com>
 139
 140         * Makefile.am: Add AArch64.
 141         * Makefile.in: Regenerate.
 142         * aarch64-asm.c: New file.
 143         * aarch64-asm.h: New file.
 144         * aarch64-dis.c: New file.
 145         * aarch64-dis.h: New file.
 146         * aarch64-gen.c: New file.
 147         * aarch64-opc.c: New file.
 148         * aarch64-opc.h: New file.
 149         * aarch64-tbl.h: New file.
 150         * configure.in: Add AArch64.
 151         * configure: Regenerate.
 152         * disassemble.c: Add AArch64.
 153         * aarch64-asm-2.c: New file (automatically generated).
 154         * aarch64-dis-2.c: New file (automatically generated).
 155         * aarch64-opc-2.c: New file (automatically generated).
 156         * po/POTFILES.in: Regenerate.
 157
 158 2012-08-13  Maciej W. Rozycki  <macro@codesourcery.com>
 159
 160         * micromips-opc.c (micromips_opcodes): Update comment.
 161         * mips-opc.c (mips_builtin_opcodes): Likewise.  Mark coprocessor
 162         instructions for IOCT as appropriate.
 163         * mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with
 164         opcode_is_member.
 165         * configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with
 166         the result of a check for the -Wno-missing-field-initializers
 167         GCC option.
 168         * Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable.
 169         (mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to
 170         compilation.
 171         (mips16-opc.lo): Likewise.
 172         (micromips-opc.lo): Likewise.
 173         * aclocal.m4: Regenerate.
 174         * configure: Regenerate.
 175         * Makefile.in: Regenerate.
 176
 177 2012-08-11  Saravanan Ekanathan <saravanan.ekanathan@amd.com>
 178
 179         PR gas/14423
 180         * i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS.
 181         * i386-init.h: Regenerated.
 182
 183 2012-08-09  Nick Clifton  <nickc@redhat.com>
 184
 185         * po/vi.po: Updated Vietnamese translation.
 186
 187 2012-08-07  Roland McGrath  <mcgrathr@google.com>
 188
 189         * i386-dis.c (reg_table): Fill out REG_0F0D table with
 190         AMD-reserved cases as "prefetch".
 191         (MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants.
 192         (MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise.
 193         (reg_table): Use those under REG_0F18.
 194         (mod_table): Add those cases as "nop/reserved".
 195
 196 2012-08-07  Jan Beulich <jbeulich@suse.com>
 197
 198         * i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
 199
 200 2012-08-06  Roland McGrath  <mcgrathr@google.com>
 201
 202         * i386-dis.c (print_insn): Print spaces between multiple excess
 203         prefixes.  Return actual number of excess prefixes consumed,
 204         not always one.
 205
 206         * i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
 207
 208 2012-08-06  Roland McGrath  <mcgrathr@google.com>
 209             Victor Khimenko  <khim@google.com>
 210             H.J. Lu  <hongjiu.lu@intel.com>
 211
 212         * i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG.
 213         (putop): For 'T', 'U', and 'V', treat REX_W like DFLAG.
 214         (intel_operand_size): For stack_v_mode, treat REX_W like DFLAG.
 215         (OP_E_register): Likewise.
 216         (OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
 217
 218 2012-08-02  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 219
 220         * configure.in: Formatting.
 221         * configure: Regenerate.
 222
 223 2012-08-01  Alan Modra  <amodra@gmail.com>
 224
 225         * h8300-dis.c: Fix printf arg warnings.
 226         * i960-dis.c: Likewise.
 227         * mips-dis.c: Likewise.
 228         * pdp11-dis.c: Likewise.
 229         * sh-dis.c: Likewise.
 230         * v850-dis.c: Likewise.
 231         * configure.in: Formatting.
 232         * configure: Regenerate.
 233         * rl78-decode.c: Regenerate.
 234         * po/POTFILES.in: Regenerate.
 235
 236 2012-07-31  Chao-Ying Fu  <fu@mips.com>
 237             Catherine Moore  <clm@codesourcery.com>
 238             Maciej W. Rozycki  <macro@codesourcery.com>
 239
 240         * micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
 241         (DSP_VOLA): Likewise.
 242         (D32, D33): Likewise.
 243         (micromips_opcodes): Add DSP ASE instructions.
 244         * mips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
 245         <'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
 246
 247 2012-07-31  Jan Beulich <jbeulich@suse.com>
 248
 249         * i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2
 250         instruction group. Mark as requiring AVX2.
 251         * i386-tbl.h: Re-generate.
 252
 253 2012-07-30  Nick Clifton  <nickc@redhat.com>
 254
 255         * po/opcodes.pot: Updated template.
 256         * po/es.po: Updated Spanish translation.
 257         * po/fi.po: Updated Finnish translation.
 258
 259 2012-07-27  Mike Frysinger  <vapier@gentoo.org>
 260
 261         * configure.in (BFD_VERSION): Run bfd/configure --version and
 262         parse the output of that.
 263         * configure: Regenerate.
 264
 265 2012-07-25  James Lemke  <jwlemke@codesourcery.com>
 266
 267         * ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
 268
 269 2012-07-24  Stephan McCamant  <smcc@cs.berkeley.edu>
 270             Dr David Alan Gilbert  <dave@treblig.org>
 271
 272         PR binutils/13135
 273         * arm-dis.c: Add necessary casts for printing integer values.
 274         Use %s when printing string values.
 275         * hppa-dis.c: Likewise.
 276         * m68k-dis.c: Likewise.
 277         * microblaze-dis.c: Likewise.
 278         * mips-dis.c: Likewise.
 279         * sparc-dis.c: Likewise.
 280
 281 2012-07-19  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 282
 283         PR binutils/14355
 284         * i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
 285         (VEX_LEN_0FXOP_08_CD): Likewise.
 286         (VEX_LEN_0FXOP_08_CE): Likewise.
 287         (VEX_LEN_0FXOP_08_CF): Likewise.
 288         (VEX_LEN_0FXOP_08_EC): Likewise.
 289         (VEX_LEN_0FXOP_08_ED): Likewise.
 290         (VEX_LEN_0FXOP_08_EE): Likewise.
 291         (VEX_LEN_0FXOP_08_EF): Likewise.
 292         (xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
 293         vpcomub, vpcomuw, vpcomud, vpcomuq.
 294         (vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
 295         VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
 296         VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
 297         VEX_LEN_0FXOP_08_EF.
 298
 299 2012-07-16  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 300
 301         * i386-dis.c (PREFIX_0F38F6): New.
 302         (prefix_table): Add adcx, adox instructions.
 303         (three_byte_table): Use PREFIX_0F38F6.
 304         (mod_table): Add rdseed instruction.
 305         * i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
 306         (cpu_flags): Likewise.
 307         * i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
 308         (i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
 309         * i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
 310         prefetchw.
 311         * i386-tbl.h: Regenerate.
 312         * i386-init.h: Likewise.
 313
 314 2012-07-05  Thomas Schwinge  <thomas@codesourcery.com>
 315
 316         * mips-dis.c: Remove gratuitous newline.
 317
 318 2012-07-05  Sean Keys  <skeys@ipdatasys.com>
 319
 320         * xgate-dis.c: Removed an IF statement that will
 321         always be false due to overlapping operand masks.
 322         * xgate-opc.c: Corrected 'com' opcode entry and
 323         fixed spacing.
 324
 325 2012-07-02  Roland McGrath  <mcgrathr@google.com>
 326
 327         * i386-opc.tbl: Add RepPrefixOk to nop.
 328         * i386-tbl.h: Regenerate.
 329
 330 2012-06-28  Nick Clifton  <nickc@redhat.com>
 331
 332         * po/vi.po: Updated Vietnamese translation.
 333
 334 2012-06-22  Roland McGrath  <mcgrathr@google.com>
 335
 336         * i386-opc.tbl: Add RepPrefixOk to ret.
 337         * i386-tbl.h: Regenerate.
 338
 339         * i386-opc.h (RepPrefixOk): New enum constant.
 340         (i386_opcode_modifier): New bitfield 'repprefixok'.
 341         * i386-gen.c (opcode_modifiers): Add RepPrefixOk.
 342         * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
 343         instructions that have IsString.
 344         * i386-tbl.h: Regenerate.
 345
 346 2012-06-11  Andreas Schwab  <schwab@linux-m68k.org>
 347
 348         * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
 349         (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
 350         (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
 351         (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
 352         (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
 353         (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
 354         (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
 355         (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
 356         (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
 357
 358 2012-05-19  Alan Modra  <amodra@gmail.com>
 359
 360         * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
 361         (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
 362
 363 2012-05-18  Alan Modra  <amodra@gmail.com>
 364
 365         * ia64-opc.c: Remove #include "ansidecl.h".
 366         * z8kgen.c: Include sysdep.h first.
 367
 368         * arc-dis.c: Include sysdep.h first, remove some redundant includes.
 369         * bfin-dis.c: Likewise.
 370         * i860-dis.c: Likewise.
 371         * ia64-dis.c: Likewise.
 372         * ia64-gen.c: Likewise.
 373         * m68hc11-dis.c: Likewise.
 374         * mmix-dis.c: Likewise.
 375         * msp430-dis.c: Likewise.
 376         * or32-dis.c: Likewise.
 377         * rl78-dis.c: Likewise.
 378         * rx-dis.c: Likewise.
 379         * tic4x-dis.c: Likewise.
 380         * tilegx-opc.c: Likewise.
 381         * tilepro-opc.c: Likewise.
 382         * rx-decode.c: Regenerate.
 383
 384 2012-05-17  James Lemke  <jwlemke@codesourcery.com>
 385
 386         * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
 387
 388 2012-05-17  James Lemke  <jwlemke@codesourcery.com>
 389
 390         * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
 391
 392 2012-05-17  Daniel Richard G.  <skunk@iskunk.org>
 393             Nick Clifton  <nickc@redhat.com>
 394
 395         PR 14072
 396         * configure.in: Add check that sysdep.h has been included before
 397         any system header files.
 398         * configure: Regenerate.
 399         * config.in: Regenerate.
 400         * sysdep.h: Generate an error if included before config.h.
 401         * alpha-opc.c: Include sysdep.h before any other header file.
 402         * alpha-dis.c: Likewise.
 403         * avr-dis.c: Likewise.
 404         * cgen-opc.c: Likewise.
 405         * cr16-dis.c: Likewise.
 406         * cris-dis.c: Likewise.
 407         * crx-dis.c: Likewise.
 408         * d10v-dis.c: Likewise.
 409         * d10v-opc.c: Likewise.
 410         * d30v-dis.c: Likewise.
 411         * d30v-opc.c: Likewise.
 412         * h8500-dis.c: Likewise.
 413         * i370-dis.c: Likewise.
 414         * i370-opc.c: Likewise.
 415         * m10200-dis.c: Likewise.
 416         * m10300-dis.c: Likewise.
 417         * micromips-opc.c: Likewise.
 418         * mips-opc.c: Likewise.
 419         * mips61-opc.c: Likewise.
 420         * moxie-dis.c: Likewise.
 421         * or32-opc.c: Likewise.
 422         * pj-dis.c: Likewise.
 423         * ppc-dis.c: Likewise.
 424         * ppc-opc.c: Likewise.
 425         * s390-dis.c: Likewise.
 426         * sh-dis.c: Likewise.
 427         * sh64-dis.c: Likewise.
 428         * sparc-dis.c: Likewise.
 429         * sparc-opc.c: Likewise.
 430         * spu-dis.c: Likewise.
 431         * tic30-dis.c: Likewise.
 432         * tic54x-dis.c: Likewise.
 433         * tic80-dis.c: Likewise.
 434         * tic80-opc.c: Likewise.
 435         * tilegx-dis.c: Likewise.
 436         * tilepro-dis.c: Likewise.
 437         * v850-dis.c: Likewise.
 438         * v850-opc.c: Likewise.
 439         * vax-dis.c: Likewise.
 440         * w65-dis.c: Likewise.
 441         * xgate-dis.c: Likewise.
 442         * xtensa-dis.c: Likewise.
 443         * rl78-decode.opc: Likewise.
 444         * rl78-decode.c: Regenerate.
 445         * rx-decode.opc: Likewise.
 446         * rx-decode.c: Regenerate.
 447
 448 2012-05-17  Alan Modra  <amodra@gmail.com>
 449
 450         * ppc_dis.c: Don't include elf/ppc.h.
 451
 452 2012-05-16  Meador Inge  <meadori@codesourcery.com>
 453
 454         * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
 455         to PUSH/POP {reg}.
 456
 457 2012-05-15  James Murray <jsm@jsm-net.demon.co.uk>
 458             Stephane Carrez <stcarrez@nerim.fr>
 459
 460         * configure.in: Add S12X and XGATE co-processor support to m68hc11
 461         target.
 462         * disassemble.c: Likewise.
 463         * configure: Regenerate.
 464         * m68hc11-dis.c: Make objdump output more consistent, use hex
 465         instead of decimal and use 0x prefix for hex.
 466         * m68hc11-opc.c: Add S12X and XGATE opcodes.
 467
 468 2012-05-14  James Lemke  <jwlemke@codesourcery.com>
 469
 470         * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
 471         (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
 472         (vle_opcd_indices): New array.
 473         (lookup_vle): New function.
 474         (disassemble_init_powerpc): Revise for second (VLE) opcode table.
 475         (print_insn_powerpc): Likewise.
 476         * ppc-opc.c: Likewise.
 477
 478 2012-05-14  Catherine Moore  <clm@codesourcery.com>
 479             Maciej W. Rozycki  <macro@codesourcery.com>
 480             Rhonda Wittels  <rhonda@codesourcery.com>
 481             Nathan Froyd <froydnj@codesourcery.com>
 482
 483         * ppc-opc.c (insert_arx, extract_arx): New functions.
 484         (insert_ary, extract_ary): New functions.
 485         (insert_li20, extract_li20): New functions.
 486         (insert_rx, extract_rx): New functions.
 487         (insert_ry, extract_ry): New functions.
 488         (insert_sci8, extract_sci8): New functions.
 489         (insert_sci8n, extract_sci8n): New functions.
 490         (insert_sd4h, extract_sd4h): New functions.
 491         (insert_sd4w, extract_sd4w): New functions.
 492         (insert_vlesi, extract_vlesi): New functions.
 493         (insert_vlensi, extract_vlensi): New functions.
 494         (insert_vleui, extract_vleui): New functions.
 495         (insert_vleil, extract_vleil): New functions.
 496         (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
 497         (BI16, BI32, BO32, B8): New.
 498         (B15, B24, CRD32, CRS): New.
 499         (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
 500         (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
 501         (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
 502         (SH6_MASK): Use PPC_OPSHIFT_INV.
 503         (SI8, UI5, OIMM5, UI7, BO16): New.
 504         (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
 505         (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
 506         (ALLOW8_SPRG): New.
 507         (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
 508         (OPVUP, OPVUP_MASK OPVUP): New
 509         (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
 510         (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
 511         (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
 512         (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
 513         (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
 514         (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
 515         (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
 516         (SE_IM5, SE_IM5_MASK): New.
 517         (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
 518         (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
 519         (BO32DNZ, BO32DZ): New.
 520         (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
 521         (PPCVLE): New.
 522         (powerpc_opcodes): Add new VLE instructions.  Update existing
 523         instruction to include PPCVLE if supported.
 524         * ppc-dis.c (ppc_opts): Add vle entry.
 525         (get_powerpc_dialect): New function.
 526         (powerpc_init_dialect): VLE support.
 527         (print_insn_big_powerpc): Call get_powerpc_dialect.
 528         (print_insn_little_powerpc): Likewise.
 529         (operand_value_powerpc): Handle negative shift counts.
 530         (print_insn_powerpc): Handle 2-byte instruction lengths.
 531
 532 2012-05-11  Daniel Richard G.  <skunk@iskunk.org>
 533
 534         PR binutils/14028
 535         * configure.in: Invoke ACX_HEADER_STRING.
 536         * configure: Regenerate.
 537         * config.in: Regenerate.
 538         * sysdep.h: If STRINGS_WITH_STRING is defined then include both
 539         string.h and strings.h.
 540
 541 2012-05-11  Nick Clifton  <nickc@redhat.com>
 542
 543         PR binutils/14006
 544         * arm-dis.c (print_insn): Fix detection of instruction mode in
 545         files containing multiple executable sections.
 546
 547 2012-05-03  Sean Keys  <skeys@ipdatasys.com>
 548
 549         * Makefile.in, configure: regenerate
 550         * disassemble.c (disassembler): Recognize ARCH_XGATE.
 551         * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
 552         New functions.
 553         * configure.in: Recognize xgate.
 554         * xgate-dis.c, xgate-opc.c: New files for support of xgate
 555         * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
 556         and opcode generation for xgate.
 557
 558 2012-04-30  DJ Delorie  <dj@redhat.com>
 559
 560         * rx-decode.opc (MOV): Do not sign-extend immediates which are
 561         already the maximum bit size.
 562         * rx-decode.c: Regenerate.
 563
 564 2012-04-27  David S. Miller  <davem@davemloft.net>
 565
 566         * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
 567         * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
 568
 569         * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
 570         * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
 571
 572         * sparc-opc.c (CBCOND): New define.
 573         (CBCOND_XCC): Likewise.
 574         (cbcond): New helper macro.
 575         (sparc_opcodes): Add compare-and-branch instructions.
 576
 577         * sparc-dis.c (print_insn_sparc): Handle ')'.
 578         * sparc-opc.c (sparc_opcodes): Add crypto instructions.
 579
 580         * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
 581         into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
 582
 583 2012-04-12  David S. Miller  <davem@davemloft.net>
 584
 585         * sparc-dis.c (X_DISP10): Define.
 586         (print_insn_sparc): Handle '='.
 587
 588 2012-04-01  Mike Frysinger  <vapier@gentoo.org>
 589
 590         * bfin-dis.c (fmtconst): Replace decimal handling with a single
 591         sprintf call and the '*' field width.
 592
 593 2012-03-23  Maxim Kuvyrkov  <maxim@codesourcery.com>
 594
 595         * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
 596
 597 2012-03-16  Alan Modra  <amodra@gmail.com>
 598
 599         * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
 600         (powerpc_opcd_indices): Bump array size.
 601         (disassemble_init_powerpc): Set powerpc_opcd_indices entries
 602         corresponding to unused opcodes to following entry.
 603         (lookup_powerpc): New function, extracted and optimised from..
 604         (print_insn_powerpc): ..here.
 605
 606 2012-03-15  Alan Modra  <amodra@gmail.com>
 607             James Lemke  <jwlemke@codesourcery.com>
 608
 609         * disassemble.c (disassemble_init_for_target): Handle ppc init.
 610         * ppc-dis.c (private): New var.
 611         (powerpc_init_dialect): Don't return calloc failure, instead use
 612         private.
 613         (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
 614         (powerpc_opcd_indices): New array.
 615         (disassemble_init_powerpc): New function.
 616         (print_insn_big_powerpc): Don't init dialect here.
 617         (print_insn_little_powerpc): Likewise.
 618         (print_insn_powerpc): Start search using powerpc_opcd_indices.
 619
 620 2012-03-10  Edmar Wienskoski  <edmar@freescale.com>
 621
 622         * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
 623         * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
 624         (PPCVEC2, PPCTMR, E6500): New short names.
 625         (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
 626         mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
 627         lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
 628         lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
 629         lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
 630         optional operands on sync instruction for E6500 target.
 631
 632 2012-03-08  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 633
 634         * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
 635
 636 2012-02-27  Alan Modra  <amodra@gmail.com>
 637
 638         * mt-dis.c: Regenerate.
 639
 640 2012-02-27  Alan Modra  <amodra@gmail.com>
 641
 642         * v850-opc.c (extract_v8): Rearrange to make it obvious this
 643         is the inverse of corresponding insert function.
 644         (extract_d22, extract_u9, extract_r4): Likewise.
 645         (extract_d9): Correct sign extension.
 646         (extract_d16_15): Don't assume "long" is 32 bits, and don't
 647         rely on implementation defined behaviour for shift right of
 648         signed types.
 649         (extract_d16_16, extract_d17_16, extract_i9): Likewise.
 650         (extract_d23): Likewise, and correct mask.
 651
 652 2012-02-27  Alan Modra  <amodra@gmail.com>
 653
 654         * crx-dis.c (print_arg): Mask constant to 32 bits.
 655         * crx-opc.c (cst4_map): Use int array.
 656
 657 2012-02-27  Alan Modra  <amodra@gmail.com>
 658
 659         * arc-dis.c (BITS): Don't use shifts to mask off bits.
 660         (FIELDD): Sign extend with xor,sub.
 661
 662 2012-02-25  Walter Lee  <walt@tilera.com>
 663
 664         * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
 665         * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
 666         TILEPRO_OPC_LW_TLS_SN.
 667
 668 2012-02-21  H.J. Lu  <hongjiu.lu@intel.com>
 669
 670         * i386-opc.h (HLEPrefixNone): New.
 671         (HLEPrefixLock): Likewise.
 672         (HLEPrefixAny): Likewise.
 673         (HLEPrefixRelease): Likewise.
 674
 675 2012-02-08  H.J. Lu  <hongjiu.lu@intel.com>
 676
 677         * i386-dis.c (HLE_Fixup1): New.
 678         (HLE_Fixup2): Likewise.
 679         (HLE_Fixup3): Likewise.
 680         (Ebh1): Likewise.
 681         (Evh1): Likewise.
 682         (Ebh2): Likewise.
 683         (Evh2): Likewise.
 684         (Ebh3): Likewise.
 685         (Evh3): Likewise.
 686         (MOD_C6_REG_7): Likewise.
 687         (MOD_C7_REG_7): Likewise.
 688         (RM_C6_REG_7): Likewise.
 689         (RM_C7_REG_7): Likewise.
 690         (XACQUIRE_PREFIX): Likewise.
 691         (XRELEASE_PREFIX): Likewise.
 692         (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
 693         cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
 694         Ebh2/Evh2 on xchg.  Use Ebh3/Evh3 on mov.
 695         (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
 696         not, or, sbb, sub and xor.  Use Ebh3/Evh3 on mov.  Use
 697         MOD_C6_REG_7 and MOD_C7_REG_7.
 698         (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
 699         (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7.  Add xend and
 700         xtest.
 701         (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
 702         (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
 703
 704         * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
 705         CPU_RTM_FLAGS.
 706         (cpu_flags): Add CpuHLE and CpuRTM.
 707         (opcode_modifiers): Add HLEPrefixOk.
 708
 709         * i386-opc.h (CpuHLE): New.
 710         (CpuRTM): Likewise.
 711         (HLEPrefixOk): Likewise.
 712         (i386_cpu_flags): Add cpuhle and cpurtm.
 713         (i386_opcode_modifier): Add hleprefixok.
 714
 715         * i386-opc.tbl: Add HLEPrefixOk=3 to mov.  Add HLEPrefixOk to
 716         add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
 717         sbb, sub, xor and xadd.  Add HLEPrefixOk=2 to xchg with memory
 718         operand.  Add xacquire, xrelease, xabort, xbegin, xend and
 719         xtest.
 720         * i386-init.h: Regenerated.
 721         * i386-tbl.h: Likewise.
 722
 723 2012-01-24  DJ Delorie  <dj@redhat.com>
 724
 725         * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
 726         * rl78-decode.c: Regenerate.
 727
 728 2012-01-17  James Murray  <jsm@jsm-net.demon.co.uk>
 729
 730         PR binutils/10173
 731         * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
 732
 733 2012-01-17  Andreas Schwab  <schwab@linux-m68k.org>
 734
 735         * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
 736         register and move them after pmove with PSR/PCSR register.
 737
 738 2012-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 739
 740         * i386-dis.c (mod_table): Add vmfunc.
 741
 742         * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
 743         (cpu_flags): CpuVMFUNC.
 744
 745         * i386-opc.h (CpuVMFUNC): New.
 746         (i386_cpu_flags): Add cpuvmfunc.
 747
 748         * i386-opc.tbl: Add vmfunc.
 749         * i386-init.h: Regenerated.
 750         * i386-tbl.h: Likewise.
 751
 752 For older changes see ChangeLog-2011
 753 \f
 754 Local Variables:
 755 mode: change-log
 756 left-margin: 8
 757 fill-column: 74
 758 version-control: never
 759 End: