Updated French translations
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2004-05-13 Nick Clifton <nickc@redhat.com>
2
3 * po/fr.po: Updated French translation.
4
5 2004-05-05 Peter Barada <peter@the-baradas.com>
6
7 * m68k-dis.c(print_insn_m68k): Add new chips, use core
8 variants in arch_mask. Only set m68881/68851 for 68k chips.
9 * m68k-op.c: Switch from ColdFire chips to core variants.
10
11 2004-05-05 Alan Modra <amodra@bigpond.net.au>
12
13 PR 146.
14 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
15
16 2004-04-29 Ben Elliston <bje@au.ibm.com>
17
18 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
19 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
20
21 2004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
22
23 * sh-dis.c (print_insn_sh): Print the value in constant pool
24 as a symbol if it looks like a symbol.
25
26 2004-04-22 Peter Barada <peter@the-baradas.com>
27
28 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
29 appropriate ColdFire architectures.
30 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
31 mask addressing.
32 Add EMAC instructions, fix MAC instructions. Remove
33 macmw/macml/msacmw/msacml instructions since mask addressing now
34 supported.
35
36 2004-04-20 Jakub Jelinek <jakub@redhat.com>
37
38 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
39 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
40 suffix. Use fmov*x macros, create all 3 fpsize variants in one
41 macro. Adjust all users.
42
43 2004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
44
45 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
46 separately.
47
48 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
49
50 * m32r-asm.c: Regenerate.
51
52 2004-03-29 Stan Shebs <shebs@apple.com>
53
54 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
55 used.
56
57 2004-03-19 Alan Modra <amodra@bigpond.net.au>
58
59 * aclocal.m4: Regenerate.
60 * config.in: Regenerate.
61 * configure: Regenerate.
62 * po/POTFILES.in: Regenerate.
63 * po/opcodes.pot: Regenerate.
64
65 2004-03-16 Alan Modra <amodra@bigpond.net.au>
66
67 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
68 PPC_OPERANDS_GPR_0.
69 * ppc-opc.c (RA0): Define.
70 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
71 (RAOPT): Rename from RAO. Update all uses.
72 (powerpc_opcodes): Use RA0 as appropriate.
73
74 2004-03-15 Aldy Hernandez <aldyh@redhat.com>
75
76 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
77
78 2004-03-15 Alan Modra <amodra@bigpond.net.au>
79
80 * sparc-dis.c (print_insn_sparc): Update getword prototype.
81
82 2004-03-12 Michal Ludvig <mludvig@suse.cz>
83
84 * i386-dis.c (GRPPLOCK): Delete.
85 (grps): Delete GRPPLOCK entry.
86
87 2004-03-12 Alan Modra <amodra@bigpond.net.au>
88
89 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
90 (M, Mp): Use OP_M.
91 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
92 (GRPPADLCK): Define.
93 (dis386): Use NOP_Fixup on "nop".
94 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
95 (twobyte_has_modrm): Set for 0xa7.
96 (padlock_table): Delete. Move to..
97 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
98 and clflush.
99 (print_insn): Revert PADLOCK_SPECIAL code.
100 (OP_E): Delete sfence, lfence, mfence checks.
101
102 2004-03-12 Jakub Jelinek <jakub@redhat.com>
103
104 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
105 (INVLPG_Fixup): New function.
106 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
107
108 2004-03-12 Michal Ludvig <mludvig@suse.cz>
109
110 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
111 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
112 (padlock_table): New struct with PadLock instructions.
113 (print_insn): Handle PADLOCK_SPECIAL.
114
115 2004-03-12 Alan Modra <amodra@bigpond.net.au>
116
117 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
118 (OP_E): Twiddle clflush to sfence here.
119
120 2004-03-08 Nick Clifton <nickc@redhat.com>
121
122 * po/de.po: Updated German translation.
123
124 2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
125
126 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
127 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
128 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
129 accordingly.
130
131 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
132
133 * frv-asm.c: Regenerate.
134 * frv-desc.c: Regenerate.
135 * frv-desc.h: Regenerate.
136 * frv-dis.c: Regenerate.
137 * frv-ibld.c: Regenerate.
138 * frv-opc.c: Regenerate.
139 * frv-opc.h: Regenerate.
140
141 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
142
143 * frv-desc.c, frv-opc.c: Regenerate.
144
145 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
146
147 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
148
149 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
150
151 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
152 Also correct mistake in the comment.
153
154 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
155
156 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
157 ensure that double registers have even numbers.
158 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
159 that reserved instruction 0xfffd does not decode the same
160 as 0xfdfd (ftrv).
161 * sh-opc.h: Add REG_N_D nibble type and use it whereever
162 REG_N refers to a double register.
163 Add REG_N_B01 nibble type and use it instead of REG_NM
164 in ftrv.
165 Adjust the bit patterns in a few comments.
166
167 2004-02-25 Aldy Hernandez <aldyh@redhat.com>
168
169 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
170
171 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
172
173 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
174
175 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
176
177 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
178
179 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
180
181 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
182 mtivor32, mtivor33, mtivor34.
183
184 2004-02-19 Aldy Hernandez <aldyh@redhat.com>
185
186 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
187
188 2004-02-10 Petko Manolov <petkan@nucleusys.com>
189
190 * arm-opc.h Maverick accumulator register opcode fixes.
191
192 2004-02-13 Ben Elliston <bje@wasabisystems.com>
193
194 * m32r-dis.c: Regenerate.
195
196 2004-01-27 Michael Snyder <msnyder@redhat.com>
197
198 * sh-opc.h (sh_table): "fsrra", not "fssra".
199
200 2004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
201
202 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
203 contraints.
204
205 2004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
206
207 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
208
209 2004-01-19 Alan Modra <amodra@bigpond.net.au>
210
211 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
212 1. Don't print scale factor on AT&T mode when index missing.
213
214 2004-01-16 Alexandre Oliva <aoliva@redhat.com>
215
216 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
217 when loaded into XR registers.
218
219 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
220
221 * frv-desc.h: Regenerate.
222 * frv-desc.c: Regenerate.
223 * frv-opc.c: Regenerate.
224
225 2004-01-13 Michael Snyder <msnyder@redhat.com>
226
227 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
228
229 2004-01-09 Paul Brook <paul@codesourcery.com>
230
231 * arm-opc.h (arm_opcodes): Move generic mcrr after known
232 specific opcodes.
233
234 2004-01-07 Daniel Jacobowitz <drow@mvista.com>
235
236 * Makefile.am (libopcodes_la_DEPENDENCIES)
237 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
238 comment about the problem.
239 * Makefile.in: Regenerate.
240
241 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
242
243 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
244 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
245 cut&paste errors in shifting/truncating numerical operands.
246 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
247 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
248 (parse_uslo16): Likewise.
249 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
250 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
251 (parse_s12): Likewise.
252 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
253 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
254 (parse_uslo16): Likewise.
255 (parse_uhi16): Parse gothi and gotfuncdeschi.
256 (parse_d12): Parse got12 and gotfuncdesc12.
257 (parse_s12): Likewise.
258
259 2004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
260
261 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
262 instruction which looks similar to an 'rla' instruction.
263
264 For older changes see ChangeLog-0203
265 \f
266 Local Variables:
267 mode: change-log
268 left-margin: 8
269 fill-column: 74
270 version-control: never
271 End:
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