opcodes/ChangeLog

   1 2011-04-21  DJ Delorie  <dj@redhat.com>
   2
   3         * rx-decode.opc (rx_decode_opcode): Set the syntax for multi-byte NOPs.
   4         * rx-decode.c: Regenerate.
   5
   6 2011-04-20  H.J. Lu  <hongjiu.lu@intel.com>
   7
   8         * i386-init.h: Regenerated.
   9
  10 2011-04-19  Quentin Neill  <quentin.neill@amd.com>
  11
  12         * i386-gen.c (cpu_flag_init): Remove 3dnow and 3dnowa bits
  13         from bdver1 flags.
  14
  15 2011-04-13  Nick Clifton  <nickc@redhat.com>
  16
  17         * v850-dis.c (disassemble): Always print a closing square brace if
  18         an opening square brace was printed.
  19
  20 2011-04-12  Nick Clifton  <nickc@redhat.com>
  21
  22         PR binutils/12534
  23         * arm-dis.c (thumb32_opcodes): Add %L suffix to LDRD and STRD insn
  24         patterns.
  25         (print_insn_thumb32): Handle %L.
  26
  27 2011-04-11  Julian Brown  <julian@codesourcery.com>
  28
  29         * arm-dis.c (psr_name): Fix typo for BASEPRI_MAX.
  30         (print_insn_thumb32): Add APSR bitmask support.
  31
  32 2011-04-07  Paul Carroll<pcarroll@codesourcery.com>
  33
  34         * arm-dis.c (print_insn): init vars moved into private_data structure.
  35
  36 2011-03-24  Mike Frysinger  <vapier@gentoo.org>
  37
  38         * bfin-dis.c (decode_dsp32mac_0): Move MM zeroing down to MAC0 logic.
  39
  40 2011-03-22  Eric B. Weddington  <eric.weddington@atmel.com>
  41
  42         * avr-dis.c (avr_operand): Add opcode_str parameter. Check for
  43         post-increment to support LPM Z+ instruction. Add support for 'E'
  44         constraint for DES instruction.
  45         (print_insn_avr): Adjust calls to avr_operand. Rename variable.
  46
  47 2011-03-14  Richard Sandiford  <richard.sandiford@linaro.org>
  48
  49         * arm-dis.c (get_sym_code_type): Treat STT_GNU_IFUNCs as code.
  50
  51 2011-03-14  Richard Sandiford  <richard.sandiford@linaro.org>
  52
  53         * arm-dis.c (get_sym_code_type): Don't check for STT_ARM_TFUNC.
  54         Use branch types instead.
  55         (print_insn): Likewise.
  56
  57 2011-02-28  Maciej W. Rozycki  <macro@codesourcery.com>
  58
  59         * mips-opc.c (mips_builtin_opcodes): Correct register use
  60         annotation of "alnv.ps".
  61
  62 2011-02-28  Maciej W. Rozycki  <macro@codesourcery.com>
  63
  64         * mips-opc.c (mips_builtin_opcodes): Add "pref" macro.
  65
  66 2011-02-22  Mike Frysinger  <vapier@gentoo.org>
  67
  68         * bfin-dis.c (OUTS): Remove p NULL check and txt NUL check.
  69
  70 2011-02-22  Mike Frysinger  <vapier@gentoo.org>
  71
  72         * bfin-dis.c (print_insn_bfin): Change outf->fprintf_func to OUTS.
  73
  74 2011-02-19  Mike Frysinger  <vapier@gentoo.org>
  75
  76         * bfin-dis.c (saved_state): Mark static.  Change a[01]x to ax[] and
  77         a[01]w to aw[].  Delete ac0, ac0_copy, ac1, an, aq, av0, av0s, av1,
  78         av1s, az, cc, v, v_copy, vs, rnd_mod, v_internal, pc, ticks, insts,
  79         exception, end_of_registers, msize, memory, bfd_mach.
  80         (CCREG, PCREG, A0XREG, A0WREG, A1XREG, A1WREG, LC0REG, LT0REG,
  81         LB0REG, LC1REG, LT1REG, LB1REG): Delete
  82         (AXREG, AWREG, LCREG, LTREG, LBREG): Define.
  83         (get_allreg): Change to new defines.  Fallback to abort().
  84
  85 2011-02-14  Mike Frysinger  <vapier@gentoo.org>
  86
  87         * bfin-dis.c: Add whitespace/parenthesis where needed.
  88
  89 2011-02-14  Mike Frysinger  <vapier@gentoo.org>
  90
  91         * bfin-dis.c (decode_LoopSetup_0): Return when reg is greater
  92         than 7.
  93
  94 2011-02-13  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
  95
  96         * configure: Regenerate.
  97
  98 2011-02-13  Mike Frysinger  <vapier@gentoo.org>
  99
 100         * bfin-dis.c (decode_dsp32alu_0): Fix typo with A1 reg.
 101
 102 2011-02-13  Mike Frysinger  <vapier@gentoo.org>
 103
 104         * bfin-dis.c (decode_dsp32mult_0): Add 1 to dst for mac1.  Output
 105         dregs only when P is set, and dregs_lo otherwise.
 106
 107 2011-02-13  Mike Frysinger  <vapier@gentoo.org>
 108
 109         * bfin-dis.c (decode_dsp32alu_0): Delete BYTEOP2M code.
 110
 111 2011-02-12  Mike Frysinger  <vapier@gentoo.org>
 112
 113         * bfin-dis.c (decode_pseudoDEBUG_0): Add space after PRNT.
 114
 115 2011-02-12  Mike Frysinger  <vapier@gentoo.org>
 116
 117         * bfin-dis.c (machine_registers): Delete REG_GP.
 118         (reg_names): Delete "GP".
 119         (decode_allregs): Change REG_GP to REG_LASTREG.
 120
 121 2011-02-12  Mike Frysinger  <vapier@gentoo.org>
 122
 123         * bfin-dis.c (M_S2RND, M_T, M_W32, M_FU, M_TFU, M_IS, M_ISS2,
 124         M_IH, M_IU): Delete.
 125
 126 2011-02-11  Mike Frysinger  <vapier@gentoo.org>
 127
 128         * bfin-dis.c (reg_names): Add const.
 129         (decode_dregs_lo, decode_dregs_hi, decode_dregs, decode_dregs_byte,
 130         decode_pregs, decode_iregs, decode_mregs, decode_dpregs, decode_gregs,
 131         decode_regs, decode_regs_lo, decode_regs_hi, decode_statbits,
 132         decode_counters, decode_allregs): Likewise.
 133
 134 2011-02-09  Michael Snyder  <msnyder@vmware.com>
 135
 136         * i386-dis.c (OP_J): Parenthesize expression to prevent
 137         truncated addresses.
 138         (print_insn): Fix indentation off-by-one.
 139
 140 2011-02-01  Nick Clifton  <nickc@redhat.com>
 141
 142         * po/da.po: Updated Danish translation.
 143
 144 2011-01-21  Dave Murphy  <davem@devkitpro.org>
 145
 146         * ppc-opc.c (NON32, NO371): Remove PPC_OPCODE_PPCPS.
 147
 148 2011-01-18  H.J. Lu  <hongjiu.lu@intel.com>
 149
 150         * i386-dis.c (sIbT): New.
 151         (b_T_mode): Likewise.
 152         (dis386): Replace sIb with sIbT on "pushT".
 153         (x86_64_table): Replace sIb with Ib on "aam" and "aad".
 154         (OP_sI): Handle b_T_mode.  Properly sign-extend byte.
 155
 156 2011-01-18  Jan Kratochvil  <jan.kratochvil@redhat.com>
 157
 158         * i386-init.h: Regenerated.
 159         * i386-tbl.h: Regenerated
 160
 161 2011-01-17  Quentin Neill  <quentin.neill@amd.com>
 162
 163         * i386-dis.c (REG_XOP_TBM_01): New.
 164         (REG_XOP_TBM_02): New.
 165         (reg_table): Add REG_XOP_TBM_01 and REG_XOP_TBM_02 tables.
 166         (xop_table): Redirect to REG_XOP_TBM_01 and REG_XOP_TBM_02
 167         entries, and add bextr instruction.
 168
 169         * i386-gen.c (cpu_flag_init): Add CPU_TBM_FLAGS, CpuTBM.
 170         (cpu_flags): Add CpuTBM.
 171
 172         * i386-opc.h (CpuTBM) New.
 173         (i386_cpu_flags): Add bit cputbm.
 174
 175         * i386-opc.tbl: Add bextr, blcfill, blci, blcic, blcmsk,
 176         blcs, blsfill, blsic, t1mskc, and tzmsk.
 177
 178 2011-01-12  DJ Delorie  <dj@redhat.com>
 179
 180         * rx-dis.c (print_insn_rx): Support RX_Operand_TwoReg.
 181
 182 2011-01-11  Mingjie Xing  <mingjie.xing@gmail.com>
 183
 184         * mips-dis.c (print_insn_args): Adjust the value to print the real
 185         offset for "+c" argument.
 186
 187 2011-01-10  Nick Clifton  <nickc@redhat.com>
 188
 189         * po/da.po: Updated Danish translation.
 190
 191 2011-01-05  Nathan Sidwell  <nathan@codesourcery.com>
 192
 193         * arm-dis.c (thumb32_opcodes): BLX must have bit zero clear.
 194
 195 2011-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 196
 197         * i386-dis.c (REG_VEX_38F3): New.
 198         (PREFIX_0FBC): Likewise.
 199         (PREFIX_VEX_38F2): Likewise.
 200         (PREFIX_VEX_38F3_REG_1): Likewise.
 201         (PREFIX_VEX_38F3_REG_2): Likewise.
 202         (PREFIX_VEX_38F3_REG_3): Likewise.
 203         (PREFIX_VEX_38F7): Likewise.
 204         (VEX_LEN_38F2_P_0): Likewise.
 205         (VEX_LEN_38F3_R_1_P_0): Likewise.
 206         (VEX_LEN_38F3_R_2_P_0): Likewise.
 207         (VEX_LEN_38F3_R_3_P_0): Likewise.
 208         (VEX_LEN_38F7_P_0): Likewise.
 209         (dis386_twobyte): Use PREFIX_0FBC.
 210         (reg_table): Add REG_VEX_38F3.
 211         (prefix_table): Add PREFIX_0FBC, PREFIX_VEX_38F2,
 212         PREFIX_VEX_38F3_REG_1, PREFIX_VEX_38F3_REG_2,
 213         PREFIX_VEX_38F3_REG_3 and PREFIX_VEX_38F7.
 214         (vex_table): Use PREFIX_VEX_38F2, REG_VEX_38F3 and
 215         PREFIX_VEX_38F7.
 216         (vex_len_table): Add VEX_LEN_38F2_P_0, VEX_LEN_38F3_R_1_P_0,
 217         VEX_LEN_38F3_R_2_P_0, VEX_LEN_38F3_R_3_P_0 and
 218         VEX_LEN_38F7_P_0.
 219
 220         * i386-gen.c (cpu_flag_init): Add CPU_BMI_FLAGS.
 221         (cpu_flags): Add CpuBMI.
 222
 223         * i386-opc.h (CpuBMI): New.
 224         (i386_cpu_flags): Add cpubmi.
 225
 226         * i386-opc.tbl: Add andn, bextr, blsi, blsmsk, blsr and tzcnt.
 227         * i386-init.h: Regenerated.
 228         * i386-tbl.h: Likewise.
 229
 230 2011-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 231
 232         * i386-dis.c (VexGdq): New.
 233         (OP_VEX): Handle dq_mode.
 234
 235 2011-01-01  H.J. Lu  <hongjiu.lu@intel.com>
 236
 237         * i386-gen.c (process_copyright): Update copyright to 2011.
 238
 239 For older changes see ChangeLog-2010
 240 \f
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