opcodes/ChangeLog

   1 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
   2
   3         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
   4         (extract_fxm): Don't test dialect.
   5         (XFXFXM_MASK): Include the power4 bit.
   6         (XFXM): Add p4 param.
   7         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
   8
   9 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
  10
  11         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
  12         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
  13
  14 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
  15
  16         * ppc-opc.c (BH, XLBH_MASK): Define.
  17         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
  18
  19 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
  20
  21         * i386-dis.c (x_mode): Comment.
  22         (two_source_ops): File scope.
  23         (float_mem): Correct fisttpll and fistpll.
  24         (float_mem_mode): New table.
  25         (dofloat): Use it.
  26         (OP_E): Correct intel mode PTR output.
  27         (ptr_reg): Use open_char and close_char.
  28         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
  29         operands.  Set two_source_ops.
  30
  31 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
  32
  33         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
  34         instead of _raw_size.
  35
  36 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
  37
  38         * ia64-gen.c (in_iclass): Handle more postinc st
  39         and ld variants.
  40         * ia64-asmtab.c: Rebuilt.
  41
  42 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
  43
  44         * s390-opc.txt: Correct architecture mask for some opcodes.
  45         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
  46         in the esa mode as well.
  47
  48 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
  49
  50         * sh-dis.c (target_arch): Make unsigned.
  51         (print_insn_sh): Replace (most of) switch with a call to
  52         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
  53         * sh-opc.h: Redefine architecture flags values.
  54         Add sh3-nommu architecture.
  55         Reorganise <arch>_up macros so they make more visual sense.
  56         (SH_MERGE_ARCH_SET): Define new macro.
  57         (SH_VALID_BASE_ARCH_SET): Likewise.
  58         (SH_VALID_MMU_ARCH_SET): Likewise.
  59         (SH_VALID_CO_ARCH_SET): Likewise.
  60         (SH_VALID_ARCH_SET): Likewise.
  61         (SH_MERGE_ARCH_SET_VALID): Likewise.
  62         (SH_ARCH_SET_HAS_FPU): Likewise.
  63         (SH_ARCH_SET_HAS_DSP): Likewise.
  64         (SH_ARCH_UNKNOWN_ARCH): Likewise.
  65         (sh_get_arch_from_bfd_mach): Add prototype.
  66         (sh_get_arch_up_from_bfd_mach): Likewise.
  67         (sh_get_bfd_mach_from_arch_set): Likewise.
  68         (sh_merge_bfd_arc): Likewise.
  69
  70 2004-05-24  Peter Barada  <peter@the-baradas.com>
  71
  72         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
  73         into new match_insn_m68k function.  Loop over canidate
  74         matches and select first that completely matches.
  75         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
  76         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
  77         to verify addressing for MAC/EMAC.
  78         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
  79         reigster halves since 'fpu' and 'spl' look misleading.
  80         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
  81         * m68k-opc.c: Rearragne mac/emac cases to use longest for
  82         first, tighten up match masks.
  83         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
  84         'size' from special case code in print_insn_m68k to
  85         determine decode size of insns.
  86
  87 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
  88
  89         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
  90         well as when -mpower4.
  91
  92 2004-05-13  Nick Clifton  <nickc@redhat.com>
  93
  94         * po/fr.po: Updated French translation.
  95
  96 2004-05-05  Peter Barada  <peter@the-baradas.com>
  97
  98         * m68k-dis.c(print_insn_m68k): Add new chips, use core
  99         variants in arch_mask.  Only set m68881/68851 for 68k chips.
 100         * m68k-op.c: Switch from ColdFire chips to core variants.
 101
 102 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
 103
 104         PR 147.
 105         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
 106
 107 2004-04-29  Ben Elliston  <bje@au.ibm.com>
 108
 109         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
 110         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
 111
 112 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
 113
 114         * sh-dis.c (print_insn_sh): Print the value in constant pool
 115         as a symbol if it looks like a symbol.
 116
 117 2004-04-22  Peter Barada <peter@the-baradas.com>
 118
 119         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
 120         appropriate ColdFire architectures.
 121         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
 122         mask addressing.
 123         Add EMAC instructions, fix MAC instructions. Remove
 124         macmw/macml/msacmw/msacml instructions since mask addressing now
 125         supported.
 126
 127 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
 128
 129         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
 130         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
 131         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
 132         macro.  Adjust all users.
 133
 134 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
 135
 136         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
 137         separately.
 138
 139 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 140
 141         * m32r-asm.c: Regenerate.
 142
 143 2004-03-29  Stan Shebs  <shebs@apple.com>
 144
 145         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
 146         used.
 147
 148 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
 149
 150         * aclocal.m4: Regenerate.
 151         * config.in: Regenerate.
 152         * configure: Regenerate.
 153         * po/POTFILES.in: Regenerate.
 154         * po/opcodes.pot: Regenerate.
 155
 156 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
 157
 158         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
 159         PPC_OPERANDS_GPR_0.
 160         * ppc-opc.c (RA0): Define.
 161         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
 162         (RAOPT): Rename from RAO.  Update all uses.
 163         (powerpc_opcodes): Use RA0 as appropriate.
 164
 165 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
 166
 167         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
 168
 169 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
 170
 171         * sparc-dis.c (print_insn_sparc): Update getword prototype.
 172
 173 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 174
 175         * i386-dis.c (GRPPLOCK): Delete.
 176         (grps): Delete GRPPLOCK entry.
 177
 178 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 179
 180         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
 181         (M, Mp): Use OP_M.
 182         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
 183         (GRPPADLCK): Define.
 184         (dis386): Use NOP_Fixup on "nop".
 185         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
 186         (twobyte_has_modrm): Set for 0xa7.
 187         (padlock_table): Delete.  Move to..
 188         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
 189         and clflush.
 190         (print_insn): Revert PADLOCK_SPECIAL code.
 191         (OP_E): Delete sfence, lfence, mfence checks.
 192
 193 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
 194
 195         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
 196         (INVLPG_Fixup): New function.
 197         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
 198
 199 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 200
 201         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
 202         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
 203         (padlock_table): New struct with PadLock instructions.
 204         (print_insn): Handle PADLOCK_SPECIAL.
 205
 206 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 207
 208         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
 209         (OP_E): Twiddle clflush to sfence here.
 210
 211 2004-03-08  Nick Clifton  <nickc@redhat.com>
 212
 213         * po/de.po: Updated German translation.
 214
 215 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
 216
 217         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
 218         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
 219         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
 220         accordingly.
 221
 222 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 223
 224         * frv-asm.c: Regenerate.
 225         * frv-desc.c: Regenerate.
 226         * frv-desc.h: Regenerate.
 227         * frv-dis.c: Regenerate.
 228         * frv-ibld.c: Regenerate.
 229         * frv-opc.c: Regenerate.
 230         * frv-opc.h: Regenerate.
 231
 232 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 233
 234         * frv-desc.c, frv-opc.c: Regenerate.
 235
 236 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 237
 238         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
 239
 240 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
 241
 242         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
 243         Also correct mistake in the comment.
 244
 245 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
 246
 247         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
 248         ensure that double registers have even numbers.
 249         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
 250         that reserved instruction 0xfffd does not decode the same
 251         as 0xfdfd (ftrv).
 252         * sh-opc.h: Add REG_N_D nibble type and use it whereever
 253         REG_N refers to a double register.
 254         Add REG_N_B01 nibble type and use it instead of REG_NM
 255         in ftrv.
 256         Adjust the bit patterns in a few comments.
 257
 258 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
 259
 260         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
 261
 262 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 263
 264         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
 265
 266 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 267
 268         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
 269
 270 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 271
 272         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
 273         mtivor32, mtivor33, mtivor34.
 274
 275 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
 276
 277         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
 278
 279 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
 280
 281         * arm-opc.h Maverick accumulator register opcode fixes.
 282
 283 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
 284
 285         * m32r-dis.c: Regenerate.
 286
 287 2004-01-27  Michael Snyder  <msnyder@redhat.com>
 288
 289         * sh-opc.h (sh_table): "fsrra", not "fssra".
 290
 291 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
 292
 293         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
 294         contraints.
 295
 296 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
 297
 298         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
 299
 300 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
 301
 302         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
 303         1.  Don't print scale factor on AT&T mode when index missing.
 304
 305 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
 306
 307         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
 308         when loaded into XR registers.
 309
 310 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
 311
 312         * frv-desc.h: Regenerate.
 313         * frv-desc.c: Regenerate.
 314         * frv-opc.c: Regenerate.
 315
 316 2004-01-13  Michael Snyder  <msnyder@redhat.com>
 317
 318         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
 319
 320 2004-01-09  Paul Brook  <paul@codesourcery.com>
 321
 322         * arm-opc.h (arm_opcodes): Move generic mcrr after known
 323         specific opcodes.
 324
 325 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
 326
 327         * Makefile.am (libopcodes_la_DEPENDENCIES)
 328         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
 329         comment about the problem.
 330         * Makefile.in: Regenerate.
 331
 332 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
 333
 334         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
 335         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
 336         cut&paste errors in shifting/truncating numerical operands.
 337         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
 338         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
 339         (parse_uslo16): Likewise.
 340         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
 341         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
 342         (parse_s12): Likewise.
 343         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
 344         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
 345         (parse_uslo16): Likewise.
 346         (parse_uhi16): Parse gothi and gotfuncdeschi.
 347         (parse_d12): Parse got12 and gotfuncdesc12.
 348         (parse_s12): Likewise.
 349
 350 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
 351
 352         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
 353         instruction which looks similar to an 'rla' instruction.
 354
 355 For older changes see ChangeLog-0203
 356 \f
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