opcodes/ChangeLog

   1 2012-10-15  Yufeng Zhang  <yufeng.zhang@arm.com>
   2
   3         * aarch64-opc.c (operand_general_constraint_met_p): Change to check
   4         the alignment of addr.offset.imm instead of that of shifter.amount for
   5         operand type AARCH64_OPND_ADDR_UIMM12.
   6
   7 2012-10-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
   8
   9         * arm-dis.c: Use preferred form of vrint instruction variants
  10         for disassembly.
  11
  12 2012-10-09  Nagajyothi Eggone  <nagajyothi.eggone@amd.com>
  13
  14         * i386-gen.c (cpu_flag_init): Add CPU_BDVER3_FLAGS.
  15         * i386-init.h: Regenerated.
  16
  17 2012-10-05  Peter Bergner  <bergner@vnet.ibm.com>
  18
  19         * ppc-dis.c (ppc_opts) <altivec>: Use PPC_OPCODE_ALTIVEC2;
  20         * ppc-opc.c (VBA): New define.
  21         (powerpc_opcodes) <vcuxwfp, vcsxwfp, vcfpuxws, vcfpsxsw, vmr, vnot,
  22         mfppr, mfppr32, mtppr, mtppr32>: New extended mnemonics.
  23
  24 2012-10-04  Nick Clifton  <nickc@redhat.com>
  25
  26         * v850-dis.c (disassemble): Place square parentheses around second
  27         register operand of clr1, not1, set1 and tst1 instructions.
  28
  29 2012-10-04  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
  30
  31         * s390-mkopc.c: Support new option zEC12.
  32         * s390-opc.c: Add new instruction formats.
  33         * s390-opc.txt: Add new instructions for zEC12.
  34
  35 2012-09-27  Anthony Green  <green@moxielogic.com>
  36
  37         * moxie-dis.c (print_insn_moxie): Print 'bad' instructions.
  38         * moxie-opc.c: All 'bad' instructions have the itype MOXIE_BAD.
  39
  40 2012-09-25  Saravanan Ekanathan <saravanan.ekanathan@amd.com>
  41
  42         * i386-gen.c (cpu_flag_init): Add missing Cpu flags in
  43         CPU_BDVER1_FLAGS, CPU_BDVER2_FLAGS, CPU_BTVER1_FLAGS
  44         and CPU_BTVER2_FLAGS.
  45         * i386-init.h: Regenerated.
  46
  47 2012-09-20  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
  48
  49         * i386-gen.c (cpu_flag_init): Add CpuCX16 to CPU_NOCONA_FLAGS,
  50         CPU_CORE_FLAGS, CPU_CORE2_FLAGS, CPU_COREI7_FLAGS,
  51         CPU_BDVER1_FLAGS, CPU_BDVER2_FLAGS, CPU_BTVER1_FLAGS,
  52         CPU_BTVER2_FLAGS.  Add CPU_CX16_FLAGS.
  53         (cpu_flags): Add CpuCX16.
  54         * i386-opc.h (CpuCX16): New.
  55         (i386_cpu_flags): Add cpucx16.
  56         * i386-opc.tbl: Replace CpuSSE3 with CpuCX16 for cmpxchg16b.
  57         * i386-tbl.h: Regenerate.
  58         * i386-init.h: Likewise.
  59
  60 2012-09-18  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
  61
  62         * arm-dis.c: Changed ldra and strl-form mnemonics
  63         to lda and stl-form.
  64
  65 2012-09-18  Chao-ying Fu  <fu@mips.com>
  66
  67         * micromips-opc.c (micromips_opcodes): Correct the encoding of
  68         the "swxc1" instruction.
  69
  70 2012-09-17  Yufeng Zhang  <yufeng.zhang@arm.com>
  71
  72         * aarch64-asm.c (aarch64_ins_imm_half): Remove ATTRIBUTE_UNUSED from
  73         the parameter 'inst'.
  74         (aarch64_ins_addr_simm): Add ATTRIBUTE_UNUSED to the parameter 'inst'.
  75         (convert_mov_to_movewide): Change to assert (0) when
  76         aarch64_wide_constant_p returns FALSE.
  77
  78 2012-09-14  David Edelsohn  <dje.gcc@gmail.com>
  79
  80         * configure: Regenerate.
  81
  82 2012-09-14  Anthony Green  <green@moxielogic.com>
  83
  84         * moxie-dis.c (print_insn_moxie): Branch targets are relative to
  85         the address after the branch instruction.
  86
  87 2012-09-13  Anthony Green  <green@moxielogic.com>
  88
  89         * moxie-dis.c (print_insn_moxie): Handle bi-endian encodings.
  90
  91 2012-09-10  Matthias Klose  <doko@ubuntu.com>
  92
  93         * config.in: Disable sanity check for kfreebsd.
  94
  95 2012-09-10  H.J. Lu  <hongjiu.lu@intel.com>
  96
  97         * configure: Regenerated.
  98
  99 2012-09-04  Sergey A. Guriev <sergey.a.guriev@intel.com>
 100
 101         * ia64-asmtab.h (completer_index): Extend bitfield to full uint.
 102         * ia64-gen.c: Promote completer index type to longlong.
 103         (irf_operand): Add new register recognition.
 104         (in_iclass_mov_x): Add an entry for the new mov_* instruction type.
 105         (lookup_specifier): Add new resource recognition.
 106         (insert_bit_table_ent): Relax abort condition according to the
 107         changed completer index type.
 108         (print_dis_table): Fix printf format for completer index.
 109         * ia64-ic.tbl: Add a new instruction class.
 110         * ia64-opc-i.c (ia64_opcodes_i): Define new I-instructions.
 111         * ia64-opc-m.c (ia64_opcodes_m): Define new M-instructions.
 112         * ia64-opc.h: Define short names for new operand types.
 113         * ia64-raw.tbl: Add new RAW resource for DAHR register.
 114         * ia64-waw.tbl: Add new WAW resource for DAHR register.
 115         * ia64-asmtab.c: Regenerate.
 116
 117 2012-08-29  Peter Bergner  <bergner@vnet.ibm.com>
 118
 119         * ppc-opc.c (VXASHB_MASK): New define.
 120         (powerpc_opcodes) <vsldoi>: Use VXASHB_MASK.
 121
 122 2012-08-28  Peter Bergner  <bergner@vnet.ibm.com>
 123
 124         * ppc-opc.c (UIMM4, UIMM3, UIMM2, VXVA_MASK, VXVB_MASK, VXVAVB_MASK,
 125         VXVDVA_MASK, VXUIMM4_MASK, VXUIMM3_MASK, VXUIMM2_MASK): New defines.
 126         (powerpc_opcodes) <vexptefp, vlogefp, vrefp, vrfim, vrfin, vrfip,
 127         vrfiz, vrsqrtefp, vupkhpx, vupkhsb, vupkhsh, vupklpx, vupklsb,
 128         vupklsh>: Use VXVA_MASK.
 129         <vspltisb, vspltish, vspltisw>: Use VXVB_MASK.
 130         <mfvscr>: Use VXVAVB_MASK.
 131         <mtvscr>: Use VXVDVA_MASK.
 132         <vspltb>: Use VXUIMM4_MASK.
 133         <vsplth>: Use VXUIMM3_MASK.
 134         <vspltw>: Use VXUIMM2_MASK.
 135
 136 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 137
 138         * arm-dis.c (neon_opcodes): Add 2 operand sha instructions.
 139
 140 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 141
 142         * arm-dis.c (neon_opcodes): Add SHA 3-operand instructions.
 143
 144 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 145
 146         * arm-dis.c (neon_opcodes): Handle VMULL.P64.
 147
 148 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 149
 150         * arm-dis.c (neon_opcodes): Add support for AES instructions.
 151
 152 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 153
 154         * arm-dis.c (coprocessor_opcodes): Add support for HP/DP
 155         conversions.
 156
 157 2012-08-24  Matthew  Gretton-Dann  <matthew.gretton-dann@arm.com>
 158
 159         * arm-dis.c (coprocessor_opcodes): Add VRINT.
 160         (neon_opcodes): Likewise.
 161
 162 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 163
 164         * arm-dis.c (coprocessor_opcodes): Add support for new VCVT
 165         variants.
 166         (neon_opcodes): Likewise.
 167
 168 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 169
 170         * arm-dis.c (coprocessor_opcodes): Add VMAXNM/VMINNM.
 171         (neon_opcodes): Likewise.
 172
 173 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 174
 175         * arm-dis.c (coprocessor_opcodes): Add VSEL.
 176         (print_insn_coprocessor): Add new %<>c bitfield format
 177         specifier.
 178
 179 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 180
 181         * arm-dis.c (arm_opcodes): Add LDRA/STRL instructions.
 182         (thumb32_opcodes): Likewise.
 183         (print_arm_insn): Add support for %<>T formatter.
 184
 185 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 186
 187         * arm-dis.c (arm_opcodes): Add HLT.
 188         (thumb_opcodes): Likewise.
 189
 190 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 191
 192         * arm-dis.c (thumb32_opcodes): Add DCPS instruction.
 193
 194 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 195
 196         * arm-dis.c (arm_opcodes): Add SEVL.
 197         (thumb_opcodes): Likewise.
 198         (thumb32_opcodes): Likewise.
 199
 200 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 201
 202         * arm-dis.c (data_barrier_option): New function.
 203         (print_insn_arm): Use data_barrier_option.
 204         (print_insn_thumb32): Use data_barrier_option.
 205
 206 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com
 207
 208         * arm-dis.c (COND_UNCOND): New constant.
 209         (print_insn_coprocessor): Add support for %u format specifier.
 210         (print_insn_neon): Likewise.
 211
 212 2012-08-21  David S. Miller  <davem@davemloft.net>
 213
 214         * sparc-opc.c (4-argument crypto instructions): Fix encoding using
 215         F3F4 macro.
 216
 217 2012-08-20  Edmar Wienskoski  <edmar@freescale.com>
 218
 219         * ppc-opc.c (powerpc_opcodes): Changed opcode for vabsdub,
 220         vabsduh, vabsduw, mviwsplt.
 221
 222 2012-08-17  Nagajyothi Eggone  <nagajyothi.eggone@amd.com>
 223
 224         * i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and
 225         CPU_BTVER2_FLAGS.
 226
 227         * i386-opc.h: Update CpuPRFCHW comment.
 228
 229         * i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW.
 230         * i386-init.h: Regenerated.
 231         * i386-tbl.h: Likewise.
 232
 233 2012-08-17  Nick Clifton  <nickc@redhat.com>
 234
 235         * po/uk.po: New Ukranian translation.
 236         * configure.in (ALL_LINGUAS): Add uk.
 237         * configure: Regenerate.
 238
 239 2012-08-16  Peter Bergner  <bergner@vnet.ibm.com>
 240
 241         * ppc-opc.c (powerpc_opcodes) <"lswx">: Use RAX for the second and
 242         RBX for the third operand.
 243         <"lswi">: Use RAX for second and NBI for the third operand.
 244
 245 2012-08-15  DJ Delorie  <dj@redhat.com>
 246
 247         * rl78-decode.opc (rl78_decode_opcode): Merge %e and %[01]
 248         operands, so that data addresses can be corrected when not
 249         ES-overridden.
 250         * rl78-decode.c: Regenerate.
 251         * rl78-dis.c (print_insn_rl78): Make order of modifiers
 252         irrelevent.  When the 'e' specifier is used on an operand and no
 253         ES prefix is provided, adjust address to make it absolute.
 254
 255 2012-08-15  Peter Bergner  <bergner@vnet.ibm.com>
 256
 257         * ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR.
 258
 259 2012-08-15  Peter Bergner  <bergner@vnet.ibm.com>
 260
 261         * ppc-opc.c <xnop, yield, mdoio, mdoom>: New extended mnemonics.
 262
 263 2012-08-14  Maciej W. Rozycki  <macro@codesourcery.com>
 264
 265         * mips-dis.c (print_insn_args): Add GET_OP and GET_OP_S local
 266         macros, use local variables for info struct member accesses,
 267         update the type of the variable used to hold the instruction
 268         word.
 269         (print_insn_mips, print_mips16_insn_arg): Likewise.
 270         (print_insn_mips16): Add GET_OP and GET_OP_S local macros, use
 271         local variables for info struct member accesses.
 272         (print_insn_micromips): Add GET_OP_S local macro.
 273         (_print_insn_mips): Update the type of the variable used to hold
 274         the instruction word.
 275
 276 2012-08-13  Ian Bolton  <ian.bolton@arm.com>
 277             Laurent Desnogues  <laurent.desnogues@arm.com>
 278             Jim MacArthur  <jim.macarthur@arm.com>
 279             Marcus Shawcroft  <marcus.shawcroft@arm.com>
 280             Nigel Stephens  <nigel.stephens@arm.com>
 281             Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 282             Richard Earnshaw  <rearnsha@arm.com>
 283             Sofiane Naci  <sofiane.naci@arm.com>
 284             Tejas Belagod  <tejas.belagod@arm.com>
 285             Yufeng Zhang  <yufeng.zhang@arm.com>
 286
 287         * Makefile.am: Add AArch64.
 288         * Makefile.in: Regenerate.
 289         * aarch64-asm.c: New file.
 290         * aarch64-asm.h: New file.
 291         * aarch64-dis.c: New file.
 292         * aarch64-dis.h: New file.
 293         * aarch64-gen.c: New file.
 294         * aarch64-opc.c: New file.
 295         * aarch64-opc.h: New file.
 296         * aarch64-tbl.h: New file.
 297         * configure.in: Add AArch64.
 298         * configure: Regenerate.
 299         * disassemble.c: Add AArch64.
 300         * aarch64-asm-2.c: New file (automatically generated).
 301         * aarch64-dis-2.c: New file (automatically generated).
 302         * aarch64-opc-2.c: New file (automatically generated).
 303         * po/POTFILES.in: Regenerate.
 304
 305 2012-08-13  Maciej W. Rozycki  <macro@codesourcery.com>
 306
 307         * micromips-opc.c (micromips_opcodes): Update comment.
 308         * mips-opc.c (mips_builtin_opcodes): Likewise.  Mark coprocessor
 309         instructions for IOCT as appropriate.
 310         * mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with
 311         opcode_is_member.
 312         * configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with
 313         the result of a check for the -Wno-missing-field-initializers
 314         GCC option.
 315         * Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable.
 316         (mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to
 317         compilation.
 318         (mips16-opc.lo): Likewise.
 319         (micromips-opc.lo): Likewise.
 320         * aclocal.m4: Regenerate.
 321         * configure: Regenerate.
 322         * Makefile.in: Regenerate.
 323
 324 2012-08-11  Saravanan Ekanathan <saravanan.ekanathan@amd.com>
 325
 326         PR gas/14423
 327         * i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS.
 328         * i386-init.h: Regenerated.
 329
 330 2012-08-09  Nick Clifton  <nickc@redhat.com>
 331
 332         * po/vi.po: Updated Vietnamese translation.
 333
 334 2012-08-07  Roland McGrath  <mcgrathr@google.com>
 335
 336         * i386-dis.c (reg_table): Fill out REG_0F0D table with
 337         AMD-reserved cases as "prefetch".
 338         (MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants.
 339         (MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise.
 340         (reg_table): Use those under REG_0F18.
 341         (mod_table): Add those cases as "nop/reserved".
 342
 343 2012-08-07  Jan Beulich <jbeulich@suse.com>
 344
 345         * i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
 346
 347 2012-08-06  Roland McGrath  <mcgrathr@google.com>
 348
 349         * i386-dis.c (print_insn): Print spaces between multiple excess
 350         prefixes.  Return actual number of excess prefixes consumed,
 351         not always one.
 352
 353         * i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
 354
 355 2012-08-06  Roland McGrath  <mcgrathr@google.com>
 356             Victor Khimenko  <khim@google.com>
 357             H.J. Lu  <hongjiu.lu@intel.com>
 358
 359         * i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG.
 360         (putop): For 'T', 'U', and 'V', treat REX_W like DFLAG.
 361         (intel_operand_size): For stack_v_mode, treat REX_W like DFLAG.
 362         (OP_E_register): Likewise.
 363         (OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
 364
 365 2012-08-02  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 366
 367         * configure.in: Formatting.
 368         * configure: Regenerate.
 369
 370 2012-08-01  Alan Modra  <amodra@gmail.com>
 371
 372         * h8300-dis.c: Fix printf arg warnings.
 373         * i960-dis.c: Likewise.
 374         * mips-dis.c: Likewise.
 375         * pdp11-dis.c: Likewise.
 376         * sh-dis.c: Likewise.
 377         * v850-dis.c: Likewise.
 378         * configure.in: Formatting.
 379         * configure: Regenerate.
 380         * rl78-decode.c: Regenerate.
 381         * po/POTFILES.in: Regenerate.
 382
 383 2012-07-31  Chao-Ying Fu  <fu@mips.com>
 384             Catherine Moore  <clm@codesourcery.com>
 385             Maciej W. Rozycki  <macro@codesourcery.com>
 386
 387         * micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
 388         (DSP_VOLA): Likewise.
 389         (D32, D33): Likewise.
 390         (micromips_opcodes): Add DSP ASE instructions.
 391         * mips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
 392         <'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
 393
 394 2012-07-31  Jan Beulich <jbeulich@suse.com>
 395
 396         * i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2
 397         instruction group. Mark as requiring AVX2.
 398         * i386-tbl.h: Re-generate.
 399
 400 2012-07-30  Nick Clifton  <nickc@redhat.com>
 401
 402         * po/opcodes.pot: Updated template.
 403         * po/es.po: Updated Spanish translation.
 404         * po/fi.po: Updated Finnish translation.
 405
 406 2012-07-27  Mike Frysinger  <vapier@gentoo.org>
 407
 408         * configure.in (BFD_VERSION): Run bfd/configure --version and
 409         parse the output of that.
 410         * configure: Regenerate.
 411
 412 2012-07-25  James Lemke  <jwlemke@codesourcery.com>
 413
 414         * ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
 415
 416 2012-07-24  Stephan McCamant  <smcc@cs.berkeley.edu>
 417             Dr David Alan Gilbert  <dave@treblig.org>
 418
 419         PR binutils/13135
 420         * arm-dis.c: Add necessary casts for printing integer values.
 421         Use %s when printing string values.
 422         * hppa-dis.c: Likewise.
 423         * m68k-dis.c: Likewise.
 424         * microblaze-dis.c: Likewise.
 425         * mips-dis.c: Likewise.
 426         * sparc-dis.c: Likewise.
 427
 428 2012-07-19  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 429
 430         PR binutils/14355
 431         * i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
 432         (VEX_LEN_0FXOP_08_CD): Likewise.
 433         (VEX_LEN_0FXOP_08_CE): Likewise.
 434         (VEX_LEN_0FXOP_08_CF): Likewise.
 435         (VEX_LEN_0FXOP_08_EC): Likewise.
 436         (VEX_LEN_0FXOP_08_ED): Likewise.
 437         (VEX_LEN_0FXOP_08_EE): Likewise.
 438         (VEX_LEN_0FXOP_08_EF): Likewise.
 439         (xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
 440         vpcomub, vpcomuw, vpcomud, vpcomuq.
 441         (vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
 442         VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
 443         VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
 444         VEX_LEN_0FXOP_08_EF.
 445
 446 2012-07-16  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 447
 448         * i386-dis.c (PREFIX_0F38F6): New.
 449         (prefix_table): Add adcx, adox instructions.
 450         (three_byte_table): Use PREFIX_0F38F6.
 451         (mod_table): Add rdseed instruction.
 452         * i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
 453         (cpu_flags): Likewise.
 454         * i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
 455         (i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
 456         * i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
 457         prefetchw.
 458         * i386-tbl.h: Regenerate.
 459         * i386-init.h: Likewise.
 460
 461 2012-07-05  Thomas Schwinge  <thomas@codesourcery.com>
 462
 463         * mips-dis.c: Remove gratuitous newline.
 464
 465 2012-07-05  Sean Keys  <skeys@ipdatasys.com>
 466
 467         * xgate-dis.c: Removed an IF statement that will
 468         always be false due to overlapping operand masks.
 469         * xgate-opc.c: Corrected 'com' opcode entry and
 470         fixed spacing.
 471
 472 2012-07-02  Roland McGrath  <mcgrathr@google.com>
 473
 474         * i386-opc.tbl: Add RepPrefixOk to nop.
 475         * i386-tbl.h: Regenerate.
 476
 477 2012-06-28  Nick Clifton  <nickc@redhat.com>
 478
 479         * po/vi.po: Updated Vietnamese translation.
 480
 481 2012-06-22  Roland McGrath  <mcgrathr@google.com>
 482
 483         * i386-opc.tbl: Add RepPrefixOk to ret.
 484         * i386-tbl.h: Regenerate.
 485
 486         * i386-opc.h (RepPrefixOk): New enum constant.
 487         (i386_opcode_modifier): New bitfield 'repprefixok'.
 488         * i386-gen.c (opcode_modifiers): Add RepPrefixOk.
 489         * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
 490         instructions that have IsString.
 491         * i386-tbl.h: Regenerate.
 492
 493 2012-06-11  Andreas Schwab  <schwab@linux-m68k.org>
 494
 495         * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
 496         (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
 497         (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
 498         (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
 499         (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
 500         (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
 501         (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
 502         (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
 503         (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
 504
 505 2012-05-19  Alan Modra  <amodra@gmail.com>
 506
 507         * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
 508         (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
 509
 510 2012-05-18  Alan Modra  <amodra@gmail.com>
 511
 512         * ia64-opc.c: Remove #include "ansidecl.h".
 513         * z8kgen.c: Include sysdep.h first.
 514
 515         * arc-dis.c: Include sysdep.h first, remove some redundant includes.
 516         * bfin-dis.c: Likewise.
 517         * i860-dis.c: Likewise.
 518         * ia64-dis.c: Likewise.
 519         * ia64-gen.c: Likewise.
 520         * m68hc11-dis.c: Likewise.
 521         * mmix-dis.c: Likewise.
 522         * msp430-dis.c: Likewise.
 523         * or32-dis.c: Likewise.
 524         * rl78-dis.c: Likewise.
 525         * rx-dis.c: Likewise.
 526         * tic4x-dis.c: Likewise.
 527         * tilegx-opc.c: Likewise.
 528         * tilepro-opc.c: Likewise.
 529         * rx-decode.c: Regenerate.
 530
 531 2012-05-17  James Lemke  <jwlemke@codesourcery.com>
 532
 533         * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
 534
 535 2012-05-17  James Lemke  <jwlemke@codesourcery.com>
 536
 537         * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
 538
 539 2012-05-17  Daniel Richard G.  <skunk@iskunk.org>
 540             Nick Clifton  <nickc@redhat.com>
 541
 542         PR 14072
 543         * configure.in: Add check that sysdep.h has been included before
 544         any system header files.
 545         * configure: Regenerate.
 546         * config.in: Regenerate.
 547         * sysdep.h: Generate an error if included before config.h.
 548         * alpha-opc.c: Include sysdep.h before any other header file.
 549         * alpha-dis.c: Likewise.
 550         * avr-dis.c: Likewise.
 551         * cgen-opc.c: Likewise.
 552         * cr16-dis.c: Likewise.
 553         * cris-dis.c: Likewise.
 554         * crx-dis.c: Likewise.
 555         * d10v-dis.c: Likewise.
 556         * d10v-opc.c: Likewise.
 557         * d30v-dis.c: Likewise.
 558         * d30v-opc.c: Likewise.
 559         * h8500-dis.c: Likewise.
 560         * i370-dis.c: Likewise.
 561         * i370-opc.c: Likewise.
 562         * m10200-dis.c: Likewise.
 563         * m10300-dis.c: Likewise.
 564         * micromips-opc.c: Likewise.
 565         * mips-opc.c: Likewise.
 566         * mips61-opc.c: Likewise.
 567         * moxie-dis.c: Likewise.
 568         * or32-opc.c: Likewise.
 569         * pj-dis.c: Likewise.
 570         * ppc-dis.c: Likewise.
 571         * ppc-opc.c: Likewise.
 572         * s390-dis.c: Likewise.
 573         * sh-dis.c: Likewise.
 574         * sh64-dis.c: Likewise.
 575         * sparc-dis.c: Likewise.
 576         * sparc-opc.c: Likewise.
 577         * spu-dis.c: Likewise.
 578         * tic30-dis.c: Likewise.
 579         * tic54x-dis.c: Likewise.
 580         * tic80-dis.c: Likewise.
 581         * tic80-opc.c: Likewise.
 582         * tilegx-dis.c: Likewise.
 583         * tilepro-dis.c: Likewise.
 584         * v850-dis.c: Likewise.
 585         * v850-opc.c: Likewise.
 586         * vax-dis.c: Likewise.
 587         * w65-dis.c: Likewise.
 588         * xgate-dis.c: Likewise.
 589         * xtensa-dis.c: Likewise.
 590         * rl78-decode.opc: Likewise.
 591         * rl78-decode.c: Regenerate.
 592         * rx-decode.opc: Likewise.
 593         * rx-decode.c: Regenerate.
 594
 595 2012-05-17  Alan Modra  <amodra@gmail.com>
 596
 597         * ppc_dis.c: Don't include elf/ppc.h.
 598
 599 2012-05-16  Meador Inge  <meadori@codesourcery.com>
 600
 601         * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
 602         to PUSH/POP {reg}.
 603
 604 2012-05-15  James Murray <jsm@jsm-net.demon.co.uk>
 605             Stephane Carrez <stcarrez@nerim.fr>
 606
 607         * configure.in: Add S12X and XGATE co-processor support to m68hc11
 608         target.
 609         * disassemble.c: Likewise.
 610         * configure: Regenerate.
 611         * m68hc11-dis.c: Make objdump output more consistent, use hex
 612         instead of decimal and use 0x prefix for hex.
 613         * m68hc11-opc.c: Add S12X and XGATE opcodes.
 614
 615 2012-05-14  James Lemke  <jwlemke@codesourcery.com>
 616
 617         * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
 618         (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
 619         (vle_opcd_indices): New array.
 620         (lookup_vle): New function.
 621         (disassemble_init_powerpc): Revise for second (VLE) opcode table.
 622         (print_insn_powerpc): Likewise.
 623         * ppc-opc.c: Likewise.
 624
 625 2012-05-14  Catherine Moore  <clm@codesourcery.com>
 626             Maciej W. Rozycki  <macro@codesourcery.com>
 627             Rhonda Wittels  <rhonda@codesourcery.com>
 628             Nathan Froyd <froydnj@codesourcery.com>
 629
 630         * ppc-opc.c (insert_arx, extract_arx): New functions.
 631         (insert_ary, extract_ary): New functions.
 632         (insert_li20, extract_li20): New functions.
 633         (insert_rx, extract_rx): New functions.
 634         (insert_ry, extract_ry): New functions.
 635         (insert_sci8, extract_sci8): New functions.
 636         (insert_sci8n, extract_sci8n): New functions.
 637         (insert_sd4h, extract_sd4h): New functions.
 638         (insert_sd4w, extract_sd4w): New functions.
 639         (insert_vlesi, extract_vlesi): New functions.
 640         (insert_vlensi, extract_vlensi): New functions.
 641         (insert_vleui, extract_vleui): New functions.
 642         (insert_vleil, extract_vleil): New functions.
 643         (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
 644         (BI16, BI32, BO32, B8): New.
 645         (B15, B24, CRD32, CRS): New.
 646         (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
 647         (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
 648         (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
 649         (SH6_MASK): Use PPC_OPSHIFT_INV.
 650         (SI8, UI5, OIMM5, UI7, BO16): New.
 651         (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
 652         (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
 653         (ALLOW8_SPRG): New.
 654         (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
 655         (OPVUP, OPVUP_MASK OPVUP): New
 656         (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
 657         (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
 658         (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
 659         (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
 660         (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
 661         (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
 662         (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
 663         (SE_IM5, SE_IM5_MASK): New.
 664         (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
 665         (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
 666         (BO32DNZ, BO32DZ): New.
 667         (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
 668         (PPCVLE): New.
 669         (powerpc_opcodes): Add new VLE instructions.  Update existing
 670         instruction to include PPCVLE if supported.
 671         * ppc-dis.c (ppc_opts): Add vle entry.
 672         (get_powerpc_dialect): New function.
 673         (powerpc_init_dialect): VLE support.
 674         (print_insn_big_powerpc): Call get_powerpc_dialect.
 675         (print_insn_little_powerpc): Likewise.
 676         (operand_value_powerpc): Handle negative shift counts.
 677         (print_insn_powerpc): Handle 2-byte instruction lengths.
 678
 679 2012-05-11  Daniel Richard G.  <skunk@iskunk.org>
 680
 681         PR binutils/14028
 682         * configure.in: Invoke ACX_HEADER_STRING.
 683         * configure: Regenerate.
 684         * config.in: Regenerate.
 685         * sysdep.h: If STRINGS_WITH_STRING is defined then include both
 686         string.h and strings.h.
 687
 688 2012-05-11  Nick Clifton  <nickc@redhat.com>
 689
 690         PR binutils/14006
 691         * arm-dis.c (print_insn): Fix detection of instruction mode in
 692         files containing multiple executable sections.
 693
 694 2012-05-03  Sean Keys  <skeys@ipdatasys.com>
 695
 696         * Makefile.in, configure: regenerate
 697         * disassemble.c (disassembler): Recognize ARCH_XGATE.
 698         * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
 699         New functions.
 700         * configure.in: Recognize xgate.
 701         * xgate-dis.c, xgate-opc.c: New files for support of xgate
 702         * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
 703         and opcode generation for xgate.
 704
 705 2012-04-30  DJ Delorie  <dj@redhat.com>
 706
 707         * rx-decode.opc (MOV): Do not sign-extend immediates which are
 708         already the maximum bit size.
 709         * rx-decode.c: Regenerate.
 710
 711 2012-04-27  David S. Miller  <davem@davemloft.net>
 712
 713         * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
 714         * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
 715
 716         * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
 717         * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
 718
 719         * sparc-opc.c (CBCOND): New define.
 720         (CBCOND_XCC): Likewise.
 721         (cbcond): New helper macro.
 722         (sparc_opcodes): Add compare-and-branch instructions.
 723
 724         * sparc-dis.c (print_insn_sparc): Handle ')'.
 725         * sparc-opc.c (sparc_opcodes): Add crypto instructions.
 726
 727         * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
 728         into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
 729
 730 2012-04-12  David S. Miller  <davem@davemloft.net>
 731
 732         * sparc-dis.c (X_DISP10): Define.
 733         (print_insn_sparc): Handle '='.
 734
 735 2012-04-01  Mike Frysinger  <vapier@gentoo.org>
 736
 737         * bfin-dis.c (fmtconst): Replace decimal handling with a single
 738         sprintf call and the '*' field width.
 739
 740 2012-03-23  Maxim Kuvyrkov  <maxim@codesourcery.com>
 741
 742         * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
 743
 744 2012-03-16  Alan Modra  <amodra@gmail.com>
 745
 746         * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
 747         (powerpc_opcd_indices): Bump array size.
 748         (disassemble_init_powerpc): Set powerpc_opcd_indices entries
 749         corresponding to unused opcodes to following entry.
 750         (lookup_powerpc): New function, extracted and optimised from..
 751         (print_insn_powerpc): ..here.
 752
 753 2012-03-15  Alan Modra  <amodra@gmail.com>
 754             James Lemke  <jwlemke@codesourcery.com>
 755
 756         * disassemble.c (disassemble_init_for_target): Handle ppc init.
 757         * ppc-dis.c (private): New var.
 758         (powerpc_init_dialect): Don't return calloc failure, instead use
 759         private.
 760         (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
 761         (powerpc_opcd_indices): New array.
 762         (disassemble_init_powerpc): New function.
 763         (print_insn_big_powerpc): Don't init dialect here.
 764         (print_insn_little_powerpc): Likewise.
 765         (print_insn_powerpc): Start search using powerpc_opcd_indices.
 766
 767 2012-03-10  Edmar Wienskoski  <edmar@freescale.com>
 768
 769         * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
 770         * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
 771         (PPCVEC2, PPCTMR, E6500): New short names.
 772         (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
 773         mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
 774         lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
 775         lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
 776         lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
 777         optional operands on sync instruction for E6500 target.
 778
 779 2012-03-08  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 780
 781         * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
 782
 783 2012-02-27  Alan Modra  <amodra@gmail.com>
 784
 785         * mt-dis.c: Regenerate.
 786
 787 2012-02-27  Alan Modra  <amodra@gmail.com>
 788
 789         * v850-opc.c (extract_v8): Rearrange to make it obvious this
 790         is the inverse of corresponding insert function.
 791         (extract_d22, extract_u9, extract_r4): Likewise.
 792         (extract_d9): Correct sign extension.
 793         (extract_d16_15): Don't assume "long" is 32 bits, and don't
 794         rely on implementation defined behaviour for shift right of
 795         signed types.
 796         (extract_d16_16, extract_d17_16, extract_i9): Likewise.
 797         (extract_d23): Likewise, and correct mask.
 798
 799 2012-02-27  Alan Modra  <amodra@gmail.com>
 800
 801         * crx-dis.c (print_arg): Mask constant to 32 bits.
 802         * crx-opc.c (cst4_map): Use int array.
 803
 804 2012-02-27  Alan Modra  <amodra@gmail.com>
 805
 806         * arc-dis.c (BITS): Don't use shifts to mask off bits.
 807         (FIELDD): Sign extend with xor,sub.
 808
 809 2012-02-25  Walter Lee  <walt@tilera.com>
 810
 811         * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
 812         * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
 813         TILEPRO_OPC_LW_TLS_SN.
 814
 815 2012-02-21  H.J. Lu  <hongjiu.lu@intel.com>
 816
 817         * i386-opc.h (HLEPrefixNone): New.
 818         (HLEPrefixLock): Likewise.
 819         (HLEPrefixAny): Likewise.
 820         (HLEPrefixRelease): Likewise.
 821
 822 2012-02-08  H.J. Lu  <hongjiu.lu@intel.com>
 823
 824         * i386-dis.c (HLE_Fixup1): New.
 825         (HLE_Fixup2): Likewise.
 826         (HLE_Fixup3): Likewise.
 827         (Ebh1): Likewise.
 828         (Evh1): Likewise.
 829         (Ebh2): Likewise.
 830         (Evh2): Likewise.
 831         (Ebh3): Likewise.
 832         (Evh3): Likewise.
 833         (MOD_C6_REG_7): Likewise.
 834         (MOD_C7_REG_7): Likewise.
 835         (RM_C6_REG_7): Likewise.
 836         (RM_C7_REG_7): Likewise.
 837         (XACQUIRE_PREFIX): Likewise.
 838         (XRELEASE_PREFIX): Likewise.
 839         (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
 840         cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
 841         Ebh2/Evh2 on xchg.  Use Ebh3/Evh3 on mov.
 842         (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
 843         not, or, sbb, sub and xor.  Use Ebh3/Evh3 on mov.  Use
 844         MOD_C6_REG_7 and MOD_C7_REG_7.
 845         (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
 846         (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7.  Add xend and
 847         xtest.
 848         (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
 849         (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
 850
 851         * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
 852         CPU_RTM_FLAGS.
 853         (cpu_flags): Add CpuHLE and CpuRTM.
 854         (opcode_modifiers): Add HLEPrefixOk.
 855
 856         * i386-opc.h (CpuHLE): New.
 857         (CpuRTM): Likewise.
 858         (HLEPrefixOk): Likewise.
 859         (i386_cpu_flags): Add cpuhle and cpurtm.
 860         (i386_opcode_modifier): Add hleprefixok.
 861
 862         * i386-opc.tbl: Add HLEPrefixOk=3 to mov.  Add HLEPrefixOk to
 863         add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
 864         sbb, sub, xor and xadd.  Add HLEPrefixOk=2 to xchg with memory
 865         operand.  Add xacquire, xrelease, xabort, xbegin, xend and
 866         xtest.
 867         * i386-init.h: Regenerated.
 868         * i386-tbl.h: Likewise.
 869
 870 2012-01-24  DJ Delorie  <dj@redhat.com>
 871
 872         * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
 873         * rl78-decode.c: Regenerate.
 874
 875 2012-01-17  James Murray  <jsm@jsm-net.demon.co.uk>
 876
 877         PR binutils/10173
 878         * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
 879
 880 2012-01-17  Andreas Schwab  <schwab@linux-m68k.org>
 881
 882         * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
 883         register and move them after pmove with PSR/PCSR register.
 884
 885 2012-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 886
 887         * i386-dis.c (mod_table): Add vmfunc.
 888
 889         * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
 890         (cpu_flags): CpuVMFUNC.
 891
 892         * i386-opc.h (CpuVMFUNC): New.
 893         (i386_cpu_flags): Add cpuvmfunc.
 894
 895         * i386-opc.tbl: Add vmfunc.
 896         * i386-init.h: Regenerated.
 897         * i386-tbl.h: Likewise.
 898
 899 For older changes see ChangeLog-2011
 900 \f
 901 Local Variables:
 902 mode: change-log
 903 left-margin: 8
 904 fill-column: 74
 905 version-control: never
 906 End: