opcodes/ChangeLog

   1 2005-04-14  Alan Modra  <amodra@bigpond.net.au>
   2
   3         * Makefile.am (NO_WERROR): Define.
   4         * configure.in: Invoke AM_BINUTILS_WARNINGS.
   5         * Makefile.in: Regenerate.
   6         * aclocal.m4: Regenerate.
   7         * configure: Regenerate.
   8
   9 2005-04-04  Nick Clifton  <nickc@redhat.com>
  10
  11         * fr30-asm.c: Regenerate.
  12         * frv-asm.c: Regenerate.
  13         * iq2000-asm.c: Regenerate.
  14         * m32r-asm.c: Regenerate.
  15         * openrisc-asm.c: Regenerate.
  16
  17 2005-04-01  Jan Beulich  <jbeulich@novell.com>
  18
  19         * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
  20         visible operands in Intel mode. The first operand of monitor is
  21         %rax in 64-bit mode.
  22
  23 2005-04-01  Jan Beulich  <jbeulich@novell.com>
  24
  25         * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
  26         easier future additions.
  27
  28 2005-03-31  Jerome Guitton  <guitton@gnat.com>
  29
  30         * configure.in: Check for basename.
  31         * configure: Regenerate.
  32         * config.in: Ditto.
  33
  34 2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>
  35
  36         * i386-dis.c (SEG_Fixup): New.
  37         (Sv): New.
  38         (dis386): Use "Sv" for 0x8c and 0x8e.
  39
  40 2005-03-21  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
  41             Nick Clifton  <nickc@redhat.com>
  42
  43         * vax-dis.c: (entry_addr): New varible:  An array of user supplied
  44         function entry mask addresses.
  45         (entry_addr_occupied_slots): New variable: The number of occupied
  46         elements in entry_addr.
  47         (entry_addr_total_slots): New variable: The total number of
  48         elements in entry_addr.
  49         (parse_disassembler_options): New function.  Fills in the entry_addr
  50         array.
  51         (free_entry_array): New function.  Release the memory used by the
  52         entry addr array.  Suppressed because there is no way to call it.
  53         (is_function_entry): Check if a given address is a function's
  54         start address by looking at supplied entry mask addresses and
  55         symbol information, if available.
  56         (print_insn_vax): Use parse_disassembler_options and is_function_entry.
  57
  58 2005-03-23  H.J. Lu  <hongjiu.lu@intel.com>
  59
  60         * cris-dis.c (print_with_operands): Use ~31L for long instead
  61         of ~31.
  62
  63 2005-03-20  H.J. Lu  <hongjiu.lu@intel.com>
  64
  65         * mmix-opc.c (O): Revert the last change.
  66         (Z): Likewise.
  67
  68 2005-03-19  H.J. Lu  <hongjiu.lu@intel.com>
  69
  70         * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
  71         (Z): Likewise.
  72
  73 2005-03-19  Hans-Peter Nilsson  <hp@bitrange.com>
  74
  75         * mmix-opc.c (O, Z): Force expression as unsigned long.
  76
  77 2005-03-18  Nick Clifton  <nickc@redhat.com>
  78
  79         * ip2k-asm.c: Regenerate.
  80         * op/opcodes.pot: Regenerate.
  81
  82 2005-03-16  Nick Clifton  <nickc@redhat.com>
  83             Ben Elliston  <bje@au.ibm.com>
  84
  85         * configure.in (werror): New switch: Add -Werror to the
  86         compiler command line.  Enabled by default.  Disable via
  87         --disable-werror.
  88         * configure: Regenerate.
  89
  90 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
  91
  92         * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
  93         BOOKE.
  94
  95 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
  96
  97         * po/es.po: Commit new Spanish translation.
  98
  99         * po/fr.po: Commit new French translation.
 100
 101 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 102
 103         * vax-dis.c: Fix spelling error
 104         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
 105         of just "Entry mask: < r1 ... >"
 106
 107 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
 108
 109         * arm-dis.c (arm_opcodes): Document %E and %V.
 110         Add entries for v6T2 ARM instructions:
 111         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
 112         (print_insn_arm): Add support for %E and %V.
 113         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
 114
 115 2005-03-10  Jeff Baker  <jbaker@qnx.com>
 116             Alan Modra  <amodra@bigpond.net.au>
 117
 118         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
 119         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
 120         (SPRG_MASK): Delete.
 121         (XSPRG_MASK): Mask off extra bits now part of sprg field.
 122         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
 123         mfsprg4..7 after msprg and consolidate.
 124
 125 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 126
 127         * vax-dis.c (entry_mask_bit): New array.
 128         (print_insn_vax): Decode function entry mask.
 129
 130 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
 131
 132         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
 133
 134 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
 135
 136         * po/opcodes.pot: Regenerate.
 137
 138 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
 139
 140         * arc-dis.c (a4_decoding_class): New enum.
 141         (dsmOneArcInst): Use the enum values for the decoding class.
 142         Remove redundant case in the switch for decodingClass value 11.
 143
 144 2005-03-02  Jan Beulich  <jbeulich@novell.com>
 145
 146         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
 147         accesses.
 148         (OP_C): Consider lock prefix in non-64-bit modes.
 149
 150 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 151
 152         * cris-dis.c (format_hex): Remove ineffective warning fix.
 153         * crx-dis.c (make_instruction): Warning fix.
 154         * frv-asm.c: Regenerate.
 155
 156 2005-02-23  Nick Clifton  <nickc@redhat.com>
 157
 158         * cgen-dis.in: Use bfd_byte for buffers that are passed to
 159         read_memory.
 160
 161         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
 162
 163         * crx-dis.c (make_instruction): Move argument structure into inner
 164         scope and ensure that all of its fields are initialised before
 165         they are used.
 166
 167         * fr30-asm.c: Regenerate.
 168         * fr30-dis.c: Regenerate.
 169         * frv-asm.c: Regenerate.
 170         * frv-dis.c: Regenerate.
 171         * ip2k-asm.c: Regenerate.
 172         * ip2k-dis.c: Regenerate.
 173         * iq2000-asm.c: Regenerate.
 174         * iq2000-dis.c: Regenerate.
 175         * m32r-asm.c: Regenerate.
 176         * m32r-dis.c: Regenerate.
 177         * openrisc-asm.c: Regenerate.
 178         * openrisc-dis.c: Regenerate.
 179         * xstormy16-asm.c: Regenerate.
 180         * xstormy16-dis.c: Regenerate.
 181
 182 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 183
 184         * arc-ext.c: Warning fixes.
 185         * arc-ext.h: Likewise.
 186         * cgen-opc.c: Likewise.
 187         * ia64-gen.c: Likewise.
 188         * maxq-dis.c: Likewise.
 189         * ns32k-dis.c: Likewise.
 190         * w65-dis.c: Likewise.
 191         * ia64-asmtab.c: Regenerate.
 192
 193 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 194
 195         * fr30-desc.c: Regenerate.
 196         * fr30-desc.h: Regenerate.
 197         * fr30-opc.c: Regenerate.
 198         * fr30-opc.h: Regenerate.
 199         * frv-desc.c: Regenerate.
 200         * frv-desc.h: Regenerate.
 201         * frv-opc.c: Regenerate.
 202         * frv-opc.h: Regenerate.
 203         * ip2k-desc.c: Regenerate.
 204         * ip2k-desc.h: Regenerate.
 205         * ip2k-opc.c: Regenerate.
 206         * ip2k-opc.h: Regenerate.
 207         * iq2000-desc.c: Regenerate.
 208         * iq2000-desc.h: Regenerate.
 209         * iq2000-opc.c: Regenerate.
 210         * iq2000-opc.h: Regenerate.
 211         * m32r-desc.c: Regenerate.
 212         * m32r-desc.h: Regenerate.
 213         * m32r-opc.c: Regenerate.
 214         * m32r-opc.h: Regenerate.
 215         * m32r-opinst.c: Regenerate.
 216         * openrisc-desc.c: Regenerate.
 217         * openrisc-desc.h: Regenerate.
 218         * openrisc-opc.c: Regenerate.
 219         * openrisc-opc.h: Regenerate.
 220         * xstormy16-desc.c: Regenerate.
 221         * xstormy16-desc.h: Regenerate.
 222         * xstormy16-opc.c: Regenerate.
 223         * xstormy16-opc.h: Regenerate.
 224
 225 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
 226
 227         * Makefile.am: Run "make dep-am"
 228         * Makefile.in: Regenerate.
 229
 230 2005-02-15  Nick Clifton  <nickc@redhat.com>
 231
 232         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
 233         compile time warnings.
 234         (print_keyword): Likewise.
 235         (default_print_insn): Likewise.
 236
 237         * fr30-desc.c: Regenerated.
 238         * fr30-desc.h: Regenerated.
 239         * fr30-dis.c: Regenerated.
 240         * fr30-opc.c: Regenerated.
 241         * fr30-opc.h: Regenerated.
 242         * frv-desc.c: Regenerated.
 243         * frv-dis.c: Regenerated.
 244         * frv-opc.c: Regenerated.
 245         * ip2k-asm.c: Regenerated.
 246         * ip2k-desc.c: Regenerated.
 247         * ip2k-desc.h: Regenerated.
 248         * ip2k-dis.c: Regenerated.
 249         * ip2k-opc.c: Regenerated.
 250         * ip2k-opc.h: Regenerated.
 251         * iq2000-desc.c: Regenerated.
 252         * iq2000-dis.c: Regenerated.
 253         * iq2000-opc.c: Regenerated.
 254         * m32r-asm.c: Regenerated.
 255         * m32r-desc.c: Regenerated.
 256         * m32r-desc.h: Regenerated.
 257         * m32r-dis.c: Regenerated.
 258         * m32r-opc.c: Regenerated.
 259         * m32r-opc.h: Regenerated.
 260         * m32r-opinst.c: Regenerated.
 261         * openrisc-desc.c: Regenerated.
 262         * openrisc-desc.h: Regenerated.
 263         * openrisc-dis.c: Regenerated.
 264         * openrisc-opc.c: Regenerated.
 265         * openrisc-opc.h: Regenerated.
 266         * xstormy16-desc.c: Regenerated.
 267         * xstormy16-desc.h: Regenerated.
 268         * xstormy16-dis.c: Regenerated.
 269         * xstormy16-opc.c: Regenerated.
 270         * xstormy16-opc.h: Regenerated.
 271
 272 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 273
 274         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 275         address.
 276
 277 2005-02-11  Nick Clifton  <nickc@redhat.com>
 278
 279         * iq2000-asm.c: Regenerate.
 280
 281         * frv-dis.c: Regenerate.
 282
 283 2005-02-07  Jim Blandy  <jimb@redhat.com>
 284
 285         * Makefile.am (CGEN): Load guile.scm before calling the main
 286         application script.
 287         * Makefile.in: Regenerated.
 288         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 289         Simply pass the cgen-opc.scm path to ${cgen} as its first
 290         argument; ${cgen} itself now contains the '-s', or whatever is
 291         appropriate for the Scheme being used.
 292
 293 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 294
 295         * configure: Regenerate to track ../gettext.m4.
 296
 297 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 298
 299         * ia64-gen.c (NELEMS): Define.
 300         (shrink): Generate alias with missing second predicate register when
 301         opcode has two outputs and these are both predicates.
 302         * ia64-opc-i.c (FULL17): Define.
 303         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 304         here to generate output template.
 305         (TBITCM, TNATCM): Undefine after use.
 306         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 307         first input. Add ld16 aliases without ar.csd as second output. Add
 308         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 309         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 310         ar.ccv as third/fourth inputs. Consolidate through...
 311         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 312         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 313         * ia64-asmtab.c: Regenerate.
 314
 315 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 316
 317         * configure: Regenerate to track ../gettext.m4 change.
 318
 319 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 320
 321         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 322         * frv-asm.c: Rebuilt.
 323         * frv-desc.c: Rebuilt.
 324         * frv-desc.h: Rebuilt.
 325         * frv-dis.c: Rebuilt.
 326         * frv-ibld.c: Rebuilt.
 327         * frv-opc.c: Rebuilt.
 328         * frv-opc.h: Rebuilt.
 329
 330 2005-01-24  Andrew Cagney  <cagney@gnu.org>
 331
 332         * configure: Regenerate, ../gettext.m4 was updated.
 333
 334 2005-01-21  Fred Fish  <fnf@specifixinc.com>
 335
 336         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
 337         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
 338         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
 339         * mips-dis.c: Ditto.
 340
 341 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
 342
 343         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
 344
 345 2005-01-19  Fred Fish  <fnf@specifixinc.com>
 346
 347         * mips-dis.c (no_aliases): New disassembly option flag.
 348         (set_default_mips_dis_options): Init no_aliases to zero.
 349         (parse_mips_dis_option): Handle no-aliases option.
 350         (print_insn_mips): Ignore table entries that are aliases
 351         if no_aliases is set.
 352         (print_insn_mips16): Ditto.
 353         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
 354         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
 355         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
 356         * mips16-opc.c (mips16_opcodes): Ditto.
 357
 358 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
 359
 360         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
 361         (inheritance diagram): Add missing edge.
 362         (arch_sh1_up): Rename arch_sh_up to match external name to make life
 363         easier for the testsuite.
 364         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
 365         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
 366         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
 367         arch_sh2a_or_sh4_up child.
 368         (sh_table): Do renaming as above.
 369         Correct comment for ldc.l for gas testsuite to read.
 370         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
 371         Correct comments for movy.w and movy.l for gas testsuite to read.
 372         Correct comments for fmov.d and fmov.s for gas testsuite to read.
 373
 374 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 375
 376         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
 377
 378 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 379
 380         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
 381
 382 2005-01-10  Andreas Schwab  <schwab@suse.de>
 383
 384         * disassemble.c (disassemble_init_for_target) <case
 385         bfd_arch_ia64>: Set skip_zeroes to 16.
 386         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
 387
 388 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
 389
 390         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
 391
 392 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
 393
 394         * avr-dis.c: Prettyprint. Added printing of symbol names in all
 395         memory references. Convert avr_operand() to C90 formatting.
 396
 397 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
 398
 399         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
 400
 401 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
 402
 403         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
 404         (no_op_insn): Initialize array with instructions that have no
 405         operands.
 406         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
 407
 408 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
 409
 410         * arm-dis.c: Correct top-level comment.
 411
 412 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
 413
 414         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
 415         architecuture defining the insn.
 416         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
 417         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
 418         field.
 419         Also include opcode/arm.h.
 420         * Makefile.am (arm-dis.lo): Update dependency list.
 421         * Makefile.in: Regenerate.
 422
 423 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
 424
 425         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
 426         reflect the change to the short immediate syntax.
 427
 428 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
 429
 430         * or32-opc.c (debug): Warning fix.
 431         * po/POTFILES.in: Regenerate.
 432
 433         * maxq-dis.c: Formatting.
 434         (print_insn): Warning fix.
 435
 436 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
 437
 438         * arm-dis.c (WORD_ADDRESS): Define.
 439         (print_insn): Use it.  Correct big-endian end-of-section handling.
 440
 441 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
 442             Vineet Sharma      <vineets@noida.hcltech.com>
 443
 444         * maxq-dis.c: New file.
 445         * disassemble.c (ARCH_maxq): Define.
 446         (disassembler): Add 'print_insn_maxq_little' for handling maxq
 447         instructions..
 448         * configure.in: Add case for bfd_maxq_arch.
 449         * configure: Regenerate.
 450         * Makefile.am: Add support for maxq-dis.c
 451         * Makefile.in: Regenerate.
 452         * aclocal.m4: Regenerate.
 453
 454 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
 455
 456         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
 457         mode.
 458         * crx-dis.c: Likewise.
 459
 460 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
 461
 462         Generally, handle CRISv32.
 463         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
 464         (struct cris_disasm_data): New type.
 465         (format_reg, format_hex, cris_constraint, print_flags)
 466         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
 467         callers changed.
 468         (format_sup_reg, print_insn_crisv32_with_register_prefix)
 469         (print_insn_crisv32_without_register_prefix)
 470         (print_insn_crisv10_v32_with_register_prefix)
 471         (print_insn_crisv10_v32_without_register_prefix)
 472         (cris_parse_disassembler_options): New functions.
 473         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
 474         parameter.  All callers changed.
 475         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
 476         failure.
 477         (cris_constraint) <case 'Y', 'U'>: New cases.
 478         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
 479         for constraint 'n'.
 480         (print_with_operands) <case 'Y'>: New case.
 481         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
 482         <case 'N', 'Y', 'Q'>: New cases.
 483         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
 484         (print_insn_cris_with_register_prefix)
 485         (print_insn_cris_without_register_prefix): Call
 486         cris_parse_disassembler_options.
 487         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
 488         for CRISv32 and the size of immediate operands.  New v32-only
 489         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
 490         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
 491         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
 492         Change brp to be v3..v10.
 493         (cris_support_regs): New vector.
 494         (cris_opcodes): Update head comment.  New format characters '[',
 495         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
 496         Add new opcodes for v32 and adjust existing opcodes to accommodate
 497         differences to earlier variants.
 498         (cris_cond15s): New vector.
 499
 500 2004-11-04 Jan Beulich <jbeulich@novell.com>
 501
 502         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
 503         (indirEb): Remove.
 504         (Mp): Use f_mode rather than none at all.
 505         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
 506         replaces what previously was x_mode; x_mode now means 128-bit SSE
 507         operands.
 508         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
 509         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
 510         pinsrw's second operand is Edqw.
 511         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
 512         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
 513         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
 514         mode when an operand size override is present or always suffixing.
 515         More instructions will need to be added to this group.
 516         (putop): Handle new macro chars 'C' (short/long suffix selector),
 517         'I' (Intel mode override for following macro char), and 'J' (for
 518         adding the 'l' prefix to far branches in AT&T mode). When an
 519         alternative was specified in the template, honor macro character when
 520         specified for Intel mode.
 521         (OP_E): Handle new *_mode values. Correct pointer specifications for
 522         memory operands. Consolidate output of index register.
 523         (OP_G): Handle new *_mode values.
 524         (OP_I): Handle const_1_mode.
 525         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
 526         respective opcode prefix bits have been consumed.
 527         (OP_EM, OP_EX): Provide some default handling for generating pointer
 528         specifications.
 529
 530 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
 531
 532         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
 533         COP_INST macro.
 534
 535 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
 536
 537         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
 538         (getregliststring): Support HI/LO and user registers.
 539         * crx-opc.c (crx_instruction): Update data structure according to the
 540         rearrangement done in CRX opcode header file.
 541         (crx_regtab):  Likewise.
 542         (crx_optab):  Likewise.
 543         (crx_instruction): Reorder load/stor instructions, remove unsupported
 544         formats.
 545         support new Co-Processor instruction 'cpi'.
 546
 547 2004-10-27  Nick Clifton  <nickc@redhat.com>
 548
 549         * opcodes/iq2000-asm.c: Regenerate.
 550         * opcodes/iq2000-desc.c: Regenerate.
 551         * opcodes/iq2000-desc.h: Regenerate.
 552         * opcodes/iq2000-dis.c: Regenerate.
 553         * opcodes/iq2000-ibld.c: Regenerate.
 554         * opcodes/iq2000-opc.c: Regenerate.
 555         * opcodes/iq2000-opc.h: Regenerate.
 556
 557 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
 558
 559         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
 560         us4, us5 (respectively).
 561         Remove unsupported 'popa' instruction.
 562         Reverse operands order in store co-processor instructions.
 563
 564 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
 565
 566         * Makefile.am: Run "make dep-am"
 567         * Makefile.in: Regenerate.
 568
 569 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
 570
 571         * xtensa-dis.c: Use ISO C90 formatting.
 572
 573 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
 574
 575         * ppc-opc.c: Revert 2004-09-09 change.
 576
 577 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
 578
 579         * xtensa-dis.c (state_names): Delete.
 580         (fetch_data): Use xtensa_isa_maxlength.
 581         (print_xtensa_operand): Replace operand parameter with opcode/operand
 582         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
 583         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
 584         instruction bundles.  Use xmalloc instead of malloc.
 585
 586 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
 587
 588         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
 589         initializers.
 590
 591 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
 592
 593         * crx-opc.c (crx_instruction): Support Co-processor insns.
 594         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
 595         (getregliststring): Change function to use the above enum.
 596         (print_arg): Handle CO-Processor insns.
 597         (crx_cinvs): Add 'b' option to invalidate the branch-target
 598         cache.
 599
 600 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
 601
 602         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
 603         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
 604         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
 605         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
 606         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
 607
 608 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
 609
 610         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
 611         rather than add it.
 612
 613 2004-09-30  Paul Brook  <paul@codesourcery.com>
 614
 615         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
 616         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
 617
 618 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
 619
 620         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
 621         (CONFIG_STATUS_DEPENDENCIES): New.
 622         (Makefile): Removed.
 623         (config.status): Likewise.
 624         * Makefile.in: Regenerated.
 625
 626 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
 627
 628         * Makefile.am: Run "make dep-am".
 629         * Makefile.in: Regenerate.
 630         * aclocal.m4: Regenerate.
 631         * configure: Regenerate.
 632         * po/POTFILES.in: Regenerate.
 633         * po/opcodes.pot: Regenerate.
 634
 635 2004-09-11  Andreas Schwab  <schwab@suse.de>
 636
 637         * configure: Rebuild.
 638
 639 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
 640
 641         * ppc-opc.c (L): Make this field not optional.
 642
 643 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
 644
 645         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
 646         Fix parameter to 'm[t|f]csr' insns.
 647
 648 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
 649
 650         * configure.in: Autoupdate to autoconf 2.59.
 651         * aclocal.m4: Rebuild with aclocal 1.4p6.
 652         * configure: Rebuild with autoconf 2.59.
 653         * Makefile.in: Rebuild with automake 1.4p6 (picking up
 654         bfd changes for autoconf 2.59 on the way).
 655         * config.in: Rebuild with autoheader 2.59.
 656
 657 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 658
 659         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
 660
 661 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
 662
 663         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
 664         (GRPPADLCK2): New define.
 665         (twobyte_has_modrm): True for 0xA6.
 666         (grps): GRPPADLCK2 for opcode 0xA6.
 667
 668 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
 669
 670         Introduce SH2a support.
 671         * sh-opc.h (arch_sh2a_base): Renumber.
 672         (arch_sh2a_nofpu_base): Remove.
 673         (arch_sh_base_mask): Adjust.
 674         (arch_opann_mask): New.
 675         (arch_sh2a, arch_sh2a_nofpu): Adjust.
 676         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
 677         (sh_table): Adjust whitespace.
 678         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
 679         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
 680         instruction list throughout.
 681         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
 682         of arch_sh2a in instruction list throughout.
 683         (arch_sh2e_up): Accomodate above changes.
 684         (arch_sh2_up): Ditto.
 685         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
 686         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
 687         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
 688         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
 689         * sh-opc.h (arch_sh2a_nofpu): New.
 690         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
 691         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
 692         instruction.
 693         2004-01-20  DJ Delorie  <dj@redhat.com>
 694         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
 695         2003-12-29  DJ Delorie  <dj@redhat.com>
 696         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
 697         sh_opcode_info, sh_table): Add sh2a support.
 698         (arch_op32): New, to tag 32-bit opcodes.
 699         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
 700         2003-12-02  Michael Snyder  <msnyder@redhat.com>
 701         * sh-opc.h (arch_sh2a): Add.
 702         * sh-dis.c (arch_sh2a): Handle.
 703         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
 704
 705 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
 706
 707         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
 708
 709 2004-07-22  Nick Clifton  <nickc@redhat.com>
 710
 711         PR/280
 712         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
 713         insns - this is done by objdump itself.
 714         * h8500-dis.c (print_insn_h8500): Likewise.
 715
 716 2004-07-21  Jan Beulich <jbeulich@novell.com>
 717
 718         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
 719         regardless of address size prefix in effect.
 720         (ptr_reg): Size or address registers does not depend on rex64, but
 721         on the presence of an address size override.
 722         (OP_MMX): Use rex.x only for xmm registers.
 723         (OP_EM): Use rex.z only for xmm registers.
 724
 725 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 726
 727         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
 728         move/branch operations to the bottom so that VR5400 multimedia
 729         instructions take precedence in disassembly.
 730
 731 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 732
 733         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
 734         ISA-specific "break" encoding.
 735
 736 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
 737
 738         * arm-opc.h: Fix typo in comment.
 739
 740 2004-07-11  Andreas Schwab  <schwab@suse.de>
 741
 742         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
 743
 744 2004-07-09  Andreas Schwab  <schwab@suse.de>
 745
 746         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
 747
 748 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
 749
 750         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
 751         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
 752         (crx-dis.lo): New target.
 753         (crx-opc.lo): Likewise.
 754         * Makefile.in: Regenerate.
 755         * configure.in: Handle bfd_crx_arch.
 756         * configure: Regenerate.
 757         * crx-dis.c: New file.
 758         * crx-opc.c: New file.
 759         * disassemble.c (ARCH_crx): Define.
 760         (disassembler): Handle ARCH_crx.
 761
 762 2004-06-29  James E Wilson  <wilson@specifixinc.com>
 763
 764         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
 765         * ia64-asmtab.c: Regnerate.
 766
 767 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
 768
 769         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
 770         (extract_fxm): Don't test dialect.
 771         (XFXFXM_MASK): Include the power4 bit.
 772         (XFXM): Add p4 param.
 773         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
 774
 775 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
 776
 777         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
 778         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
 779
 780 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
 781
 782         * ppc-opc.c (BH, XLBH_MASK): Define.
 783         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
 784
 785 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
 786
 787         * i386-dis.c (x_mode): Comment.
 788         (two_source_ops): File scope.
 789         (float_mem): Correct fisttpll and fistpll.
 790         (float_mem_mode): New table.
 791         (dofloat): Use it.
 792         (OP_E): Correct intel mode PTR output.
 793         (ptr_reg): Use open_char and close_char.
 794         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
 795         operands.  Set two_source_ops.
 796
 797 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
 798
 799         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
 800         instead of _raw_size.
 801
 802 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
 803
 804         * ia64-gen.c (in_iclass): Handle more postinc st
 805         and ld variants.
 806         * ia64-asmtab.c: Rebuilt.
 807
 808 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 809
 810         * s390-opc.txt: Correct architecture mask for some opcodes.
 811         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
 812         in the esa mode as well.
 813
 814 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
 815
 816         * sh-dis.c (target_arch): Make unsigned.
 817         (print_insn_sh): Replace (most of) switch with a call to
 818         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
 819         * sh-opc.h: Redefine architecture flags values.
 820         Add sh3-nommu architecture.
 821         Reorganise <arch>_up macros so they make more visual sense.
 822         (SH_MERGE_ARCH_SET): Define new macro.
 823         (SH_VALID_BASE_ARCH_SET): Likewise.
 824         (SH_VALID_MMU_ARCH_SET): Likewise.
 825         (SH_VALID_CO_ARCH_SET): Likewise.
 826         (SH_VALID_ARCH_SET): Likewise.
 827         (SH_MERGE_ARCH_SET_VALID): Likewise.
 828         (SH_ARCH_SET_HAS_FPU): Likewise.
 829         (SH_ARCH_SET_HAS_DSP): Likewise.
 830         (SH_ARCH_UNKNOWN_ARCH): Likewise.
 831         (sh_get_arch_from_bfd_mach): Add prototype.
 832         (sh_get_arch_up_from_bfd_mach): Likewise.
 833         (sh_get_bfd_mach_from_arch_set): Likewise.
 834         (sh_merge_bfd_arc): Likewise.
 835
 836 2004-05-24  Peter Barada  <peter@the-baradas.com>
 837
 838         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
 839         into new match_insn_m68k function.  Loop over canidate
 840         matches and select first that completely matches.
 841         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
 842         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
 843         to verify addressing for MAC/EMAC.
 844         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
 845         reigster halves since 'fpu' and 'spl' look misleading.
 846         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
 847         * m68k-opc.c: Rearragne mac/emac cases to use longest for
 848         first, tighten up match masks.
 849         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
 850         'size' from special case code in print_insn_m68k to
 851         determine decode size of insns.
 852
 853 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
 854
 855         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
 856         well as when -mpower4.
 857
 858 2004-05-13  Nick Clifton  <nickc@redhat.com>
 859
 860         * po/fr.po: Updated French translation.
 861
 862 2004-05-05  Peter Barada  <peter@the-baradas.com>
 863
 864         * m68k-dis.c(print_insn_m68k): Add new chips, use core
 865         variants in arch_mask.  Only set m68881/68851 for 68k chips.
 866         * m68k-op.c: Switch from ColdFire chips to core variants.
 867
 868 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
 869
 870         PR 147.
 871         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
 872
 873 2004-04-29  Ben Elliston  <bje@au.ibm.com>
 874
 875         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
 876         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
 877
 878 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
 879
 880         * sh-dis.c (print_insn_sh): Print the value in constant pool
 881         as a symbol if it looks like a symbol.
 882
 883 2004-04-22  Peter Barada <peter@the-baradas.com>
 884
 885         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
 886         appropriate ColdFire architectures.
 887         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
 888         mask addressing.
 889         Add EMAC instructions, fix MAC instructions. Remove
 890         macmw/macml/msacmw/msacml instructions since mask addressing now
 891         supported.
 892
 893 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
 894
 895         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
 896         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
 897         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
 898         macro.  Adjust all users.
 899
 900 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
 901
 902         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
 903         separately.
 904
 905 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 906
 907         * m32r-asm.c: Regenerate.
 908
 909 2004-03-29  Stan Shebs  <shebs@apple.com>
 910
 911         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
 912         used.
 913
 914 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
 915
 916         * aclocal.m4: Regenerate.
 917         * config.in: Regenerate.
 918         * configure: Regenerate.
 919         * po/POTFILES.in: Regenerate.
 920         * po/opcodes.pot: Regenerate.
 921
 922 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
 923
 924         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
 925         PPC_OPERANDS_GPR_0.
 926         * ppc-opc.c (RA0): Define.
 927         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
 928         (RAOPT): Rename from RAO.  Update all uses.
 929         (powerpc_opcodes): Use RA0 as appropriate.
 930
 931 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
 932
 933         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
 934
 935 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
 936
 937         * sparc-dis.c (print_insn_sparc): Update getword prototype.
 938
 939 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 940
 941         * i386-dis.c (GRPPLOCK): Delete.
 942         (grps): Delete GRPPLOCK entry.
 943
 944 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 945
 946         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
 947         (M, Mp): Use OP_M.
 948         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
 949         (GRPPADLCK): Define.
 950         (dis386): Use NOP_Fixup on "nop".
 951         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
 952         (twobyte_has_modrm): Set for 0xa7.
 953         (padlock_table): Delete.  Move to..
 954         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
 955         and clflush.
 956         (print_insn): Revert PADLOCK_SPECIAL code.
 957         (OP_E): Delete sfence, lfence, mfence checks.
 958
 959 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
 960
 961         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
 962         (INVLPG_Fixup): New function.
 963         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
 964
 965 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 966
 967         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
 968         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
 969         (padlock_table): New struct with PadLock instructions.
 970         (print_insn): Handle PADLOCK_SPECIAL.
 971
 972 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 973
 974         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
 975         (OP_E): Twiddle clflush to sfence here.
 976
 977 2004-03-08  Nick Clifton  <nickc@redhat.com>
 978
 979         * po/de.po: Updated German translation.
 980
 981 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
 982
 983         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
 984         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
 985         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
 986         accordingly.
 987
 988 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 989
 990         * frv-asm.c: Regenerate.
 991         * frv-desc.c: Regenerate.
 992         * frv-desc.h: Regenerate.
 993         * frv-dis.c: Regenerate.
 994         * frv-ibld.c: Regenerate.
 995         * frv-opc.c: Regenerate.
 996         * frv-opc.h: Regenerate.
 997
 998 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 999
1000         * frv-desc.c, frv-opc.c: Regenerate.
1001
1002 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1003
1004         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1005
1006 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
1007
1008         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1009         Also correct mistake in the comment.
1010
1011 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
1012
1013         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1014         ensure that double registers have even numbers.
1015         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1016         that reserved instruction 0xfffd does not decode the same
1017         as 0xfdfd (ftrv).
1018         * sh-opc.h: Add REG_N_D nibble type and use it whereever
1019         REG_N refers to a double register.
1020         Add REG_N_B01 nibble type and use it instead of REG_NM
1021         in ftrv.
1022         Adjust the bit patterns in a few comments.
1023
1024 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
1025
1026         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1027
1028 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1029
1030         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1031
1032 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1033
1034         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1035
1036 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1037
1038         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1039         mtivor32, mtivor33, mtivor34.
1040
1041 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
1042
1043         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1044
1045 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
1046
1047         * arm-opc.h Maverick accumulator register opcode fixes.
1048
1049 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
1050
1051         * m32r-dis.c: Regenerate.
1052
1053 2004-01-27  Michael Snyder  <msnyder@redhat.com>
1054
1055         * sh-opc.h (sh_table): "fsrra", not "fssra".
1056
1057 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
1058
1059         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1060         contraints.
1061
1062 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
1063
1064         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1065
1066 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
1067
1068         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1069         1.  Don't print scale factor on AT&T mode when index missing.
1070
1071 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
1072
1073         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1074         when loaded into XR registers.
1075
1076 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1077
1078         * frv-desc.h: Regenerate.
1079         * frv-desc.c: Regenerate.
1080         * frv-opc.c: Regenerate.
1081
1082 2004-01-13  Michael Snyder  <msnyder@redhat.com>
1083
1084         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1085
1086 2004-01-09  Paul Brook  <paul@codesourcery.com>
1087
1088         * arm-opc.h (arm_opcodes): Move generic mcrr after known
1089         specific opcodes.
1090
1091 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
1092
1093         * Makefile.am (libopcodes_la_DEPENDENCIES)
1094         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1095         comment about the problem.
1096         * Makefile.in: Regenerate.
1097
1098 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1099
1100         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1101         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1102         cut&paste errors in shifting/truncating numerical operands.
1103         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1104         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1105         (parse_uslo16): Likewise.
1106         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1107         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1108         (parse_s12): Likewise.
1109         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1110         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1111         (parse_uslo16): Likewise.
1112         (parse_uhi16): Parse gothi and gotfuncdeschi.
1113         (parse_d12): Parse got12 and gotfuncdesc12.
1114         (parse_s12): Likewise.
1115
1116 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1117
1118         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1119         instruction which looks similar to an 'rla' instruction.
1120
1121 For older changes see ChangeLog-0203
1122 \f
1123 Local Variables:
1124 mode: change-log
1125 left-margin: 8
1126 fill-column: 74
1127 version-control: never
1128 End: