opcodes/ChangeLog

   1 2020-02-07  Sergey Belyashov  <sergey.belyashov@gmail.com>
   2
   3         PR 25469
   4         * z80-dis.c: Add support for GBZ80 opcodes.
   5
   6 2020-02-04  Alan Modra  <amodra@gmail.com>
   7
   8         * d30v-dis.c (print_insn): Make "val" and "opnum" unsigned.
   9
  10 2020-02-03  Alan Modra  <amodra@gmail.com>
  11
  12         * m32c-ibld.c: Regenerate.
  13
  14 2020-02-01  Alan Modra  <amodra@gmail.com>
  15
  16         * frv-ibld.c: Regenerate.
  17
  18 2020-01-31  Jan Beulich  <jbeulich@suse.com>
  19
  20         * i386-dis.c (EXxmm_mdq, xmm_mdq_mode): Delete.
  21         (intel_operand_size, OP_EX): Drop xmm_mdq_mode case label.
  22         (OP_E_memory): Replace xmm_mdq_mode case label by
  23         vex_scalar_w_dq_mode one.
  24         * i386-dis-evex-prefix.h: Replace EXxmm_mdq by EXVexWdqScalar.
  25
  26 2020-01-31  Jan Beulich  <jbeulich@suse.com>
  27
  28         * i386-dis.c (EXVexWdq, vex_w_dq_mode): Delete.
  29         (vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode,
  30         vex_scalar_w_dq_mode): Don't refer to vex_w_dq_mode in comments.
  31         (intel_operand_size): Drop vex_w_dq_mode case label.
  32
  33 2020-01-31  Richard Sandiford  <richard.sandiford@arm.com>
  34
  35         * aarch64-tbl.h (aarch64_opcode): Set C_MAX_ELEM for SVE bfcvt.
  36         Remove C_SCAN_MOVPRFX for SVE bfcvtnt.
  37
  38 2020-01-30  Alan Modra  <amodra@gmail.com>
  39
  40         * m32c-ibld.c: Regenerate.
  41
  42 2020-01-30  Jose E. Marchesi  <jose.marchesi@oracle.com>
  43
  44         * bpf-opc.c: Regenerate.
  45
  46 2020-01-30  Jan Beulich  <jbeulich@suse.com>
  47
  48         * i386-dis.c (X86_64_C2, X86_64_C3): New enumerators.
  49         (dis386): Use them to replace C2/C3 table entries.
  50         (x86_64_table): Add X86_64_C2 and X86_64_C3 entries.
  51         * i386-opc.tbl (ret): Split Cpu64 entries into AMD64 and Intel64
  52         ones. Use Size64 instead of DefaultSize on Intel64 ones.
  53         * i386-tbl.h: Re-generate.
  54
  55 2020-01-30  Jan Beulich  <jbeulich@suse.com>
  56
  57         * i386-opc.tbl (call): Drop DefaultSize from Intel64 JumpDword
  58         forms.
  59         (fldenv, fnstenv, fstenv, fnsave, fsave, frstor): Drop
  60         DefaultSize.
  61         * i386-tbl.h: Re-generate.
  62
  63 2020-01-30  Alan Modra  <amodra@gmail.com>
  64
  65         * tic4x-dis.c (tic4x_dp): Make unsigned.
  66
  67 2020-01-27  H.J. Lu  <hongjiu.lu@intel.com>
  68             Jan Beulich  <jbeulich@suse.com>
  69
  70         PR binutils/25445
  71         * i386-dis.c (MOVSXD_Fixup): New function.
  72         (movsxd_mode): New enum.
  73         (x86_64_table): Use MOVSXD_Fixup and movsxd_mode on movsxd.
  74         (intel_operand_size): Handle movsxd_mode.
  75         (OP_E_register): Likewise.
  76         (OP_G): Likewise.
  77         * i386-opc.tbl: Remove Rex64 and allow 32-bit destination
  78         register on movsxd.  Add movsxd with 16-bit destination register
  79         for AMD64 and Intel64 ISAs.
  80         * i386-tbl.h: Regenerated.
  81
  82 2020-01-27  Tamar Christina  <tamar.christina@arm.com>
  83
  84         PR 25403
  85         * aarch64-tbl.h (struct aarch64_opcode): Re-order cfinv.
  86         * aarch64-asm-2.c: Regenerate
  87         * aarch64-dis-2.c: Likewise.
  88         * aarch64-opc-2.c: Likewise.
  89
  90 2020-01-21  Jan Beulich  <jbeulich@suse.com>
  91
  92         * i386-opc.tbl (sysret): Drop DefaultSize.
  93         * i386-tbl.h: Re-generate.
  94
  95 2020-01-21  Jan Beulich  <jbeulich@suse.com>
  96
  97         * i386-opc.tbl (vcvtneps2bf16x): Add Broadcast, Xmmword, and
  98         Dword.
  99         (vcvtneps2bf16y): Add Broadcast, Ymmword, and Dword.
 100         * i386-tbl.h: Re-generate.
 101
 102 2020-01-20  Nick Clifton  <nickc@redhat.com>
 103
 104         * po/de.po: Updated German translation.
 105         * po/pt_BR.po: Updated Brazilian Portuguese translation.
 106         * po/uk.po: Updated Ukranian translation.
 107
 108 2020-01-20  Alan Modra  <amodra@gmail.com>
 109
 110         * hppa-dis.c (fput_const): Remove useless cast.
 111
 112 2020-01-20  Alan Modra  <amodra@gmail.com>
 113
 114         * arm-dis.c (print_insn_arm): Wrap 'T' value.
 115
 116 2020-01-18  Nick Clifton  <nickc@redhat.com>
 117
 118         * configure: Regenerate.
 119         * po/opcodes.pot: Regenerate.
 120
 121 2020-01-18  Nick Clifton  <nickc@redhat.com>
 122
 123         Binutils 2.34 branch created.
 124
 125 2020-01-17  Christian Biesinger  <cbiesinger@google.com>
 126
 127         * opintl.h: Fix spelling error (seperate).
 128
 129 2020-01-17  H.J. Lu  <hongjiu.lu@intel.com>
 130
 131         * i386-opc.tbl: Add {vex} pseudo prefix.
 132         * i386-tbl.h: Regenerated.
 133
 134 2020-01-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
 135
 136         PR 25376
 137         * opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
 138         (neon_opcodes): Likewise.
 139         (select_arm_features): Make sure we enable MVE bits when selecting
 140         armv8.1-m.main.  Make sure we do not enable MVE bits when not selecting
 141         any architecture.
 142
 143 2020-01-16  Jan Beulich  <jbeulich@suse.com>
 144
 145         * i386-opc.tbl: Drop stale comment from XOP section.
 146
 147 2020-01-16  Jan Beulich  <jbeulich@suse.com>
 148
 149         * i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
 150         (extractps): Add VexWIG to SSE2AVX forms.
 151         * i386-tbl.h: Re-generate.
 152
 153 2020-01-16  Jan Beulich  <jbeulich@suse.com>
 154
 155         * i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
 156         Size64 from and use VexW1 on SSE2AVX forms.
 157         (vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
 158         VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
 159         * i386-tbl.h: Re-generate.
 160
 161 2020-01-15  Alan Modra  <amodra@gmail.com>
 162
 163         * tic4x-dis.c (tic4x_version): Make unsigned long.
 164         (optab, optab_special, registernames): New file scope vars.
 165         (tic4x_print_register): Set up registernames rather than
 166         malloc'd registertable.
 167         (tic4x_disassemble): Delete optable and optable_special.  Use
 168         optab and optab_special instead.  Throw away old optab,
 169         optab_special and registernames when info->mach changes.
 170
 171 2020-01-14  Sergey Belyashov  <sergey.belyashov@gmail.com>
 172
 173         PR 25377
 174         * z80-dis.c (suffix): Use .db instruction to generate double
 175         prefix.
 176
 177 2020-01-14  Alan Modra  <amodra@gmail.com>
 178
 179         * z8k-dis.c (unpack_instr): Formatting.  Cast unsigned short
 180         values to unsigned before shifting.
 181
 182 2020-01-13  Thomas Troeger  <tstroege@gmx.de>
 183
 184         * arm-dis.c (print_insn_arm): Fill in insn info fields for control
 185         flow instructions.
 186         (print_insn_thumb16, print_insn_thumb32): Likewise.
 187         (print_insn): Initialize the insn info.
 188         * i386-dis.c (print_insn): Initialize the insn info fields, and
 189         detect jumps.
 190
 191 2012-01-13  Claudiu Zissulescu <claziss@gmail.com>
 192
 193         * arc-opc.c (C_NE): Make it required.
 194
 195 2012-01-13  Claudiu Zissulescu <claziss@gmail.com>
 196
 197         * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
 198         reserved register name.
 199
 200 2020-01-13  Alan Modra  <amodra@gmail.com>
 201
 202         * ns32k-dis.c (Is_gen): Use strchr, add 'f'.
 203         (print_insn_ns32k): Adjust ioffset for 'f' index_offset.
 204
 205 2020-01-13  Alan Modra  <amodra@gmail.com>
 206
 207         * wasm32-dis.c (print_insn_wasm32): Localise variables.  Store
 208         result of wasm_read_leb128 in a uint64_t and check that bits
 209         are not lost when copying to other locals.  Use uint32_t for
 210         most locals.  Use PRId64 when printing int64_t.
 211
 212 2020-01-13  Alan Modra  <amodra@gmail.com>
 213
 214         * score-dis.c: Formatting.
 215         * score7-dis.c: Formatting.
 216
 217 2020-01-13  Alan Modra  <amodra@gmail.com>
 218
 219         * score-dis.c (print_insn_score48): Use unsigned variables for
 220         unsigned values.  Don't left shift negative values.
 221         (print_insn_score32): Likewise.
 222         * score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
 223
 224 2020-01-13  Alan Modra  <amodra@gmail.com>
 225
 226         * tic4x-dis.c (tic4x_print_register): Remove dead code.
 227
 228 2020-01-13  Alan Modra  <amodra@gmail.com>
 229
 230         * fr30-ibld.c: Regenerate.
 231
 232 2020-01-13  Alan Modra  <amodra@gmail.com>
 233
 234         * xgate-dis.c (print_insn): Don't left shift signed value.
 235         (ripBits): Formatting, use 1u.
 236
 237 2020-01-10  Alan Modra  <amodra@gmail.com>
 238
 239         * tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
 240         * tilegx-opc.c (parse_insn_tilegx): Likewise.  Delete raw_opval.
 241
 242 2020-01-10  Alan Modra  <amodra@gmail.com>
 243
 244         * m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
 245         and XRREG value earlier to avoid a shift with negative exponent.
 246         * m10200-dis.c (disassemble): Similarly.
 247
 248 2020-01-09  Nick Clifton  <nickc@redhat.com>
 249
 250         PR 25224
 251         * z80-dis.c (ld_ii_ii): Use correct cast.
 252
 253 2020-01-03  Sergey Belyashov  <sergey.belyashov@gmail.com>
 254
 255         PR 25224
 256         * z80-dis.c (ld_ii_ii): Use character constant when checking
 257         opcode byte value.
 258
 259 2020-01-09  Jan Beulich  <jbeulich@suse.com>
 260
 261         * i386-dis.c (SEP_Fixup): New.
 262         (SEP): Define.
 263         (dis386_twobyte): Use it for sysenter/sysexit.
 264         (enum x86_64_isa): Change amd64 enumerator to value 1.
 265         (OP_J): Compare isa64 against intel64 instead of amd64.
 266         * i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
 267         forms.
 268         * i386-tbl.h: Re-generate.
 269
 270 2020-01-08  Alan Modra  <amodra@gmail.com>
 271
 272         * z8k-dis.c: Include libiberty.h
 273         (instr_data_s): Make max_fetched unsigned.
 274         (z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
 275         Don't exceed byte_info bounds.
 276         (output_instr): Make num_bytes unsigned.
 277         (unpack_instr): Likewise for nibl_count and loop.
 278         * z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
 279         idx unsigned.
 280         * z8k-opc.h: Regenerate.
 281
 282 2020-01-07  Shahab Vahedi  <shahab@synopsys.com>
 283
 284         * arc-tbl.h (llock): Use 'LLOCK' as class.
 285         (llockd): Likewise.
 286         (scond): Use 'SCOND' as class.
 287         (scondd): Likewise.
 288         (llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
 289         (scondd): Likewise.
 290
 291 2020-01-06  Alan Modra  <amodra@gmail.com>
 292
 293         * m32c-ibld.c: Regenerate.
 294
 295 2020-01-06  Alan Modra  <amodra@gmail.com>
 296
 297         PR 25344
 298         * z80-dis.c (suffix): Don't use a local struct buffer copy.
 299         Peek at next byte to prevent recursion on repeated prefix bytes.
 300         Ensure uninitialised "mybuf" is not accessed.
 301         (print_insn_z80): Don't zero n_fetch and n_used here,..
 302         (print_insn_z80_buf): ..do it here instead.
 303
 304 2020-01-04  Alan Modra  <amodra@gmail.com>
 305
 306         * m32r-ibld.c: Regenerate.
 307
 308 2020-01-04  Alan Modra  <amodra@gmail.com>
 309
 310         * cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
 311
 312 2020-01-04  Alan Modra  <amodra@gmail.com>
 313
 314         * crx-dis.c (match_opcode): Avoid shift left of signed value.
 315
 316 2020-01-04  Alan Modra  <amodra@gmail.com>
 317
 318         * d30v-dis.c (print_insn): Avoid signed overflow in left shift.
 319
 320 2020-01-03  Jan Beulich  <jbeulich@suse.com>
 321
 322         * aarch64-tbl.h (aarch64_opcode_table): Use
 323         SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
 324
 325 2020-01-03  Jan Beulich  <jbeulich@suse.com>
 326
 327         * aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
 328         forms of SUDOT and USDOT.
 329
 330 2020-01-03  Jan Beulich  <jbeulich@suse.com>
 331
 332         * aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
 333         uzip{1,2}.
 334         * opcodes/aarch64-dis-2.c: Re-generate.
 335
 336 2020-01-03  Jan Beulich  <jbeulich@suse.com>
 337
 338         * aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
 339         FMMLA encoding.
 340         * opcodes/aarch64-dis-2.c: Re-generate.
 341
 342 2020-01-02  Sergey Belyashov  <sergey.belyashov@gmail.com>
 343
 344         * z80-dis.c: Add support for eZ80 and Z80 instructions.
 345
 346 2020-01-01  Alan Modra  <amodra@gmail.com>
 347
 348         Update year range in copyright notice of all files.
 349
 350 For older changes see ChangeLog-2019
 351 \f
 352 Copyright (C) 2020 Free Software Foundation, Inc.
 353
 354 Copying and distribution of this file, with or without modification,
 355 are permitted in any medium without royalty provided the copyright
 356 notice and this notice are preserved.
 357
 358 Local Variables:
 359 mode: change-log
 360 left-margin: 8
 361 fill-column: 74
 362 version-control: never
 363 End: