1 2019-04-24 John Darrington <john@darrington.wattle.id.au>
3 * s12z-opc.h: Add extern "C" bracketing to help
4 users who wish to use this interface in c++ code.
6 2019-04-24 John Darrington <john@darrington.wattle.id.au>
8 * s12z-opc.c (bm_decode): Handle bit map operations with the
11 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
13 * arm-dis.c (coprocessor_opcodes): Document new %J and %K format
14 specifier. Add entries for VLDR and VSTR of system registers.
15 (print_insn_coprocessor): Forbid coprocessor numbers 8, 14 and 15 in
16 coprocessor instructions on Armv8.1-M Mainline targets. Add handling
17 of %J and %K format specifier.
19 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
21 * arm-dis.c (coprocessor_opcodes): Document new %C format control code.
22 Add new entries for VSCCLRM instruction.
23 (print_insn_coprocessor): Handle new %C format control code.
25 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
27 * arm-dis.c (enum isa): New enum.
28 (struct sopcode32): New structure.
29 (coprocessor_opcodes): change type of entries to struct sopcode32 and
30 set isa field of all current entries to ANY.
31 (print_insn_coprocessor): Change type of insn to struct sopcode32.
32 Only match an entry if its isa field allows the current mode.
34 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
36 * arm-dis.c (thumb_opcodes): Document %n control code. Add entry for
38 (print_insn_thumb32): Add logic to print %n CLRM register list.
40 2019-04-15 Sudakshina Das <sudi.das@arm.com>
42 * arm-dis.c (print_insn_thumb32): Updated to accept new %P
45 2019-04-15 Sudakshina Das <sudi.das@arm.com>
47 * arm-dis.c (thumb32_opcodes): New instruction bfcsel.
48 (print_insn_thumb32): Edit the switch case for %Z.
50 2019-04-15 Sudakshina Das <sudi.das@arm.com>
52 * arm-dis.c (print_insn_thumb32): Updated to accept new %Z pattern.
54 2019-04-15 Sudakshina Das <sudi.das@arm.com>
56 * arm-dis.c (thumb32_opcodes): New instruction bfl.
58 2019-04-15 Sudakshina Das <sudi.das@arm.com>
60 * arm-dis.c (print_insn_thumb32): Updated to accept new %Y pattern.
62 2019-04-15 Sudakshina Das <sudi.das@arm.com>
64 * arm-dis.c (print_insn_thumb32): Add '%<bitfield>S' to print an
65 Arm register with r13 and r15 unpredictable.
66 (thumb32_opcodes): New instructions for bfx and bflx.
68 2019-04-15 Sudakshina Das <sudi.das@arm.com>
70 * arm-dis.c (thumb32_opcodes): New instructions for bf.
72 2019-04-15 Sudakshina Das <sudi.das@arm.com>
74 * arm-dis.c (print_insn_thumb32): Updated to accept new %W pattern.
76 2019-04-15 Sudakshina Das <sudi.das@arm.com>
78 * arm-dis.c (print_insn_thumb32): Updated to accept new %G pattern.
80 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
82 * arm-dis.c (select_arm_features): Add logic for Armv8.1-M Mainline.
84 2019-04-12 John Darrington <john@darrington.wattle.id.au>
86 s12z-dis.c, s12z-opc.c, s12z-opc.h: Replace "operator" with
87 "optr". ("operator" is a reserved word in c++).
89 2019-04-11 Sudakshina Das <sudi.das@arm.com>
91 * aarch64-opc.c (aarch64_print_operand): Add case for
93 (verify_constraints): Likewise.
94 * aarch64-tbl.h (QL_LDST_AT): Update to add SP qualifier.
95 (struct aarch64_opcode): Update stg, stzg, st2g, stz2g instructions
96 to accept Rt|SP as first operand.
97 (AARCH64_OPERANDS): Add new Rt_SP.
98 * aarch64-asm-2.c: Regenerated.
99 * aarch64-dis-2.c: Regenerated.
100 * aarch64-opc-2.c: Regenerated.
102 2019-04-11 Sudakshina Das <sudi.das@arm.com>
104 * aarch64-asm-2.c: Regenerated.
105 * aarch64-dis-2.c: Likewise.
106 * aarch64-opc-2.c: Likewise.
107 * aarch64-tbl.h (aarch64_opcode): Add new ldgm and stgm.
109 2019-04-09 Robert Suchanek <robert.suchanek@mips.com>
111 * mips-opc.c (mips_builtin_opcodes): Add RDHWR rt rd sel.
113 2019-04-08 H.J. Lu <hongjiu.lu@intel.com>
115 * i386-opc.tbl: Consolidate AVX512 BF16 entries.
116 * i386-init.h: Regenerated.
118 2019-04-07 Alan Modra <amodra@gmail.com>
120 * ppc-dis.c (print_insn_powerpc): Use a tiny state machine
121 op_separator to control printing of spaces, comma and parens
122 rather than need_comma, need_paren and spaces vars.
124 2019-04-07 Alan Modra <amodra@gmail.com>
127 * arm-dis.c (print_insn_coprocessor): Correct bracket placement.
128 (print_insn_neon, print_insn_arm): Likewise.
130 2019-04-05 Xuepeng Guo <xuepeng.guo@intel.com>
132 * i386-dis-evex.h (evex_table): Updated to support BF16
134 * i386-dis.c (enum): Add EVEX_W_0F3852_P_1, EVEX_W_0F3872_P_1
135 and EVEX_W_0F3872_P_3.
136 * i386-gen.c (cpu_flag_init): Add CPU_AVX512_BF16_FLAGS.
137 (cpu_flags): Add bitfield for CpuAVX512_BF16.
138 * i386-opc.h (enum): Add CpuAVX512_BF16.
139 (i386_cpu_flags): Add bitfield for cpuavx512_bf16.
140 * i386-opc.tbl: Add AVX512 BF16 instructions.
141 * i386-init.h: Regenerated.
142 * i386-tbl.h: Likewise.
144 2019-04-05 Alan Modra <amodra@gmail.com>
146 * ppc-opc.c (XLBH_MASK): Subtract off BH field from BB_MASK.
147 (powerpc_opcodes): Reorder bcctr and bclr extended mnemonics
148 to favour printing of "-" branch hint when using the "y" bit.
149 Allow BH field on bc{ctr,lr,tar}{,l}{-,+}.
151 2019-04-05 Alan Modra <amodra@gmail.com>
153 * ppc-dis.c (print_insn_powerpc): Delay printing spaces after
154 opcode until first operand is output.
156 2019-04-04 Peter Bergner <bergner@linux.ibm.com>
159 * ppc-opc.c (valid_bo_pre_v2): Add comments.
160 (valid_bo_post_v2): Add support for 'at' branch hints.
161 (insert_bo): Only error on branch on ctr.
162 (get_bo_hint_mask): New function.
163 (insert_boe): Add new 'branch_taken' formal argument. Add support
164 for inserting 'at' branch hints.
165 (extract_boe): Add new 'branch_taken' formal argument. Add support
166 for extracting 'at' branch hints.
167 (insert_bom, extract_bom, insert_bop, extract_bop): New functions.
168 (BOE): Delete operand.
169 (BOM, BOP): New operands.
171 (XLYLK, XLYLK_MASK, XLYBB_MASK): Delete.
172 (powerpc_opcodes) <bc-, bcl-, bca-, bcla-, bclr-, bclrl-, bcctr-,
173 bcctrl-, bctar-, bctarl->: Replace BOE with BOM.
174 (powerpc_opcodes) <bc+, bcl+, bca+, bcla+, bclr+, bclrl+, bcctr+,
175 bcctrl+, bctar+, bctarl+>: Replace BOE with BOP.
176 <bdnztar, bdnztarl, bdztar, bdztarl, btar, btarl, bdnztar-, bdnztarl-,
177 bdnztar+, bdnztarl+, bdztar-, bdztarl-, bdztar+, bdztarl+, bgetar,
178 bnltar, bgetarl, bnltarl, bletar, bngtar, bletarl, bngtarl, bnetar,
179 bnetarl, bnstar, bnutar, bnstarl, bnutarl, bgetar-, bnltar-, bgetarl-,
180 bnltarl-, bletar-, bngtar-, bletarl-, bngtarl-, bnetar-, bnetarl-,
181 bnstar-, bnutar-, bnstarl-, bnutarl-, bgetar+, bnltar+, bgetarl+,
182 bnltarl+, bletar+, bngtar+, bletarl+, bngtarl+, bnetar+, bnetarl+,
183 bnstar+, bnutar+, bnstarl+, bnutarl+, blttar, blttarl, bgttar, bgttarl,
184 beqtar, beqtarl, bsotar, buntar, bsotarl, buntarl, blttar-, blttarl-,
185 bgttar-, bgttarl-, beqtar-, beqtarl-, bsotar-, buntar-, bsotarl-,
186 buntarl-, blttar+, blttarl+, bgttar+, bgttarl+, beqtar+, beqtarl+,
187 bsotar+, buntar+, bsotarl+, buntarl+, bdnzftar, bdnzftarl, bdzftar,
188 bdzftarl, bftar, bftarl, bftar-, bftarl-, bftar+, bftarl+, bdnzttar,
189 bdnzttarl, bdzttar, bdzttarl, bttar, bttarl, bttar-, bttarl-, bttar+,
190 bttarl+>: New extended mnemonics.
192 2019-03-28 Alan Modra <amodra@gmail.com>
195 * ppc-opc.c (BTF): Define.
196 (powerpc_opcodes): Use for mtfsb*.
197 * ppc-dis.c (print_insn_powerpc): Print fields with both
198 PPC_OPERAND_CR_REG and PPC_OPERAND_CR_BIT as a plain number.
200 2019-03-25 Tamar Christina <tamar.christina@arm.com>
202 * arm-dis.c (struct arm_private_data): Remove has_mapping_symbols.
203 (mapping_symbol_for_insn): Implement new algorithm.
204 (print_insn): Remove duplicate code.
206 2019-03-25 Tamar Christina <tamar.christina@arm.com>
208 * aarch64-dis.c (print_insn_aarch64):
211 2019-03-25 Tamar Christina <tamar.christina@arm.com>
213 * aarch64-dis.c (print_insn_aarch64): Update the mapping symbol search
216 2019-03-25 Tamar Christina <tamar.christina@arm.com>
218 * aarch64-dis.c (last_stop_offset): New.
219 (print_insn_aarch64): Use stop_offset.
221 2019-03-19 H.J. Lu <hongjiu.lu@intel.com>
224 * i386-gen.c (cpu_flag_init): Add CPU_ANY_AVX512F_FLAGS to
226 * i386-init.h: Regenerated.
228 2019-03-18 H.J. Lu <hongjiu.lu@intel.com>
231 * i386-opc.tbl: Add Optimize to vmovdqa32, vmovdqa64, vmovdqu8,
232 vmovdqu16, vmovdqu32 and vmovdqu64.
233 * i386-tbl.h: Regenerated.
235 2019-03-12 Andreas Krebbel <krebbel@linux.ibm.com>
237 * s390-opc.txt: Rename selhhhr to selfhr. Remove optional operand
238 from vstrszb, vstrszh, and vstrszf.
240 2019-03-12 Andreas Krebbel <krebbel@linux.ibm.com>
242 * s390-opc.txt: Add instruction descriptions.
244 2019-02-08 Jim Wilson <jimw@sifive.com>
246 * riscv-opc.c (riscv_opcodes) <beq>: Use Cz to compress 3 operand form.
249 2019-02-07 Tamar Christina <tamar.christina@arm.com>
251 * arm-dis.c (arm_opcodes): Redefine hlt to armv1.
253 2019-02-07 Tamar Christina <tamar.christina@arm.com>
256 * aarch64-opc.h (enum aarch64_field_kind): Add FLD_sz.
257 * aarch64-opc.c (verify_elem_sd): New.
258 (fields): Add FLD_sz entr.
259 * aarch64-tbl.h (_SIMD_INSN): New.
260 (aarch64_opcode_table): Add elem_sd verifier to fmla, fmls, fmul and
261 fmulx scalar and vector by element isns.
263 2019-02-07 Nick Clifton <nickc@redhat.com>
265 * po/sv.po: Updated Swedish translation.
267 2019-01-31 Andreas Krebbel <krebbel@linux.ibm.com>
269 * s390-mkopc.c (main): Accept arch13 as cpu string.
270 * s390-opc.c: Add new instruction formats and instruction opcode
272 * s390-opc.txt: Add new arch13 instructions.
274 2019-01-25 Sudakshina Das <sudi.das@arm.com>
276 * aarch64-tbl.h (QL_LDST_AT): Update macro.
277 (aarch64_opcode): Change encoding for stg, stzg
279 * aarch64-asm-2.c: Regenerated.
280 * aarch64-dis-2.c: Regenerated.
281 * aarch64-opc-2.c: Regenerated.
283 2019-01-25 Sudakshina Das <sudi.das@arm.com>
285 * aarch64-asm-2.c: Regenerated.
286 * aarch64-dis-2.c: Likewise.
287 * aarch64-opc-2.c: Likewise.
288 * aarch64-tbl.h (aarch64_opcode): Add new stzgm.
290 2019-01-25 Sudakshina Das <sudi.das@arm.com>
291 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
293 * aarch64-asm.c (aarch64_ins_addr_simple_2): Remove.
294 * aarch64-asm.h (ins_addr_simple_2): Likeiwse.
295 * aarch64-dis.c (aarch64_ext_addr_simple_2): Likewise.
296 * aarch64-dis.h (ext_addr_simple_2): Likewise.
297 * aarch64-opc.c (operand_general_constraint_met_p): Remove
298 case for ldstgv_indexed.
299 (aarch64_print_operand): Remove case for AARCH64_OPND_ADDR_SIMPLE_2.
300 * aarch64-tbl.h (struct aarch64_opcode): Remove ldgv and stgv.
301 (AARCH64_OPERANDS): Remove ADDR_SIMPLE_2.
302 * aarch64-asm-2.c: Regenerated.
303 * aarch64-dis-2.c: Regenerated.
304 * aarch64-opc-2.c: Regenerated.
306 2019-01-23 Nick Clifton <nickc@redhat.com>
308 * po/pt_BR.po: Updated Brazilian Portuguese translation.
310 2019-01-21 Nick Clifton <nickc@redhat.com>
312 * po/de.po: Updated German translation.
313 * po/uk.po: Updated Ukranian translation.
315 2019-01-20 Chenghua Xu <paul.hua.gm@gmail.com>
316 * mips-dis.c (mips_arch_choices): Fix typo in
317 gs464, gs464e and gs264e descriptors.
319 2019-01-19 Nick Clifton <nickc@redhat.com>
321 * configure: Regenerate.
322 * po/opcodes.pot: Regenerate.
324 2018-06-24 Nick Clifton <nickc@redhat.com>
328 2019-01-09 John Darrington <john@darrington.wattle.id.au>
330 * s12z-dis.c (print_insn_s12z): Do not dereference an operand
332 -dis.c (opr_emit_disassembly): Do not omit an index if it is
335 2019-01-09 Andrew Paprocki <andrew@ishiboo.com>
337 * configure: Regenerate.
339 2019-01-07 Alan Modra <amodra@gmail.com>
341 * configure: Regenerate.
342 * po/POTFILES.in: Regenerate.
344 2019-01-03 John Darrington <john@darrington.wattle.id.au>
346 * s12z-opc.c: New file.
347 * s12z-opc.h: New file.
348 * s12z-dis.c: Removed all code not directly related to display
349 of instructions. Used the interface provided by the new files
351 * Makefile.am (TARGET_LIBOPCODES_CFILES) Add s12z-opc.c.
352 * Makefile.in: Regenerate.
353 * configure.ac (bfd_s12z_arch): Correct the dependencies.
354 * configure: Regenerate.
356 2019-01-01 Alan Modra <amodra@gmail.com>
358 Update year range in copyright notice of all files.
360 For older changes see ChangeLog-2018
362 Copyright (C) 2019 Free Software Foundation, Inc.
364 Copying and distribution of this file, with or without modification,
365 are permitted in any medium without royalty provided the copyright
366 notice and this notice are preserved.
372 version-control: never