1 2005-11-02 H.J. Lu <hongjiu.lu@intel.com>
3 * iq2000-desc.c: Regenerated.
4 * iq2000-desc.h: Likewise.
5 * iq2000-dis.c: Likewise.
6 * iq2000-opc.c: Likewise.
8 2005-11-02 Paul Brook <paul@codesourcery.com>
10 * arm-dis.c (print_insn_thumb32): Word align blx target address.
12 2005-10-31 Alan Modra <amodra@bigpond.net.au>
14 * arm-dis.c (print_insn): Warning fix.
16 2005-10-30 H.J. Lu <hongjiu.lu@intel.com>
18 * Makefile.am: Run "make dep-am".
19 * Makefile.in: Regenerated.
21 * dep-in.sed: Replace " ./" with " ".
23 2005-10-28 Dave Brolley <brolley@redhat.com>
25 * All CGEN-generated sources: Regenerate.
27 Contribute the following changes:
28 2005-09-19 Dave Brolley <brolley@redhat.com>
30 * disassemble.c (disassemble_init_for_target): Add 'break' to case for
31 bfd_arch_tic4x. Use cgen_bitset_create and cgen_bitset_set for
34 2005-02-16 Dave Brolley <brolley@redhat.com>
36 * cgen-dis.in: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename
37 cgen_isa_mask_* to cgen_bitset_*.
38 * cgen-opc.c: Likewise.
40 2003-11-28 Richard Sandiford <rsandifo@redhat.com>
42 * cgen-dis.in (print_insn_@arch@): Fix comparison with cached isas.
43 * *-dis.c: Regenerate.
45 2003-06-05 DJ Delorie <dj@redhat.com>
47 * cgen-dis.in (print_insn_@arch@): Copy prev_isas, don't assign
48 it, as it may point to a reused buffer. Set prev_isas when we
51 2002-12-13 Dave Brolley <brolley@redhat.com>
53 * cgen-opc.c (cgen_isa_mask_create): New support function for
55 (cgen_isa_mask_init): Ditto.
56 (cgen_isa_mask_clear): Ditto.
57 (cgen_isa_mask_add): Ditto.
58 (cgen_isa_mask_set): Ditto.
59 (cgen_isa_supported): Ditto.
60 (cgen_isa_mask_compare): Ditto.
61 (cgen_isa_mask_intersection): Ditto.
62 (cgen_isa_mask_copy): Ditto.
63 (cgen_isa_mask_combine): Ditto.
64 * cgen-dis.in (libiberty.h): #include it.
65 (isas): Renamed from 'isa' and now (CGEN_ISA_MASK *).
66 (print_insn_@arch@): Use CGEN_ISA_MASK and support functions.
67 * Makefile.am (CGENDEPS): Add utils-cgen.scm and attrs.scm.
68 * Makefile.in: Regenerated.
70 2005-10-27 DJ Delorie <dj@redhat.com>
72 * m32c-asm.c: Regenerate.
73 * m32c-desc.c: Regenerate.
74 * m32c-desc.h: Regenerate.
75 * m32c-dis.c: Regenerate.
76 * m32c-ibld.c: Regenerate.
77 * m32c-opc.c: Regenerate.
78 * m32c-opc.h: Regenerate.
80 2005-10-26 DJ Delorie <dj@redhat.com>
82 * m32c-asm.c: Regenerate.
83 * m32c-desc.c: Regenerate.
84 * m32c-desc.h: Regenerate.
85 * m32c-dis.c: Regenerate.
86 * m32c-ibld.c: Regenerate.
87 * m32c-opc.c: Regenerate.
88 * m32c-opc.h: Regenerate.
90 2005-10-26 Paul Brook <paul@codesourcery.com>
92 * arm-dis.c (arm_opcodes): Correct "sel" entry.
94 2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
96 * m32r-asm.c: Regenerate.
98 2005-10-25 DJ Delorie <dj@redhat.com>
100 * m32c-asm.c: Regenerate.
101 * m32c-desc.c: Regenerate.
102 * m32c-desc.h: Regenerate.
103 * m32c-dis.c: Regenerate.
104 * m32c-ibld.c: Regenerate.
105 * m32c-opc.c: Regenerate.
106 * m32c-opc.h: Regenerate.
108 2005-10-25 Arnold Metselaar <arnold.metselaar@planet.nl>
110 * configure.in: Add target architecture bfd_arch_z80.
111 * configure: Regenerated.
112 * disassemble.c (disassembler)<ARCH_z80>: Add case
114 * z80-dis.c: New file.
116 2005-10-25 Alan Modra <amodra@bigpond.net.au>
118 * po/POTFILES.in: Regenerate.
119 * po/opcodes.pot: Regenerate.
121 2005-10-24 Jan Beulich <jbeulich@novell.com>
123 * ia64-asmtab.c: Regenerate.
125 2005-10-21 DJ Delorie <dj@redhat.com>
127 * m32c-asm.c: Regenerate.
128 * m32c-desc.c: Regenerate.
129 * m32c-desc.h: Regenerate.
130 * m32c-dis.c: Regenerate.
131 * m32c-ibld.c: Regenerate.
132 * m32c-opc.c: Regenerate.
133 * m32c-opc.h: Regenerate.
135 2005-10-21 Nick Clifton <nickc@redhat.com>
137 * bfin-dis.c: Tidy up code, removing redundant constructs.
139 2005-10-19 Martin Schwidefsky <schwidefsky@de.ibm.com>
141 * s390-opc.txt: Add unnormalized hfp multiply and multiply-and-add
144 2005-10-18 Nick Clifton <nickc@redhat.com>
146 * m32r-asm.c: Regenerate after updating m32r.opc.
148 2005-10-18 Jie Zhang <jie.zhang@analog.com>
150 * bfin-dis.c (print_insn_bfin): Do proper endian transform when
151 reading instruction from memory.
153 2005-10-18 Nick Clifton <nickc@redhat.com>
155 * m32r-asm.c: Regenerate after updating m32r.opc.
157 2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
159 * m32r-asm.c: Regenerate after updating m32r.opc.
161 2005-10-08 James Lemke <jim@wasabisystems.com>
163 * arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
166 2005-10-06 Daniel Jacobowitz <dan@codesourcery.com>
168 * ppc-dis.c (struct dis_private): Remove.
169 (powerpc_dialect): Avoid aliasing warnings.
170 (print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
172 2005-09-30 Nick Clifton <nickc@redhat.com>
174 * po/ga.po: New Irish translation.
175 * configure.in (ALL_LINGUAS): Add "ga".
176 * configure: Regenerate.
178 2005-09-30 H.J. Lu <hongjiu.lu@intel.com>
180 * Makefile.am: Run "make dep-am".
181 * Makefile.in: Regenerated.
182 * aclocal.m4: Likewise.
183 * configure: Likewise.
185 2005-09-30 Catherine Moore <clm@cm00re.com>
187 * Makefile.am: Bfin support.
188 * Makefile.in: Regenerated.
189 * aclocal.m4: Regenerated.
190 * bfin-dis.c: New file.
191 * configure.in: Bfin support.
192 * configure: Regenerated.
193 * disassemble.c (ARCH_bfin): Define.
194 (disassembler): Add case for bfd_arch_bfin.
196 2005-09-28 Jan Beulich <jbeulich@novell.com>
198 * i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
201 (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
202 (dis386): Document and use new 'V' meta character. Use it for
203 single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
204 opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
205 (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
206 data prefix as used whenever DFLAG was examined. Handle 'V'.
207 (intel_operand_size): Use stack_v_mode.
208 (OP_E): Use stack_v_mode, but handle only the special case of
209 64-bit mode without operand size override here; fall through to
210 v_mode case otherwise.
211 (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
212 and no operand size override is present.
213 (OP_J): Use get32s for obtaining the displacement also when rex64
216 2005-09-08 Paul Brook <paul@codesourcery.com>
218 * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
220 2005-09-06 Chao-ying Fu <fu@mips.com>
222 * mips-opc.c (MT32): New define.
223 (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
224 bottom to avoid opcode collision with "mftr" and "mttr".
226 * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
227 (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
230 2005-09-02 Paul Brook <paul@codesourcery.com>
232 * arm-dis.c (coprocessor_opcodes): Add null terminator.
234 2005-09-02 Paul Brook <paul@codesourcery.com>
236 * arm-dis.c (coprocessor_opcodes): New.
237 (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
238 (print_insn_coprocessor): New function.
239 (print_insn_arm): Use print_insn_coprocessor. Remove coprocessor
241 (print_insn_thumb32): Use print_insn_coprocessor.
243 2005-08-30 Paul Brook <paul@codesourcery.com>
245 * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
247 2005-08-26 Jan Beulich <jbeulich@novell.com>
249 * i386-dis.c (intel_operand_size): New, broken out from OP_E for
251 (OP_E): Call intel_operand_size, move call site out of mode
253 (OP_OFF): Call intel_operand_size if suffix_always. Remove
254 ATTRIBUTE_UNUSED from parameters.
255 (OP_OFF64): Likewise.
256 (OP_ESreg): Call intel_operand_size.
257 (OP_DSreg): Likewise.
258 (OP_DIR): Use colon rather than semicolon as separator of far
261 2005-08-25 Chao-ying Fu <fu@mips.com>
263 * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
264 (mips_builtin_opcodes): Add DSP instructions.
265 * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
267 (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
270 2005-08-23 David Ung <davidu@mips.com>
272 * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
273 instructions to the table.
275 2005-08-18 Alan Modra <amodra@bigpond.net.au>
277 * a29k-dis.c: Delete.
278 * Makefile.am: Remove a29k support.
279 * configure.in: Likewise.
280 * disassemble.c: Likewise.
281 * Makefile.in: Regenerate.
282 * configure: Regenerate.
283 * po/POTFILES.in: Regenerate.
285 2005-08-15 Daniel Jacobowitz <dan@codesourcery.com>
287 * ppc-dis.c (powerpc_dialect): Handle e300.
288 (print_ppc_disassembler_options): Likewise.
289 * ppc-opc.c (PPCE300): Define.
290 (powerpc_opcodes): Mark icbt as available for the e300.
292 2005-08-13 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
294 * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
295 Use "rp" instead of "%r2" in "b,l" insns.
297 2005-08-12 Martin Schwidefsky <schwidefsky@de.ibm.com>
299 * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
300 * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
302 * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
303 and 4 bit optional masks.
304 (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
305 INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
306 (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
307 MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
308 (s390_opformats): Likewise.
309 * s390-opc.txt: Add new instructions for cpu type z9-109.
311 2005-08-05 John David Anglin <dave.anglin@nrc-crnc.gc.ca>
313 * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
315 2005-07-29 Paul Brook <paul@codesourcery.com>
317 * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
319 2005-07-29 Paul Brook <paul@codesourcery.com>
321 * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
322 (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
324 2005-07-25 DJ Delorie <dj@redhat.com>
326 * m32c-asm.c Regenerate.
327 * m32c-dis.c Regenerate.
329 2005-07-20 DJ Delorie <dj@redhat.com>
331 * disassemble.c (disassemble_init_for_target): M32C ISAs are
332 enums, so convert them to bit masks, which attributes are.
334 2005-07-18 Nick Clifton <nickc@redhat.com>
336 * configure.in: Restore alpha ordering to list of arches.
337 * configure: Regenerate.
338 * disassemble.c: Restore alpha ordering to list of arches.
340 2005-07-18 Nick Clifton <nickc@redhat.com>
342 * m32c-asm.c: Regenerate.
343 * m32c-desc.c: Regenerate.
344 * m32c-desc.h: Regenerate.
345 * m32c-dis.c: Regenerate.
346 * m32c-ibld.h: Regenerate.
347 * m32c-opc.c: Regenerate.
348 * m32c-opc.h: Regenerate.
350 2005-07-18 H.J. Lu <hongjiu.lu@intel.com>
352 * i386-dis.c (PNI_Fixup): Update comment.
353 (VMX_Fixup): Properly handle the suffix check.
355 2005-07-16 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
357 * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
360 2005-07-16 Alan Modra <amodra@bigpond.net.au>
362 * Makefile.am: Run "make dep-am".
363 (stamp-m32c): Fix cpu dependencies.
364 * Makefile.in: Regenerate.
365 * ip2k-dis.c: Regenerate.
367 2007-07-15 H.J. Lu <hongjiu.lu@intel.com>
369 * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
370 (VMX_Fixup): New. Fix up Intel VMX Instructions.
374 (dis386_twobyte): Updated entries 0x78 and 0x79.
375 (twobyte_has_modrm): Likewise.
376 (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
377 (OP_G): Handle m_mode.
379 2005-07-14 Jim Blandy <jimb@redhat.com>
381 Add support for the Renesas M32C and M16C.
382 * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
383 * m32c-desc.h, m32c-opc.h: New.
384 * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
385 (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
387 (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
388 m32c-ibld.lo, m32c-opc.lo.
389 (CLEANFILES): List stamp-m32c.
390 (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
391 (CGEN_CPUS): Add m32c.
392 (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
393 (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
394 (m32c_opc_h): New variable.
395 (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
396 (m32c-opc.lo): New rules.
397 * Makefile.in: Regenerated.
398 * configure.in: Add case for bfd_m32c_arch.
399 * configure: Regenerated.
400 * disassemble.c (ARCH_m32c): New.
401 [ARCH_m32c]: #include "m32c-desc.h".
402 (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
403 (disassemble_init_for_target) [ARCH_m32c]: Same.
405 * cgen-ops.h, cgen-types.h: New files.
406 * Makefile.am (HFILES): List them.
407 * Makefile.in: Regenerated.
409 2005-07-07 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
411 * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
412 d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
413 ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
414 m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
415 ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
416 v850-dis.c: Fix format bugs.
417 * ia64-gen.c (fail, warn): Add format attribute.
418 * or32-opc.c (debug): Likewise.
420 2005-07-07 Khem Raj <kraj@mvista.com>
422 * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
425 2005-07-06 Alan Modra <amodra@bigpond.net.au>
427 * Makefile.am (stamp-m32r): Fix path to cpu files.
428 (stamp-m32r, stamp-iq2000): Likewise.
429 * Makefile.in: Regenerate.
430 * m32r-asm.c: Regenerate.
431 * po/POTFILES.in: Remove arm-opc.h. Add ms1-asm.c, ms1-desc.c,
432 ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
434 2005-07-05 Nick Clifton <nickc@redhat.com>
436 * iq2000-asm.c: Regenerate.
437 * ms1-asm.c: Regenerate.
439 2005-07-05 Jan Beulich <jbeulich@novell.com>
441 * i386-dis.c (SVME_Fixup): New.
442 (grps): Use it for the lidt entry.
443 (PNI_Fixup): Call OP_M rather than OP_E.
444 (INVLPG_Fixup): Likewise.
446 2005-07-04 H.J. Lu <hongjiu.lu@intel.com>
448 * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
450 2005-07-01 Nick Clifton <nickc@redhat.com>
452 * a29k-dis.c: Update to ISO C90 style function declarations and
454 * alpha-opc.c: Likewise.
455 * arc-dis.c: Likewise.
456 * arc-opc.c: Likewise.
457 * avr-dis.c: Likewise.
458 * cgen-asm.in: Likewise.
459 * cgen-dis.in: Likewise.
460 * cgen-ibld.in: Likewise.
461 * cgen-opc.c: Likewise.
462 * cris-dis.c: Likewise.
463 * d10v-dis.c: Likewise.
464 * d30v-dis.c: Likewise.
465 * d30v-opc.c: Likewise.
466 * dis-buf.c: Likewise.
467 * dlx-dis.c: Likewise.
468 * h8300-dis.c: Likewise.
469 * h8500-dis.c: Likewise.
470 * hppa-dis.c: Likewise.
471 * i370-dis.c: Likewise.
472 * i370-opc.c: Likewise.
473 * m10200-dis.c: Likewise.
474 * m10300-dis.c: Likewise.
475 * m68k-dis.c: Likewise.
476 * m88k-dis.c: Likewise.
477 * mips-dis.c: Likewise.
478 * mmix-dis.c: Likewise.
479 * msp430-dis.c: Likewise.
480 * ns32k-dis.c: Likewise.
481 * or32-dis.c: Likewise.
482 * or32-opc.c: Likewise.
483 * pdp11-dis.c: Likewise.
484 * pj-dis.c: Likewise.
485 * s390-dis.c: Likewise.
486 * sh-dis.c: Likewise.
487 * sh64-dis.c: Likewise.
488 * sparc-dis.c: Likewise.
489 * sparc-opc.c: Likewise.
490 * sysdep.h: Likewise.
491 * tic30-dis.c: Likewise.
492 * tic4x-dis.c: Likewise.
493 * tic80-dis.c: Likewise.
494 * v850-dis.c: Likewise.
495 * v850-opc.c: Likewise.
496 * vax-dis.c: Likewise.
497 * w65-dis.c: Likewise.
498 * z8kgen.c: Likewise.
500 * fr30-*: Regenerate.
502 * ip2k-*: Regenerate.
503 * iq2000-*: Regenerate.
504 * m32r-*: Regenerate.
506 * openrisc-*: Regenerate.
507 * xstormy16-*: Regenerate.
509 2005-06-23 Ben Elliston <bje@gnu.org>
511 * m68k-dis.c: Use ISC C90.
512 * m68k-opc.c: Formatting fixes.
514 2005-06-16 David Ung <davidu@mips.com>
516 * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
517 instructions to the table; seb/seh/sew/zeb/zeh/zew.
519 2005-06-15 Dave Brolley <brolley@redhat.com>
521 Contribute Morpho ms1 on behalf of Red Hat
522 * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
523 ms1-opc.h: New files, Morpho ms1 target.
525 2004-05-14 Stan Cox <scox@redhat.com>
527 * disassemble.c (ARCH_ms1): Define.
528 (disassembler): Handle bfd_arch_ms1
530 2004-05-13 Michael Snyder <msnyder@redhat.com>
532 * Makefile.am, Makefile.in: Add ms1 target.
533 * configure.in: Ditto.
535 2005-06-08 Zack Weinberg <zack@codesourcery.com>
537 * arm-opc.h: Delete; fold contents into ...
538 * arm-dis.c: ... here. Move includes of internal COFF headers
539 next to includes of internal ELF headers.
540 (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
541 (struct arm_opcode): Rename struct opcode32. Make 'assembler' const.
542 (struct thumb_opcode): Rename struct opcode16. Make 'assembler' const.
543 (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
544 (iwmmxt_wwnames, iwmmxt_wwssnames):
546 (regnames): Remove iWMMXt coprocessor register sets.
547 (iwmmxt_regnames, iwmmxt_cregnames): New statics.
548 (get_arm_regnames): Adjust fourth argument to match above changes.
549 (set_iwmmxt_regnames): Delete.
550 (print_insn_arm): Constify 'c'. Use ISO syntax for function
551 pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames
552 and iwmmxt_cregnames, not set_iwmmxt_regnames.
553 (print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use
554 ISO syntax for function pointer calls.
556 2005-06-07 Zack Weinberg <zack@codesourcery.com>
558 * arm-dis.c: Split up the comments describing the format codes, so
559 that the ARM and 16-bit Thumb opcode tables each have comments
560 preceding them that describe all the codes, and only the codes,
561 valid in those tables. (32-bit Thumb table is already like this.)
562 Reorder the lists in all three comments to match the order in
563 which the codes are implemented.
564 Remove all forward declarations of static functions. Convert all
565 function definitions to ISO C format.
566 (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
568 (print_insn_thumb16): Remove unused case 'I'.
569 (print_insn): Update for changed calling convention of subroutines.
571 2005-05-25 Jan Beulich <jbeulich@novell.com>
573 * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
574 hex (but retain it being displayed as signed). Remove redundant
575 checks. Add handling of displacements for 16-bit addressing in Intel
578 2005-05-25 Jan Beulich <jbeulich@novell.com>
580 * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
581 (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
582 masking of 'rm' in 16-bit memory address handling.
584 2005-05-19 Anton Blanchard <anton@samba.org>
586 * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
587 (print_ppc_disassembler_options): Document it.
588 * ppc-opc.c (SVC_LEV): Define.
589 (LEV): Allow optional operand.
591 (powerpc_opcodes): Extend "sc". Adjust "svc" and "svcl". Add
592 "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
594 2005-05-19 Kelley Cook <kcook@gcc.gnu.org>
596 * Makefile.in: Regenerate.
598 2005-05-17 Zack Weinberg <zack@codesourcery.com>
600 * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
601 instructions. Adjust disassembly of some opcodes to match
603 (thumb32_opcodes): New table.
604 (print_insn_thumb): Rename print_insn_thumb16; don't handle
605 two-halfword branches here.
606 (print_insn_thumb32): New function.
607 (print_insn): Choose among print_insn_arm, print_insn_thumb16,
608 and print_insn_thumb32. Be consistent about order of
609 halfwords when printing 32-bit instructions.
611 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
614 * i386-dis.c (branch_v_mode): New.
615 (indirEv): Use branch_v_mode instead of v_mode.
616 (OP_E): Handle branch_v_mode.
618 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
620 * d10v-dis.c (dis_2_short): Support 64bit host.
622 2005-05-07 Nick Clifton <nickc@redhat.com>
624 * po/nl.po: Updated translation.
626 2005-05-07 Nick Clifton <nickc@redhat.com>
628 * Update the address and phone number of the FSF organization in
629 the GPL notices in the following files:
630 a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
631 arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
632 avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
633 cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
634 crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
635 d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
636 fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
637 fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
638 frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
639 h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
640 i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
641 ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
642 ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
643 ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
644 ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
645 iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
646 iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
647 m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
648 m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
649 m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
650 maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
651 mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
652 openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
653 openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
654 or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
655 pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
656 s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
657 sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
658 tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
659 v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
660 xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
661 xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
662 xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
664 2005-05-05 James E Wilson <wilson@specifixinc.com>
666 * ia64-opc.c: Include sysdep.h before libiberty.h.
668 2005-05-05 Nick Clifton <nickc@redhat.com>
670 * configure.in (ALL_LINGUAS): Add vi.
671 * configure: Regenerate.
674 2005-04-26 Jerome Guitton <guitton@gnat.com>
676 * configure.in: Fix the check for basename declaration.
677 * configure: Regenerate.
679 2005-04-19 Alan Modra <amodra@bigpond.net.au>
681 * ppc-opc.c (RTO): Define.
682 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
683 entries to suit PPC440.
685 2005-04-18 Mark Kettenis <kettenis@gnu.org>
687 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
690 2005-04-14 Nick Clifton <nickc@redhat.com>
692 * po/fi.po: New translation: Finnish.
693 * configure.in (ALL_LINGUAS): Add fi.
694 * configure: Regenerate.
696 2005-04-14 Alan Modra <amodra@bigpond.net.au>
698 * Makefile.am (NO_WERROR): Define.
699 * configure.in: Invoke AM_BINUTILS_WARNINGS.
700 * Makefile.in: Regenerate.
701 * aclocal.m4: Regenerate.
702 * configure: Regenerate.
704 2005-04-04 Nick Clifton <nickc@redhat.com>
706 * fr30-asm.c: Regenerate.
707 * frv-asm.c: Regenerate.
708 * iq2000-asm.c: Regenerate.
709 * m32r-asm.c: Regenerate.
710 * openrisc-asm.c: Regenerate.
712 2005-04-01 Jan Beulich <jbeulich@novell.com>
714 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
715 visible operands in Intel mode. The first operand of monitor is
718 2005-04-01 Jan Beulich <jbeulich@novell.com>
720 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
721 easier future additions.
723 2005-03-31 Jerome Guitton <guitton@gnat.com>
725 * configure.in: Check for basename.
726 * configure: Regenerate.
729 2005-03-29 H.J. Lu <hongjiu.lu@intel.com>
731 * i386-dis.c (SEG_Fixup): New.
733 (dis386): Use "Sv" for 0x8c and 0x8e.
735 2005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
736 Nick Clifton <nickc@redhat.com>
738 * vax-dis.c: (entry_addr): New varible: An array of user supplied
739 function entry mask addresses.
740 (entry_addr_occupied_slots): New variable: The number of occupied
741 elements in entry_addr.
742 (entry_addr_total_slots): New variable: The total number of
743 elements in entry_addr.
744 (parse_disassembler_options): New function. Fills in the entry_addr
746 (free_entry_array): New function. Release the memory used by the
747 entry addr array. Suppressed because there is no way to call it.
748 (is_function_entry): Check if a given address is a function's
749 start address by looking at supplied entry mask addresses and
750 symbol information, if available.
751 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
753 2005-03-23 H.J. Lu <hongjiu.lu@intel.com>
755 * cris-dis.c (print_with_operands): Use ~31L for long instead
758 2005-03-20 H.J. Lu <hongjiu.lu@intel.com>
760 * mmix-opc.c (O): Revert the last change.
763 2005-03-19 H.J. Lu <hongjiu.lu@intel.com>
765 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
768 2005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
770 * mmix-opc.c (O, Z): Force expression as unsigned long.
772 2005-03-18 Nick Clifton <nickc@redhat.com>
774 * ip2k-asm.c: Regenerate.
775 * op/opcodes.pot: Regenerate.
777 2005-03-16 Nick Clifton <nickc@redhat.com>
778 Ben Elliston <bje@au.ibm.com>
780 * configure.in (werror): New switch: Add -Werror to the
781 compiler command line. Enabled by default. Disable via
783 * configure: Regenerate.
785 2005-03-16 Alan Modra <amodra@bigpond.net.au>
787 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
790 2005-03-15 Alan Modra <amodra@bigpond.net.au>
792 * po/es.po: Commit new Spanish translation.
794 * po/fr.po: Commit new French translation.
796 2005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
798 * vax-dis.c: Fix spelling error
799 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
800 of just "Entry mask: < r1 ... >"
802 2005-03-12 Zack Weinberg <zack@codesourcery.com>
804 * arm-dis.c (arm_opcodes): Document %E and %V.
805 Add entries for v6T2 ARM instructions:
806 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
807 (print_insn_arm): Add support for %E and %V.
808 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
810 2005-03-10 Jeff Baker <jbaker@qnx.com>
811 Alan Modra <amodra@bigpond.net.au>
813 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
814 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
816 (XSPRG_MASK): Mask off extra bits now part of sprg field.
817 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
818 mfsprg4..7 after msprg and consolidate.
820 2005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
822 * vax-dis.c (entry_mask_bit): New array.
823 (print_insn_vax): Decode function entry mask.
825 2005-03-07 Aldy Hernandez <aldyh@redhat.com>
827 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
829 2005-03-05 Alan Modra <amodra@bigpond.net.au>
831 * po/opcodes.pot: Regenerate.
833 2005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
835 * arc-dis.c (a4_decoding_class): New enum.
836 (dsmOneArcInst): Use the enum values for the decoding class.
837 Remove redundant case in the switch for decodingClass value 11.
839 2005-03-02 Jan Beulich <jbeulich@novell.com>
841 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
843 (OP_C): Consider lock prefix in non-64-bit modes.
845 2005-02-24 Alan Modra <amodra@bigpond.net.au>
847 * cris-dis.c (format_hex): Remove ineffective warning fix.
848 * crx-dis.c (make_instruction): Warning fix.
849 * frv-asm.c: Regenerate.
851 2005-02-23 Nick Clifton <nickc@redhat.com>
853 * cgen-dis.in: Use bfd_byte for buffers that are passed to
856 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
858 * crx-dis.c (make_instruction): Move argument structure into inner
859 scope and ensure that all of its fields are initialised before
862 * fr30-asm.c: Regenerate.
863 * fr30-dis.c: Regenerate.
864 * frv-asm.c: Regenerate.
865 * frv-dis.c: Regenerate.
866 * ip2k-asm.c: Regenerate.
867 * ip2k-dis.c: Regenerate.
868 * iq2000-asm.c: Regenerate.
869 * iq2000-dis.c: Regenerate.
870 * m32r-asm.c: Regenerate.
871 * m32r-dis.c: Regenerate.
872 * openrisc-asm.c: Regenerate.
873 * openrisc-dis.c: Regenerate.
874 * xstormy16-asm.c: Regenerate.
875 * xstormy16-dis.c: Regenerate.
877 2005-02-22 Alan Modra <amodra@bigpond.net.au>
879 * arc-ext.c: Warning fixes.
880 * arc-ext.h: Likewise.
881 * cgen-opc.c: Likewise.
882 * ia64-gen.c: Likewise.
883 * maxq-dis.c: Likewise.
884 * ns32k-dis.c: Likewise.
885 * w65-dis.c: Likewise.
886 * ia64-asmtab.c: Regenerate.
888 2005-02-22 Alan Modra <amodra@bigpond.net.au>
890 * fr30-desc.c: Regenerate.
891 * fr30-desc.h: Regenerate.
892 * fr30-opc.c: Regenerate.
893 * fr30-opc.h: Regenerate.
894 * frv-desc.c: Regenerate.
895 * frv-desc.h: Regenerate.
896 * frv-opc.c: Regenerate.
897 * frv-opc.h: Regenerate.
898 * ip2k-desc.c: Regenerate.
899 * ip2k-desc.h: Regenerate.
900 * ip2k-opc.c: Regenerate.
901 * ip2k-opc.h: Regenerate.
902 * iq2000-desc.c: Regenerate.
903 * iq2000-desc.h: Regenerate.
904 * iq2000-opc.c: Regenerate.
905 * iq2000-opc.h: Regenerate.
906 * m32r-desc.c: Regenerate.
907 * m32r-desc.h: Regenerate.
908 * m32r-opc.c: Regenerate.
909 * m32r-opc.h: Regenerate.
910 * m32r-opinst.c: Regenerate.
911 * openrisc-desc.c: Regenerate.
912 * openrisc-desc.h: Regenerate.
913 * openrisc-opc.c: Regenerate.
914 * openrisc-opc.h: Regenerate.
915 * xstormy16-desc.c: Regenerate.
916 * xstormy16-desc.h: Regenerate.
917 * xstormy16-opc.c: Regenerate.
918 * xstormy16-opc.h: Regenerate.
920 2005-02-21 Alan Modra <amodra@bigpond.net.au>
922 * Makefile.am: Run "make dep-am"
923 * Makefile.in: Regenerate.
925 2005-02-15 Nick Clifton <nickc@redhat.com>
927 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
928 compile time warnings.
929 (print_keyword): Likewise.
930 (default_print_insn): Likewise.
932 * fr30-desc.c: Regenerated.
933 * fr30-desc.h: Regenerated.
934 * fr30-dis.c: Regenerated.
935 * fr30-opc.c: Regenerated.
936 * fr30-opc.h: Regenerated.
937 * frv-desc.c: Regenerated.
938 * frv-dis.c: Regenerated.
939 * frv-opc.c: Regenerated.
940 * ip2k-asm.c: Regenerated.
941 * ip2k-desc.c: Regenerated.
942 * ip2k-desc.h: Regenerated.
943 * ip2k-dis.c: Regenerated.
944 * ip2k-opc.c: Regenerated.
945 * ip2k-opc.h: Regenerated.
946 * iq2000-desc.c: Regenerated.
947 * iq2000-dis.c: Regenerated.
948 * iq2000-opc.c: Regenerated.
949 * m32r-asm.c: Regenerated.
950 * m32r-desc.c: Regenerated.
951 * m32r-desc.h: Regenerated.
952 * m32r-dis.c: Regenerated.
953 * m32r-opc.c: Regenerated.
954 * m32r-opc.h: Regenerated.
955 * m32r-opinst.c: Regenerated.
956 * openrisc-desc.c: Regenerated.
957 * openrisc-desc.h: Regenerated.
958 * openrisc-dis.c: Regenerated.
959 * openrisc-opc.c: Regenerated.
960 * openrisc-opc.h: Regenerated.
961 * xstormy16-desc.c: Regenerated.
962 * xstormy16-desc.h: Regenerated.
963 * xstormy16-dis.c: Regenerated.
964 * xstormy16-opc.c: Regenerated.
965 * xstormy16-opc.h: Regenerated.
967 2005-02-14 H.J. Lu <hongjiu.lu@intel.com>
969 * dis-buf.c (perror_memory): Use sprintf_vma to print out
972 2005-02-11 Nick Clifton <nickc@redhat.com>
974 * iq2000-asm.c: Regenerate.
976 * frv-dis.c: Regenerate.
978 2005-02-07 Jim Blandy <jimb@redhat.com>
980 * Makefile.am (CGEN): Load guile.scm before calling the main
982 * Makefile.in: Regenerated.
983 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
984 Simply pass the cgen-opc.scm path to ${cgen} as its first
985 argument; ${cgen} itself now contains the '-s', or whatever is
986 appropriate for the Scheme being used.
988 2005-01-31 Andrew Cagney <cagney@gnu.org>
990 * configure: Regenerate to track ../gettext.m4.
992 2005-01-31 Jan Beulich <jbeulich@novell.com>
994 * ia64-gen.c (NELEMS): Define.
995 (shrink): Generate alias with missing second predicate register when
996 opcode has two outputs and these are both predicates.
997 * ia64-opc-i.c (FULL17): Define.
998 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
999 here to generate output template.
1000 (TBITCM, TNATCM): Undefine after use.
1001 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
1002 first input. Add ld16 aliases without ar.csd as second output. Add
1003 st16 aliases without ar.csd as second input. Add cmpxchg aliases
1004 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
1005 ar.ccv as third/fourth inputs. Consolidate through...
1006 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
1007 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
1008 * ia64-asmtab.c: Regenerate.
1010 2005-01-27 Andrew Cagney <cagney@gnu.org>
1012 * configure: Regenerate to track ../gettext.m4 change.
1014 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
1016 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
1017 * frv-asm.c: Rebuilt.
1018 * frv-desc.c: Rebuilt.
1019 * frv-desc.h: Rebuilt.
1020 * frv-dis.c: Rebuilt.
1021 * frv-ibld.c: Rebuilt.
1022 * frv-opc.c: Rebuilt.
1023 * frv-opc.h: Rebuilt.
1025 2005-01-24 Andrew Cagney <cagney@gnu.org>
1027 * configure: Regenerate, ../gettext.m4 was updated.
1029 2005-01-21 Fred Fish <fnf@specifixinc.com>
1031 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
1032 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
1033 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
1034 * mips-dis.c: Ditto.
1036 2005-01-20 Alan Modra <amodra@bigpond.net.au>
1038 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
1040 2005-01-19 Fred Fish <fnf@specifixinc.com>
1042 * mips-dis.c (no_aliases): New disassembly option flag.
1043 (set_default_mips_dis_options): Init no_aliases to zero.
1044 (parse_mips_dis_option): Handle no-aliases option.
1045 (print_insn_mips): Ignore table entries that are aliases
1046 if no_aliases is set.
1047 (print_insn_mips16): Ditto.
1048 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
1049 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
1050 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
1051 * mips16-opc.c (mips16_opcodes): Ditto.
1053 2005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
1055 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
1056 (inheritance diagram): Add missing edge.
1057 (arch_sh1_up): Rename arch_sh_up to match external name to make life
1058 easier for the testsuite.
1059 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
1060 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
1061 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
1062 arch_sh2a_or_sh4_up child.
1063 (sh_table): Do renaming as above.
1064 Correct comment for ldc.l for gas testsuite to read.
1065 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
1066 Correct comments for movy.w and movy.l for gas testsuite to read.
1067 Correct comments for fmov.d and fmov.s for gas testsuite to read.
1069 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
1071 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
1073 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
1075 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
1077 2005-01-10 Andreas Schwab <schwab@suse.de>
1079 * disassemble.c (disassemble_init_for_target) <case
1080 bfd_arch_ia64>: Set skip_zeroes to 16.
1081 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
1083 2004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
1085 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
1087 2004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
1089 * avr-dis.c: Prettyprint. Added printing of symbol names in all
1090 memory references. Convert avr_operand() to C90 formatting.
1092 2004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
1094 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
1096 2004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
1098 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
1099 (no_op_insn): Initialize array with instructions that have no
1101 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
1103 2004-11-29 Richard Earnshaw <rearnsha@arm.com>
1105 * arm-dis.c: Correct top-level comment.
1107 2004-11-27 Richard Earnshaw <rearnsha@arm.com>
1109 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
1110 architecuture defining the insn.
1111 (arm_opcodes, thumb_opcodes): Delete. Move to ...
1112 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
1114 Also include opcode/arm.h.
1115 * Makefile.am (arm-dis.lo): Update dependency list.
1116 * Makefile.in: Regenerate.
1118 2004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
1120 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
1121 reflect the change to the short immediate syntax.
1123 2004-11-19 Alan Modra <amodra@bigpond.net.au>
1125 * or32-opc.c (debug): Warning fix.
1126 * po/POTFILES.in: Regenerate.
1128 * maxq-dis.c: Formatting.
1129 (print_insn): Warning fix.
1131 2004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
1133 * arm-dis.c (WORD_ADDRESS): Define.
1134 (print_insn): Use it. Correct big-endian end-of-section handling.
1136 2004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
1137 Vineet Sharma <vineets@noida.hcltech.com>
1139 * maxq-dis.c: New file.
1140 * disassemble.c (ARCH_maxq): Define.
1141 (disassembler): Add 'print_insn_maxq_little' for handling maxq
1143 * configure.in: Add case for bfd_maxq_arch.
1144 * configure: Regenerate.
1145 * Makefile.am: Add support for maxq-dis.c
1146 * Makefile.in: Regenerate.
1147 * aclocal.m4: Regenerate.
1149 2004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
1151 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
1153 * crx-dis.c: Likewise.
1155 2004-11-04 Hans-Peter Nilsson <hp@axis.com>
1157 Generally, handle CRISv32.
1158 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
1159 (struct cris_disasm_data): New type.
1160 (format_reg, format_hex, cris_constraint, print_flags)
1161 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
1163 (format_sup_reg, print_insn_crisv32_with_register_prefix)
1164 (print_insn_crisv32_without_register_prefix)
1165 (print_insn_crisv10_v32_with_register_prefix)
1166 (print_insn_crisv10_v32_without_register_prefix)
1167 (cris_parse_disassembler_options): New functions.
1168 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
1169 parameter. All callers changed.
1170 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
1172 (cris_constraint) <case 'Y', 'U'>: New cases.
1173 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
1175 (print_with_operands) <case 'Y'>: New case.
1176 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
1177 <case 'N', 'Y', 'Q'>: New cases.
1178 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
1179 (print_insn_cris_with_register_prefix)
1180 (print_insn_cris_without_register_prefix): Call
1181 cris_parse_disassembler_options.
1182 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
1183 for CRISv32 and the size of immediate operands. New v32-only
1184 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
1185 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
1186 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
1187 Change brp to be v3..v10.
1188 (cris_support_regs): New vector.
1189 (cris_opcodes): Update head comment. New format characters '[',
1190 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
1191 Add new opcodes for v32 and adjust existing opcodes to accommodate
1192 differences to earlier variants.
1193 (cris_cond15s): New vector.
1195 2004-11-04 Jan Beulich <jbeulich@novell.com>
1197 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
1199 (Mp): Use f_mode rather than none at all.
1200 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
1201 replaces what previously was x_mode; x_mode now means 128-bit SSE
1203 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
1204 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
1205 pinsrw's second operand is Edqw.
1206 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
1207 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
1208 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
1209 mode when an operand size override is present or always suffixing.
1210 More instructions will need to be added to this group.
1211 (putop): Handle new macro chars 'C' (short/long suffix selector),
1212 'I' (Intel mode override for following macro char), and 'J' (for
1213 adding the 'l' prefix to far branches in AT&T mode). When an
1214 alternative was specified in the template, honor macro character when
1215 specified for Intel mode.
1216 (OP_E): Handle new *_mode values. Correct pointer specifications for
1217 memory operands. Consolidate output of index register.
1218 (OP_G): Handle new *_mode values.
1219 (OP_I): Handle const_1_mode.
1220 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
1221 respective opcode prefix bits have been consumed.
1222 (OP_EM, OP_EX): Provide some default handling for generating pointer
1225 2004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
1227 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
1230 2004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
1232 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
1233 (getregliststring): Support HI/LO and user registers.
1234 * crx-opc.c (crx_instruction): Update data structure according to the
1235 rearrangement done in CRX opcode header file.
1236 (crx_regtab): Likewise.
1237 (crx_optab): Likewise.
1238 (crx_instruction): Reorder load/stor instructions, remove unsupported
1240 support new Co-Processor instruction 'cpi'.
1242 2004-10-27 Nick Clifton <nickc@redhat.com>
1244 * opcodes/iq2000-asm.c: Regenerate.
1245 * opcodes/iq2000-desc.c: Regenerate.
1246 * opcodes/iq2000-desc.h: Regenerate.
1247 * opcodes/iq2000-dis.c: Regenerate.
1248 * opcodes/iq2000-ibld.c: Regenerate.
1249 * opcodes/iq2000-opc.c: Regenerate.
1250 * opcodes/iq2000-opc.h: Regenerate.
1252 2004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
1254 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1255 us4, us5 (respectively).
1256 Remove unsupported 'popa' instruction.
1257 Reverse operands order in store co-processor instructions.
1259 2004-10-15 Alan Modra <amodra@bigpond.net.au>
1261 * Makefile.am: Run "make dep-am"
1262 * Makefile.in: Regenerate.
1264 2004-10-12 Bob Wilson <bob.wilson@acm.org>
1266 * xtensa-dis.c: Use ISO C90 formatting.
1268 2004-10-09 Alan Modra <amodra@bigpond.net.au>
1270 * ppc-opc.c: Revert 2004-09-09 change.
1272 2004-10-07 Bob Wilson <bob.wilson@acm.org>
1274 * xtensa-dis.c (state_names): Delete.
1275 (fetch_data): Use xtensa_isa_maxlength.
1276 (print_xtensa_operand): Replace operand parameter with opcode/operand
1277 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
1278 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
1279 instruction bundles. Use xmalloc instead of malloc.
1281 2004-10-07 David Gibson <david@gibson.dropbear.id.au>
1283 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1286 2004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
1288 * crx-opc.c (crx_instruction): Support Co-processor insns.
1289 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1290 (getregliststring): Change function to use the above enum.
1291 (print_arg): Handle CO-Processor insns.
1292 (crx_cinvs): Add 'b' option to invalidate the branch-target
1295 2004-10-06 Aldy Hernandez <aldyh@redhat.com>
1297 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1298 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1299 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1300 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1301 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1303 2004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
1305 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1308 2004-09-30 Paul Brook <paul@codesourcery.com>
1310 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1311 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
1313 2004-09-17 H.J. Lu <hongjiu.lu@intel.com>
1315 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1316 (CONFIG_STATUS_DEPENDENCIES): New.
1317 (Makefile): Removed.
1318 (config.status): Likewise.
1319 * Makefile.in: Regenerated.
1321 2004-09-17 Alan Modra <amodra@bigpond.net.au>
1323 * Makefile.am: Run "make dep-am".
1324 * Makefile.in: Regenerate.
1325 * aclocal.m4: Regenerate.
1326 * configure: Regenerate.
1327 * po/POTFILES.in: Regenerate.
1328 * po/opcodes.pot: Regenerate.
1330 2004-09-11 Andreas Schwab <schwab@suse.de>
1332 * configure: Rebuild.
1334 2004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
1336 * ppc-opc.c (L): Make this field not optional.
1338 2004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
1340 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1341 Fix parameter to 'm[t|f]csr' insns.
1343 2004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
1345 * configure.in: Autoupdate to autoconf 2.59.
1346 * aclocal.m4: Rebuild with aclocal 1.4p6.
1347 * configure: Rebuild with autoconf 2.59.
1348 * Makefile.in: Rebuild with automake 1.4p6 (picking up
1349 bfd changes for autoconf 2.59 on the way).
1350 * config.in: Rebuild with autoheader 2.59.
1352 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
1354 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1356 2004-07-30 Michal Ludvig <mludvig@suse.cz>
1358 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1359 (GRPPADLCK2): New define.
1360 (twobyte_has_modrm): True for 0xA6.
1361 (grps): GRPPADLCK2 for opcode 0xA6.
1363 2004-07-29 Alexandre Oliva <aoliva@redhat.com>
1365 Introduce SH2a support.
1366 * sh-opc.h (arch_sh2a_base): Renumber.
1367 (arch_sh2a_nofpu_base): Remove.
1368 (arch_sh_base_mask): Adjust.
1369 (arch_opann_mask): New.
1370 (arch_sh2a, arch_sh2a_nofpu): Adjust.
1371 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1372 (sh_table): Adjust whitespace.
1373 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
1374 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
1375 instruction list throughout.
1376 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
1377 of arch_sh2a in instruction list throughout.
1378 (arch_sh2e_up): Accomodate above changes.
1379 (arch_sh2_up): Ditto.
1380 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
1381 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1382 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
1383 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1384 * sh-opc.h (arch_sh2a_nofpu): New.
1385 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1386 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1388 2004-01-20 DJ Delorie <dj@redhat.com>
1389 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1390 2003-12-29 DJ Delorie <dj@redhat.com>
1391 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1392 sh_opcode_info, sh_table): Add sh2a support.
1393 (arch_op32): New, to tag 32-bit opcodes.
1394 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1395 2003-12-02 Michael Snyder <msnyder@redhat.com>
1396 * sh-opc.h (arch_sh2a): Add.
1397 * sh-dis.c (arch_sh2a): Handle.
1398 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1400 2004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
1402 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1404 2004-07-22 Nick Clifton <nickc@redhat.com>
1407 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1408 insns - this is done by objdump itself.
1409 * h8500-dis.c (print_insn_h8500): Likewise.
1411 2004-07-21 Jan Beulich <jbeulich@novell.com>
1413 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1414 regardless of address size prefix in effect.
1415 (ptr_reg): Size or address registers does not depend on rex64, but
1416 on the presence of an address size override.
1417 (OP_MMX): Use rex.x only for xmm registers.
1418 (OP_EM): Use rex.z only for xmm registers.
1420 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1422 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1423 move/branch operations to the bottom so that VR5400 multimedia
1424 instructions take precedence in disassembly.
1426 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1428 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1429 ISA-specific "break" encoding.
1431 2004-07-13 Elvis Chiang <elvisfb@gmail.com>
1433 * arm-opc.h: Fix typo in comment.
1435 2004-07-11 Andreas Schwab <schwab@suse.de>
1437 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1439 2004-07-09 Andreas Schwab <schwab@suse.de>
1441 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1443 2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
1445 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1446 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1447 (crx-dis.lo): New target.
1448 (crx-opc.lo): Likewise.
1449 * Makefile.in: Regenerate.
1450 * configure.in: Handle bfd_crx_arch.
1451 * configure: Regenerate.
1452 * crx-dis.c: New file.
1453 * crx-opc.c: New file.
1454 * disassemble.c (ARCH_crx): Define.
1455 (disassembler): Handle ARCH_crx.
1457 2004-06-29 James E Wilson <wilson@specifixinc.com>
1459 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1460 * ia64-asmtab.c: Regnerate.
1462 2004-06-28 Alan Modra <amodra@bigpond.net.au>
1464 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1465 (extract_fxm): Don't test dialect.
1466 (XFXFXM_MASK): Include the power4 bit.
1467 (XFXM): Add p4 param.
1468 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
1470 2004-06-27 Alexandre Oliva <aoliva@redhat.com>
1472 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
1473 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1475 2004-06-26 Alan Modra <amodra@bigpond.net.au>
1477 * ppc-opc.c (BH, XLBH_MASK): Define.
1478 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1480 2004-06-24 Alan Modra <amodra@bigpond.net.au>
1482 * i386-dis.c (x_mode): Comment.
1483 (two_source_ops): File scope.
1484 (float_mem): Correct fisttpll and fistpll.
1485 (float_mem_mode): New table.
1487 (OP_E): Correct intel mode PTR output.
1488 (ptr_reg): Use open_char and close_char.
1489 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
1490 operands. Set two_source_ops.
1492 2004-06-15 Alan Modra <amodra@bigpond.net.au>
1494 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1495 instead of _raw_size.
1497 2004-06-08 Jakub Jelinek <jakub@redhat.com>
1499 * ia64-gen.c (in_iclass): Handle more postinc st
1501 * ia64-asmtab.c: Rebuilt.
1503 2004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
1505 * s390-opc.txt: Correct architecture mask for some opcodes.
1506 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1507 in the esa mode as well.
1509 2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
1511 * sh-dis.c (target_arch): Make unsigned.
1512 (print_insn_sh): Replace (most of) switch with a call to
1513 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1514 * sh-opc.h: Redefine architecture flags values.
1515 Add sh3-nommu architecture.
1516 Reorganise <arch>_up macros so they make more visual sense.
1517 (SH_MERGE_ARCH_SET): Define new macro.
1518 (SH_VALID_BASE_ARCH_SET): Likewise.
1519 (SH_VALID_MMU_ARCH_SET): Likewise.
1520 (SH_VALID_CO_ARCH_SET): Likewise.
1521 (SH_VALID_ARCH_SET): Likewise.
1522 (SH_MERGE_ARCH_SET_VALID): Likewise.
1523 (SH_ARCH_SET_HAS_FPU): Likewise.
1524 (SH_ARCH_SET_HAS_DSP): Likewise.
1525 (SH_ARCH_UNKNOWN_ARCH): Likewise.
1526 (sh_get_arch_from_bfd_mach): Add prototype.
1527 (sh_get_arch_up_from_bfd_mach): Likewise.
1528 (sh_get_bfd_mach_from_arch_set): Likewise.
1529 (sh_merge_bfd_arc): Likewise.
1531 2004-05-24 Peter Barada <peter@the-baradas.com>
1533 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1534 into new match_insn_m68k function. Loop over canidate
1535 matches and select first that completely matches.
1536 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1537 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1538 to verify addressing for MAC/EMAC.
1539 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1540 reigster halves since 'fpu' and 'spl' look misleading.
1541 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1542 * m68k-opc.c: Rearragne mac/emac cases to use longest for
1543 first, tighten up match masks.
1544 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
1545 'size' from special case code in print_insn_m68k to
1546 determine decode size of insns.
1548 2004-05-19 Alan Modra <amodra@bigpond.net.au>
1550 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1551 well as when -mpower4.
1553 2004-05-13 Nick Clifton <nickc@redhat.com>
1555 * po/fr.po: Updated French translation.
1557 2004-05-05 Peter Barada <peter@the-baradas.com>
1559 * m68k-dis.c(print_insn_m68k): Add new chips, use core
1560 variants in arch_mask. Only set m68881/68851 for 68k chips.
1561 * m68k-op.c: Switch from ColdFire chips to core variants.
1563 2004-05-05 Alan Modra <amodra@bigpond.net.au>
1566 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1568 2004-04-29 Ben Elliston <bje@au.ibm.com>
1570 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1571 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1573 2004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
1575 * sh-dis.c (print_insn_sh): Print the value in constant pool
1576 as a symbol if it looks like a symbol.
1578 2004-04-22 Peter Barada <peter@the-baradas.com>
1580 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1581 appropriate ColdFire architectures.
1582 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1584 Add EMAC instructions, fix MAC instructions. Remove
1585 macmw/macml/msacmw/msacml instructions since mask addressing now
1588 2004-04-20 Jakub Jelinek <jakub@redhat.com>
1590 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1591 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1592 suffix. Use fmov*x macros, create all 3 fpsize variants in one
1593 macro. Adjust all users.
1595 2004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
1597 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1600 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1602 * m32r-asm.c: Regenerate.
1604 2004-03-29 Stan Shebs <shebs@apple.com>
1606 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1609 2004-03-19 Alan Modra <amodra@bigpond.net.au>
1611 * aclocal.m4: Regenerate.
1612 * config.in: Regenerate.
1613 * configure: Regenerate.
1614 * po/POTFILES.in: Regenerate.
1615 * po/opcodes.pot: Regenerate.
1617 2004-03-16 Alan Modra <amodra@bigpond.net.au>
1619 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
1621 * ppc-opc.c (RA0): Define.
1622 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1623 (RAOPT): Rename from RAO. Update all uses.
1624 (powerpc_opcodes): Use RA0 as appropriate.
1626 2004-03-15 Aldy Hernandez <aldyh@redhat.com>
1628 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1630 2004-03-15 Alan Modra <amodra@bigpond.net.au>
1632 * sparc-dis.c (print_insn_sparc): Update getword prototype.
1634 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1636 * i386-dis.c (GRPPLOCK): Delete.
1637 (grps): Delete GRPPLOCK entry.
1639 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1641 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1643 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1644 (GRPPADLCK): Define.
1645 (dis386): Use NOP_Fixup on "nop".
1646 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1647 (twobyte_has_modrm): Set for 0xa7.
1648 (padlock_table): Delete. Move to..
1649 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
1651 (print_insn): Revert PADLOCK_SPECIAL code.
1652 (OP_E): Delete sfence, lfence, mfence checks.
1654 2004-03-12 Jakub Jelinek <jakub@redhat.com>
1656 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1657 (INVLPG_Fixup): New function.
1658 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1660 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1662 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1663 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1664 (padlock_table): New struct with PadLock instructions.
1665 (print_insn): Handle PADLOCK_SPECIAL.
1667 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1669 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1670 (OP_E): Twiddle clflush to sfence here.
1672 2004-03-08 Nick Clifton <nickc@redhat.com>
1674 * po/de.po: Updated German translation.
1676 2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
1678 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1679 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
1680 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1683 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1685 * frv-asm.c: Regenerate.
1686 * frv-desc.c: Regenerate.
1687 * frv-desc.h: Regenerate.
1688 * frv-dis.c: Regenerate.
1689 * frv-ibld.c: Regenerate.
1690 * frv-opc.c: Regenerate.
1691 * frv-opc.h: Regenerate.
1693 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1695 * frv-desc.c, frv-opc.c: Regenerate.
1697 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1699 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1701 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1703 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1704 Also correct mistake in the comment.
1706 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1708 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1709 ensure that double registers have even numbers.
1710 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1711 that reserved instruction 0xfffd does not decode the same
1713 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1714 REG_N refers to a double register.
1715 Add REG_N_B01 nibble type and use it instead of REG_NM
1717 Adjust the bit patterns in a few comments.
1719 2004-02-25 Aldy Hernandez <aldyh@redhat.com>
1721 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1723 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1725 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1727 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1729 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1731 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1733 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1734 mtivor32, mtivor33, mtivor34.
1736 2004-02-19 Aldy Hernandez <aldyh@redhat.com>
1738 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1740 2004-02-10 Petko Manolov <petkan@nucleusys.com>
1742 * arm-opc.h Maverick accumulator register opcode fixes.
1744 2004-02-13 Ben Elliston <bje@wasabisystems.com>
1746 * m32r-dis.c: Regenerate.
1748 2004-01-27 Michael Snyder <msnyder@redhat.com>
1750 * sh-opc.h (sh_table): "fsrra", not "fssra".
1752 2004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1754 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1757 2004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1759 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1761 2004-01-19 Alan Modra <amodra@bigpond.net.au>
1763 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1764 1. Don't print scale factor on AT&T mode when index missing.
1766 2004-01-16 Alexandre Oliva <aoliva@redhat.com>
1768 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1769 when loaded into XR registers.
1771 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
1773 * frv-desc.h: Regenerate.
1774 * frv-desc.c: Regenerate.
1775 * frv-opc.c: Regenerate.
1777 2004-01-13 Michael Snyder <msnyder@redhat.com>
1779 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1781 2004-01-09 Paul Brook <paul@codesourcery.com>
1783 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1786 2004-01-07 Daniel Jacobowitz <drow@mvista.com>
1788 * Makefile.am (libopcodes_la_DEPENDENCIES)
1789 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1790 comment about the problem.
1791 * Makefile.in: Regenerate.
1793 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
1795 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1796 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1797 cut&paste errors in shifting/truncating numerical operands.
1798 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1799 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1800 (parse_uslo16): Likewise.
1801 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1802 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1803 (parse_s12): Likewise.
1804 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1805 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1806 (parse_uslo16): Likewise.
1807 (parse_uhi16): Parse gothi and gotfuncdeschi.
1808 (parse_d12): Parse got12 and gotfuncdesc12.
1809 (parse_s12): Likewise.
1811 2004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1813 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1814 instruction which looks similar to an 'rla' instruction.
1816 For older changes see ChangeLog-0203
1822 version-control: never