1 2010-08-06 Quentin Neill <quentin.neill@amd.com>
3 * i386-opc.h (enum): Fix typos in comments.
5 2010-08-06 Alan Modra <amodra@gmail.com>
7 * disassemble.c: Formatting.
8 (disassemble_init_for_target <ARCH_m32c>): Comment on endian.
10 2010-08-05 H.J. Lu <hongjiu.lu@intel.com>
12 * i386-opc.tbl: Add Cpu186 to ud1/ud2/ud2a/ud2b.
13 * i386-tbl.h: Regenerated.
15 2010-08-05 H.J. Lu <hongjiu.lu@intel.com>
17 * i386-dis.c (dis386_twobyte): Replace ud2a/ud2b with ud2/ud1.
19 * i386-opc.tbl: Add ud1. Remove Cpu686 from ud2/ud2a/ud2b.
20 * i386-tbl.h: Regenerated.
22 2010-07-29 DJ Delorie <dj@redhat.com>
24 * rx-decode.opc (SRR): New.
25 (rx_decode_opcode): Use it for movbi and movbir. Decode NOP2 (mov
26 r0,r0) and NOP3 (max r0,r0) special cases.
27 * rx-decode.c: Regenerate.
29 2010-07-28 H.J. Lu <hongjiu.lu@intel.com>
31 * i386-dis.c: Add 0F to VEX opcode enums.
33 2010-07-27 DJ Delorie <dj@redhat.com>
35 * rx-decode.opc (store_flags): Remove, replace with F_* macros.
36 (rx_decode_opcode): Likewise.
37 * rx-decode.c: Regenerate.
39 2010-07-23 Naveen.H.S <naveen.S@kpitcummins.com>
40 Ina Pandit <ina.pandit@kpitcummins.com>
42 * v850-dis.c (v850_sreg_names): Updated structure for system
44 (float_cc_names): new structure for condition codes.
45 (print_value): Update the function that prints value.
46 (get_operand_value): New function to get the operand value.
47 (disassemble): Updated to handle the disassembly of instructions.
48 (print_insn_v850): Updated function to print instruction for different
50 * opcodes/v850-opc.c (v850_msg_is_out_of_range, insert_i5div1,
51 extract_i5div1, insert_i5div2, extract_i5div2, insert_i5div3,
52 extract_i5div3, insert_d5_4, extract_d5_4, extract_d8_6,
53 insert_d8_7, extract_d8_7, insert_v8, extract_v8, insert_u16_loop,
54 extract_u16_loop, insert_d16_15, extract_d16_15, insert_d16_16,
55 extract_d16_16, nsert_d17_16, extract_d17_16, insert_d22,
56 extract_d22, insert_d23, extract_d23, insert_i9, extract_i9,
57 insert_u9, extract_u9, extract_spe, insert_r4, extract_r4): New.
58 (insert_d8_7, insert_d5_4, insert_i5div): Remove.
59 (v850_operands): Update with the relocation name. Also update
60 the instructions with specific set of processors.
62 2010-07-08 Tejas Belagod <tejas.belagod@arm.com>
64 * arm-dis.c (print_insn_arm): Add cases for printing more
66 (print_insn_thumb32): Likewise.
68 2010-07-06 Maciej W. Rozycki <macro@codesourcery.com>
70 * mips-dis.c (print_insn_mips): Correct branch instruction type
73 2010-07-06 Maciej W. Rozycki <macro@codesourcery.com>
75 * mips-dis.c (print_mips16_insn_arg): Remove branch instruction
76 type and delay slot determination.
77 (print_insn_mips16): Extend branch instruction type and delay
78 slot determination to cover all instructions.
79 * mips16-opc.c (BR): Remove macro.
80 (UBR, CBR): New macros.
81 (mips16_opcodes): Update branch annotation for "b", "beqz",
82 "bnez", "bteqz" and "btnez". Add branch annotation for "jalrc"
85 2010-07-05 H.J. Lu <hongjiu.lu@intel.com>
87 AVX Programming Reference (June, 2010)
88 * i386-dis.c (mod_table): Replace rdrnd with rdrand.
89 * i386-opc.tbl: Likewise.
90 * i386-tbl.h: Regenerated.
92 2010-07-05 H.J. Lu <hongjiu.lu@intel.com>
94 * i386-opc.h (CpuFSGSBase): Fix a typo in comments.
96 2010-07-03 Andreas Schwab <schwab@linux-m68k.org>
98 * ppc-dis.c (powerpc_init_dialect): Cast PPC_OPCODE_xxx to
99 ppc_cpu_t before inverting.
100 (ppc_parse_cpu): Likewise.
101 (print_insn_powerpc): Likewise.
103 2010-07-03 Alan Modra <amodra@gmail.com>
105 * ppc-dis.c (ppc_opts, powerpc_init_dialect): Remove old opcode flags.
106 * ppc-opc.c (PPC32, POWER32, COM32, CLASSIC): Delete.
107 (PPC64, MFDEC2): Update.
108 (NON32, NO371): Define.
109 (powerpc_opcode): Update to not use old opcode flags, and avoid
112 2010-07-03 DJ Delorie <dj@delorie.com>
114 * m32c-ibld.c: Regenerate.
116 2010-07-03 Alan Modra <amodra@gmail.com>
118 * ppc-opc.c (PWR2COM): Define.
119 (PPCPWR2): Add PPC_OPCODE_COMMON.
120 (powerpc_opcodes): Add "subc", "subco", "subco.", "fcir", "fcir.",
121 "fcirz", "fcirz." to -mcom opcodes. Remove "mfsri", "dclst",
124 2010-07-01 H.J. Lu <hongjiu.lu@intel.com>
126 AVX Programming Reference (June, 2010)
127 * i386-dis.c (PREFIX_0FAE_REG_0): New.
128 (PREFIX_0FAE_REG_1): Likewise.
129 (PREFIX_0FAE_REG_2): Likewise.
130 (PREFIX_0FAE_REG_3): Likewise.
131 (PREFIX_VEX_3813): Likewise.
132 (PREFIX_VEX_3A1D): Likewise.
133 (prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
134 PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 and
136 (vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D.
137 (mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
138 PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd.
140 * i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS,
141 CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS.
142 (cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C.
144 * i386-opc.h (CpuXsaveopt): New.
145 (CpuFSGSBase): Likewise.
146 (CpuRdRnd): Likewise.
148 (i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and
151 * i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd,
152 wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph.
153 * i386-init.h: Regenerated.
154 * i386-tbl.h: Likewise.
156 2010-07-01 Sebastian Andrzej Siewior <bigeasy@linutronix.de>
158 * ppc-opc.c (powerpc_opcodes): Revert deprecation of mfocrf, mtcrf
161 2010-06-29 Alan Modra <amodra@gmail.com>
163 * maxq-dis.c: Delete file.
164 * Makefile.am: Remove references to maxq.
165 * configure.in: Likewise.
166 * disassemble.c: Likewise.
167 * Makefile.in: Regenerate.
168 * configure: Regenerate.
169 * po/POTFILES.in: Regenerate.
171 2010-06-29 Alan Modra <amodra@gmail.com>
173 * mep-dis.c: Regenerate.
175 2010-06-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
177 * arm-disc.c (parse_insn_neon): Fix Neon alignment syntax.
179 2010-06-27 Alan Modra <amodra@gmail.com>
181 * arc-dis.c (arc_sprintf): Delete set but unused variables.
182 (decodeInstr): Likewise.
183 * dlx-dis.c (print_insn_dlx): Likewise.
184 * h8300-dis.c (bfd_h8_disassemble_init): Likewise.
185 * maxq-dis.c (check_move, print_insn): Likewise.
186 * mep-dis.c (mep_examine_ivc2_insns): Likewise.
187 * msp430-dis.c (msp430_branchinstr): Likewise.
188 * bfin-dis.c (_print_insn_bfin): Avoid set but unused warning.
189 * cgen-asm.in (parse_insn_normal, _cgen_assemble_insn): Likewise.
190 * sparc-dis.c (print_insn_sparc): Likewise.
191 * fr30-asm.c: Regenerate.
192 * frv-asm.c: Regenerate.
193 * ip2k-asm.c: Regenerate.
194 * iq2000-asm.c: Regenerate.
195 * lm32-asm.c: Regenerate.
196 * m32c-asm.c: Regenerate.
197 * m32r-asm.c: Regenerate.
198 * mep-asm.c: Regenerate.
199 * mt-asm.c: Regenerate.
200 * openrisc-asm.c: Regenerate.
201 * xc16x-asm.c: Regenerate.
202 * xstormy16-asm.c: Regenerate.
204 2010-06-16 Vincent Rivière <vincent.riviere@freesbee.fr>
207 * m68k-opc.c (m68k_opcodes): Remove move.l for isab and later.
209 2010-06-16 Vincent Rivière <vincent.riviere@freesbee.fr>
212 * m68k-dis.c (print_insn_arg): Prefix float constants with #0e.
214 2010-06-14 Sebastian Andrzej Siewior <bigeasy@linutronix.de>
216 * ppc-dis.c (ppc_opts): Remove PPC_OPCODE_E500MC from e500 and
217 e500x2. Add PPC_OPCODE_E500 to e500 and e500x2
218 * ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which
219 touch floating point regs and are enabled by COM, PPC or PPCCOM.
220 Treat sync as msync on e500. Treat eieio as mbar 1 on e500.
221 Treat lwsync as msync on e500.
223 2010-06-07 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
225 * arm-dis.c (thumb-opcodes): Add disassembly for movs.
227 2010-05-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
229 * arm-dis.c (print_insn_neon): Ensure disassembly of Neon
230 constants is the same on 32-bit and 64-bit hosts.
232 2010-05-27 Jason Duerstock <jason.duerstock+binutils@gmail.com>
234 * m68k-dis.c (print_insn_m68k): Emit undefined instructions as
235 .short directives so that they can be reassembled.
237 2010-05-26 Catherine Moore <clm@codesourcery.com>
238 David Ung <davidu@mips.com>
240 * mips-opc.c: Change membership to I1 for instructions ssnop and
243 2010-05-26 H.J. Lu <hongjiu.lu@intel.com>
245 * i386-dis.c (sib): New.
247 (print_insn): Call get_sib.
248 OP_E_memory): Use sib.
250 2010-05-26 Catherine Moore <clm@codesoourcery.com>
252 * mips-dis.c (mips_arch): Remove INSN_MIPS16.
253 * mips-opc.c (I16): Remove.
254 (mips_builtin_op): Reclassify jalx.
256 2010-05-19 Alan Modra <amodra@gmail.com>
258 * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
259 divwe, divdeuo, divweuo, divdeo, divweo for A2. Add icswepx.
261 2010-05-13 Alan Modra <amodra@gmail.com>
263 * ppc-opc.c (powerpc_opcodes): Correct wclr encoding.
265 2010-05-11 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
267 * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
269 (print_insn_thumb16): Add support for new %W format.
271 2010-05-07 Tristan Gingold <gingold@adacore.com>
273 * Makefile.in: Regenerate with automake 1.11.1.
276 2010-05-05 Nick Clifton <nickc@redhat.com>
278 * po/es.po: Updated Spanish translation.
280 2010-04-22 Nick Clifton <nickc@redhat.com>
282 * po/opcodes.pot: Updated by the Translation project.
283 * po/vi.po: Updated Vietnamese translation.
285 2010-04-16 H.J. Lu <hongjiu.lu@intel.com>
287 * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
290 2010-04-09 Nick Clifton <nickc@redhat.com>
292 * i386-dis.c (print_insn): Remove unused variable op.
293 (OP_sI): Remove unused variable mask.
295 2010-04-07 Alan Modra <amodra@gmail.com>
297 * configure: Regenerate.
299 2010-04-06 Peter Bergner <bergner@vnet.ibm.com>
301 * ppc-opc.c (RBOPT): New define.
302 ("dccci"): Enable for PPCA2. Make operands optional.
303 ("iccci"): Likewise. Do not deprecate for PPC476.
305 2010-04-02 Masaki Muranaka <monaka@monami-software.com>
307 * cr16-opc.c (cr16_instruction): Fix typo in comment.
309 2010-03-25 Joseph Myers <joseph@codesourcery.com>
311 * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
312 * Makefile.in: Regenerate.
313 * configure.in (bfd_tic6x_arch): New.
314 * configure: Regenerate.
315 * disassemble.c (ARCH_tic6x): Define if ARCH_all.
316 (disassembler): Handle TI C6X.
319 2010-03-24 Mike Frysinger <vapier@gentoo.org>
321 * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
323 2010-03-23 Joseph Myers <joseph@codesourcery.com>
325 * dis-buf.c (buffer_read_memory): Give error for reading just
326 before the start of memory.
328 2010-03-22 Sebastian Pop <sebastian.pop@amd.com>
329 Quentin Neill <quentin.neill@amd.com>
331 * i386-dis.c (OP_LWP_I): Removed.
332 (reg_table): Do not use OP_LWP_I, use Iq.
333 (OP_LWPCB_E): Remove use of names16.
335 * i386-opc.tbl: Removed 16bit LWP insns. 32bit LWP insns
336 should not set the Vex.length bit.
337 * i386-tbl.h: Regenerated.
339 2010-02-25 Edmar Wienskoski <edmar@freescale.com>
341 * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
343 2010-02-24 Nick Clifton <nickc@redhat.com>
346 * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
347 <prefix>asx. Replace <prefix>subaddx with <prefix>sax.
348 (thumb32_opcodes): Likewise.
350 2010-02-15 Nick Clifton <nickc@redhat.com>
352 * po/vi.po: Updated Vietnamese translation.
354 2010-02-12 Doug Evans <dje@sebabeach.org>
356 * lm32-opinst.c: Regenerate.
358 2010-02-11 Doug Evans <dje@sebabeach.org>
360 * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
361 (print_address): Delete CGEN_PRINT_ADDRESS.
362 * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
363 * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
364 * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
365 * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
367 * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
368 * frv-desc.c, * frv-desc.h, * frv-opc.c,
369 * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
370 * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
371 * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
372 * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
373 * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
374 * mep-desc.c, * mep-desc.h, * mep-opc.c,
375 * mt-desc.c, * mt-desc.h, * mt-opc.c,
376 * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
377 * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
378 * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
380 2010-02-11 H.J. Lu <hongjiu.lu@intel.com>
382 * i386-dis.c: Update copyright.
383 * i386-gen.c: Likewise.
384 * i386-opc.h: Likewise.
385 * i386-opc.tbl: Likewise.
387 2010-02-10 Quentin Neill <quentin.neill@amd.com>
388 Sebastian Pop <sebastian.pop@amd.com>
390 * i386-dis.c (OP_EX_VexImmW): Reintroduced
391 function to handle 5th imm8 operand.
392 (PREFIX_VEX_3A48): Added.
393 (PREFIX_VEX_3A49): Added.
394 (VEX_W_3A48_P_2): Added.
395 (VEX_W_3A49_P_2): Added.
396 (prefix table): Added entries for PREFIX_VEX_3A48
398 (vex table): Added entries for VEX_W_3A48_P_2 and
400 * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
401 for Vec_Imm4 operands.
402 * i386-opc.h (enum): Added Vec_Imm4.
403 (i386_operand_type): Added vec_imm4.
404 * i386-opc.tbl: Add entries for vpermilp[ds].
405 * i386-init.h: Regenerated.
406 * i386-tbl.h: Regenerated.
408 2010-02-10 Richard Sandiford <r.sandiford@uk.ibm.com>
410 * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
411 and "pwr7". Move "a2" into alphabetical order.
413 2010-02-08 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
415 * ppc-dis.c (ppc_opts): Add titan entry.
416 * ppc-opc.c (TITAN, MULHW): Define.
417 (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
419 2010-02-03 Quentin Neill <quentin.neill@amd.com>
421 * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
423 * i386-init.h: Regenerated.
425 2010-02-03 Anthony Green <green@moxielogic.com>
427 * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
428 0x0f, and make 0x00 an illegal instruction.
430 2010-01-29 Daniel Jacobowitz <dan@codesourcery.com>
432 * opcodes/arm-dis.c (struct arm_private_data): New.
433 (print_insn_coprocessor, print_insn_arm): Update to use struct
435 (is_mapping_symbol, get_map_sym_type): New functions.
436 (get_sym_code_type): Check the symbol's section. Do not check
438 (print_insn): Default to disassembling ARM mode code. Check
439 for mapping symbols separately from other symbols. Use
440 struct arm_private_data.
442 2010-01-28 H.J. Lu <hongjiu.lu@intel.com>
444 * i386-dis.c (EXVexWdqScalar): New.
445 (vex_scalar_w_dq_mode): Likewise.
446 (prefix_table): Update entries for PREFIX_VEX_3899,
447 PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
448 PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
449 PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
450 PREFIX_VEX_38BD and PREFIX_VEX_38BF.
451 (intel_operand_size): Handle vex_scalar_w_dq_mode.
454 2010-01-27 H.J. Lu <hongjiu.lu@intel.com>
456 * i386-dis.c (XMScalar): New.
457 (EXdScalar): Likewise.
458 (EXqScalar): Likewise.
459 (EXqScalarS): Likewise.
460 (VexScalar): Likewise.
461 (EXdVexScalarS): Likewise.
462 (EXqVexScalarS): Likewise.
463 (XMVexScalar): Likewise.
464 (scalar_mode): Likewise.
465 (d_scalar_mode): Likewise.
466 (d_scalar_swap_mode): Likewise.
467 (q_scalar_mode): Likewise.
468 (q_scalar_swap_mode): Likewise.
469 (vex_scalar_mode): Likewise.
470 (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
471 VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
472 VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
473 VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
474 VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
475 VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
476 VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
477 VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
478 VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
479 VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
480 (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
481 VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
482 VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
483 VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
484 VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
485 VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
486 VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
487 VEX_W_7E_P_1, VEX_W_D6_P_2 VEX_W_C2_P_1, VEX_W_C2_P_3,
488 VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
489 (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
490 q_scalar_mode, q_scalar_swap_mode.
491 (OP_XMM): Handle scalar_mode.
492 (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
493 and q_scalar_swap_mode.
494 (OP_VEX): Handle vex_scalar_mode.
496 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
498 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
500 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
502 * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
504 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
506 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
508 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
510 * i386-dis.c (Bad_Opcode): New.
511 (bad_opcode): Likewise.
512 (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
513 (dis386_twobyte): Likewise.
514 (reg_table): Likewise.
515 (prefix_table): Likewise.
516 (x86_64_table): Likewise.
517 (vex_len_table): Likewise.
518 (vex_w_table): Likewise.
519 (mod_table): Likewise.
520 (rm_table): Likewise.
521 (float_reg): Likewise.
522 (reg_table): Remove trailing "(bad)" entries.
523 (prefix_table): Likewise.
524 (x86_64_table): Likewise.
525 (vex_len_table): Likewise.
526 (vex_w_table): Likewise.
527 (mod_table): Likewise.
528 (rm_table): Likewise.
529 (get_valid_dis386): Handle bytemode 0.
531 2010-01-23 H.J. Lu <hongjiu.lu@intel.com>
533 * i386-opc.h (VEXScalar): New.
535 * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
537 * i386-tbl.h: Regenerated.
539 2010-01-21 H.J. Lu <hongjiu.lu@intel.com>
541 * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
543 * i386-opc.tbl: Add xsave64 and xrstor64.
544 * i386-tbl.h: Regenerated.
546 2010-01-20 Nick Clifton <nickc@redhat.com>
549 * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
550 based post-indexed addressing.
552 2010-01-15 Sebastian Pop <sebastian.pop@amd.com>
554 * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
555 * i386-tbl.h: Regenerated.
557 2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
559 * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
562 2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
564 * i386-dis.c (names_mm): New.
565 (intel_names_mm): Likewise.
566 (att_names_mm): Likewise.
567 (names_xmm): Likewise.
568 (intel_names_xmm): Likewise.
569 (att_names_xmm): Likewise.
570 (names_ymm): Likewise.
571 (intel_names_ymm): Likewise.
572 (att_names_ymm): Likewise.
573 (print_insn): Set names_mm, names_xmm and names_ymm.
574 (OP_MMX): Use names_mm, names_xmm and names_ymm.
580 (XMM_Fixup): Likewise.
582 (OP_EX_VexReg): Likewise.
583 (OP_Vex_2src): Likewise.
584 (OP_Vex_2src_1): Likewise.
585 (OP_Vex_2src_2): Likewise.
586 (OP_REG_VexI4): Likewise.
588 2010-01-13 H.J. Lu <hongjiu.lu@intel.com>
590 * i386-dis.c (print_insn): Update comments.
592 2010-01-12 H.J. Lu <hongjiu.lu@intel.com>
594 * i386-dis.c (rex_original): Removed.
595 (ckprefix): Remove rex_original.
596 (print_insn): Update comments.
598 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
600 * Makefile.in: Regenerate.
601 * configure: Regenerate.
603 2010-01-07 Doug Evans <dje@sebabeach.org>
605 * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
606 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
607 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
608 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
609 * xstormy16-ibld.c: Regenerate.
611 2010-01-06 Quentin Neill <quentin.neill@amd.com>
613 * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
614 * i386-init.h: Regenerated.
616 2010-01-06 Daniel Gutson <dgutson@codesourcery.com>
618 * arm-dis.c (print_insn): Fixed search for next symbol and data
619 dumping condition, and the initial mapping symbol state.
621 2010-01-05 Doug Evans <dje@sebabeach.org>
623 * cgen-ibld.in: #include "cgen/basic-modes.h".
624 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
625 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
626 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
627 * xstormy16-ibld.c: Regenerate.
629 2010-01-04 Nick Clifton <nickc@redhat.com>
632 * arm-dis.c (print_insn_coprocessor): Initialise value.
634 2010-01-04 Edmar Wienskoski <edmar@freescale.com>
636 * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
638 2010-01-02 Doug Evans <dje@sebabeach.org>
640 * cgen-asm.in: Update copyright year.
641 * cgen-dis.in: Update copyright year.
642 * cgen-ibld.in: Update copyright year.
643 * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
644 * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
645 * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
646 * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
647 * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
648 * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
649 * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
650 * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
651 * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
652 * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
653 * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
654 * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
655 * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
656 * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
657 * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
658 * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
659 * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
660 * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
661 * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
662 * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
663 * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
665 For older changes see ChangeLog-2009
671 version-control: never