opcodes/ChangeLog

   1 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
   2
   3         * arm-dis.c (thumb32_opcodes): Add DCPS instruction.
   4
   5 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
   6
   7         * arm-dis.c (arm_opcodes): Add SEVL.
   8         (thumb_opcodes): Likewise.
   9         (thumb32_opcodes): Likewise.
  10
  11 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  12
  13         * arm-dis.c (data_barrier_option): New function.
  14         (print_insn_arm): Use data_barrier_option.
  15         (print_insn_thumb32): Use data_barrier_option.
  16
  17 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com
  18
  19         * arm-dis.c (COND_UNCOND): New constant.
  20         (print_insn_coprocessor): Add support for %u format specifier.
  21         (print_insn_neon): Likewise.
  22
  23 2012-08-21  David S. Miller  <davem@davemloft.net>
  24
  25         * sparc-opc.c (4-argument crypto instructions): Fix encoding using
  26         F3F4 macro.
  27
  28 2012-08-20  Edmar Wienskoski  <edmar@freescale.com>
  29
  30         * ppc-opc.c (powerpc_opcodes): Changed opcode for vabsdub,
  31         vabsduh, vabsduw, mviwsplt.
  32
  33 2012-08-17  Nagajyothi Eggone  <nagajyothi.eggone@amd.com>
  34
  35         * i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and
  36         CPU_BTVER2_FLAGS.
  37
  38         * i386-opc.h: Update CpuPRFCHW comment.
  39
  40         * i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW.
  41         * i386-init.h: Regenerated.
  42         * i386-tbl.h: Likewise.
  43
  44 2012-08-17  Nick Clifton  <nickc@redhat.com>
  45
  46         * po/uk.po: New Ukranian translation.
  47         * configure.in (ALL_LINGUAS): Add uk.
  48         * configure: Regenerate.
  49
  50 2012-08-16  Peter Bergner  <bergner@vnet.ibm.com>
  51
  52         * ppc-opc.c (powerpc_opcodes) <"lswx">: Use RAX for the second and
  53         RBX for the third operand.
  54         <"lswi">: Use RAX for second and NBI for the third operand.
  55
  56 2012-08-15  DJ Delorie  <dj@redhat.com>
  57
  58         * rl78-decode.opc (rl78_decode_opcode): Merge %e and %[01]
  59         operands, so that data addresses can be corrected when not
  60         ES-overridden.
  61         * rl78-decode.c: Regenerate.
  62         * rl78-dis.c (print_insn_rl78): Make order of modifiers
  63         irrelevent.  When the 'e' specifier is used on an operand and no
  64         ES prefix is provided, adjust address to make it absolute.
  65
  66 2012-08-15  Peter Bergner  <bergner@vnet.ibm.com>
  67
  68         * ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR.
  69
  70 2012-08-15  Peter Bergner  <bergner@vnet.ibm.com>
  71
  72         * ppc-opc.c <xnop, yield, mdoio, mdoom>: New extended mnemonics.
  73
  74 2012-08-14  Maciej W. Rozycki  <macro@codesourcery.com>
  75
  76         * mips-dis.c (print_insn_args): Add GET_OP and GET_OP_S local
  77         macros, use local variables for info struct member accesses,
  78         update the type of the variable used to hold the instruction
  79         word.
  80         (print_insn_mips, print_mips16_insn_arg): Likewise.
  81         (print_insn_mips16): Add GET_OP and GET_OP_S local macros, use
  82         local variables for info struct member accesses.
  83         (print_insn_micromips): Add GET_OP_S local macro.
  84         (_print_insn_mips): Update the type of the variable used to hold
  85         the instruction word.
  86
  87 2012-08-13  Ian Bolton  <ian.bolton@arm.com>
  88             Laurent Desnogues  <laurent.desnogues@arm.com>
  89             Jim MacArthur  <jim.macarthur@arm.com>
  90             Marcus Shawcroft  <marcus.shawcroft@arm.com>
  91             Nigel Stephens  <nigel.stephens@arm.com>
  92             Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
  93             Richard Earnshaw  <rearnsha@arm.com>
  94             Sofiane Naci  <sofiane.naci@arm.com>
  95             Tejas Belagod  <tejas.belagod@arm.com>
  96             Yufeng Zhang  <yufeng.zhang@arm.com>
  97
  98         * Makefile.am: Add AArch64.
  99         * Makefile.in: Regenerate.
 100         * aarch64-asm.c: New file.
 101         * aarch64-asm.h: New file.
 102         * aarch64-dis.c: New file.
 103         * aarch64-dis.h: New file.
 104         * aarch64-gen.c: New file.
 105         * aarch64-opc.c: New file.
 106         * aarch64-opc.h: New file.
 107         * aarch64-tbl.h: New file.
 108         * configure.in: Add AArch64.
 109         * configure: Regenerate.
 110         * disassemble.c: Add AArch64.
 111         * aarch64-asm-2.c: New file (automatically generated).
 112         * aarch64-dis-2.c: New file (automatically generated).
 113         * aarch64-opc-2.c: New file (automatically generated).
 114         * po/POTFILES.in: Regenerate.
 115
 116 2012-08-13  Maciej W. Rozycki  <macro@codesourcery.com>
 117
 118         * micromips-opc.c (micromips_opcodes): Update comment.
 119         * mips-opc.c (mips_builtin_opcodes): Likewise.  Mark coprocessor
 120         instructions for IOCT as appropriate.
 121         * mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with
 122         opcode_is_member.
 123         * configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with
 124         the result of a check for the -Wno-missing-field-initializers
 125         GCC option.
 126         * Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable.
 127         (mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to
 128         compilation.
 129         (mips16-opc.lo): Likewise.
 130         (micromips-opc.lo): Likewise.
 131         * aclocal.m4: Regenerate.
 132         * configure: Regenerate.
 133         * Makefile.in: Regenerate.
 134
 135 2012-08-11  Saravanan Ekanathan <saravanan.ekanathan@amd.com>
 136
 137         PR gas/14423
 138         * i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS.
 139         * i386-init.h: Regenerated.
 140
 141 2012-08-09  Nick Clifton  <nickc@redhat.com>
 142
 143         * po/vi.po: Updated Vietnamese translation.
 144
 145 2012-08-07  Roland McGrath  <mcgrathr@google.com>
 146
 147         * i386-dis.c (reg_table): Fill out REG_0F0D table with
 148         AMD-reserved cases as "prefetch".
 149         (MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants.
 150         (MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise.
 151         (reg_table): Use those under REG_0F18.
 152         (mod_table): Add those cases as "nop/reserved".
 153
 154 2012-08-07  Jan Beulich <jbeulich@suse.com>
 155
 156         * i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
 157
 158 2012-08-06  Roland McGrath  <mcgrathr@google.com>
 159
 160         * i386-dis.c (print_insn): Print spaces between multiple excess
 161         prefixes.  Return actual number of excess prefixes consumed,
 162         not always one.
 163
 164         * i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
 165
 166 2012-08-06  Roland McGrath  <mcgrathr@google.com>
 167             Victor Khimenko  <khim@google.com>
 168             H.J. Lu  <hongjiu.lu@intel.com>
 169
 170         * i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG.
 171         (putop): For 'T', 'U', and 'V', treat REX_W like DFLAG.
 172         (intel_operand_size): For stack_v_mode, treat REX_W like DFLAG.
 173         (OP_E_register): Likewise.
 174         (OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
 175
 176 2012-08-02  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 177
 178         * configure.in: Formatting.
 179         * configure: Regenerate.
 180
 181 2012-08-01  Alan Modra  <amodra@gmail.com>
 182
 183         * h8300-dis.c: Fix printf arg warnings.
 184         * i960-dis.c: Likewise.
 185         * mips-dis.c: Likewise.
 186         * pdp11-dis.c: Likewise.
 187         * sh-dis.c: Likewise.
 188         * v850-dis.c: Likewise.
 189         * configure.in: Formatting.
 190         * configure: Regenerate.
 191         * rl78-decode.c: Regenerate.
 192         * po/POTFILES.in: Regenerate.
 193
 194 2012-07-31  Chao-Ying Fu  <fu@mips.com>
 195             Catherine Moore  <clm@codesourcery.com>
 196             Maciej W. Rozycki  <macro@codesourcery.com>
 197
 198         * micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
 199         (DSP_VOLA): Likewise.
 200         (D32, D33): Likewise.
 201         (micromips_opcodes): Add DSP ASE instructions.
 202         * mips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
 203         <'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
 204
 205 2012-07-31  Jan Beulich <jbeulich@suse.com>
 206
 207         * i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2
 208         instruction group. Mark as requiring AVX2.
 209         * i386-tbl.h: Re-generate.
 210
 211 2012-07-30  Nick Clifton  <nickc@redhat.com>
 212
 213         * po/opcodes.pot: Updated template.
 214         * po/es.po: Updated Spanish translation.
 215         * po/fi.po: Updated Finnish translation.
 216
 217 2012-07-27  Mike Frysinger  <vapier@gentoo.org>
 218
 219         * configure.in (BFD_VERSION): Run bfd/configure --version and
 220         parse the output of that.
 221         * configure: Regenerate.
 222
 223 2012-07-25  James Lemke  <jwlemke@codesourcery.com>
 224
 225         * ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
 226
 227 2012-07-24  Stephan McCamant  <smcc@cs.berkeley.edu>
 228             Dr David Alan Gilbert  <dave@treblig.org>
 229
 230         PR binutils/13135
 231         * arm-dis.c: Add necessary casts for printing integer values.
 232         Use %s when printing string values.
 233         * hppa-dis.c: Likewise.
 234         * m68k-dis.c: Likewise.
 235         * microblaze-dis.c: Likewise.
 236         * mips-dis.c: Likewise.
 237         * sparc-dis.c: Likewise.
 238
 239 2012-07-19  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 240
 241         PR binutils/14355
 242         * i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
 243         (VEX_LEN_0FXOP_08_CD): Likewise.
 244         (VEX_LEN_0FXOP_08_CE): Likewise.
 245         (VEX_LEN_0FXOP_08_CF): Likewise.
 246         (VEX_LEN_0FXOP_08_EC): Likewise.
 247         (VEX_LEN_0FXOP_08_ED): Likewise.
 248         (VEX_LEN_0FXOP_08_EE): Likewise.
 249         (VEX_LEN_0FXOP_08_EF): Likewise.
 250         (xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
 251         vpcomub, vpcomuw, vpcomud, vpcomuq.
 252         (vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
 253         VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
 254         VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
 255         VEX_LEN_0FXOP_08_EF.
 256
 257 2012-07-16  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 258
 259         * i386-dis.c (PREFIX_0F38F6): New.
 260         (prefix_table): Add adcx, adox instructions.
 261         (three_byte_table): Use PREFIX_0F38F6.
 262         (mod_table): Add rdseed instruction.
 263         * i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
 264         (cpu_flags): Likewise.
 265         * i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
 266         (i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
 267         * i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
 268         prefetchw.
 269         * i386-tbl.h: Regenerate.
 270         * i386-init.h: Likewise.
 271
 272 2012-07-05  Thomas Schwinge  <thomas@codesourcery.com>
 273
 274         * mips-dis.c: Remove gratuitous newline.
 275
 276 2012-07-05  Sean Keys  <skeys@ipdatasys.com>
 277
 278         * xgate-dis.c: Removed an IF statement that will
 279         always be false due to overlapping operand masks.
 280         * xgate-opc.c: Corrected 'com' opcode entry and
 281         fixed spacing.
 282
 283 2012-07-02  Roland McGrath  <mcgrathr@google.com>
 284
 285         * i386-opc.tbl: Add RepPrefixOk to nop.
 286         * i386-tbl.h: Regenerate.
 287
 288 2012-06-28  Nick Clifton  <nickc@redhat.com>
 289
 290         * po/vi.po: Updated Vietnamese translation.
 291
 292 2012-06-22  Roland McGrath  <mcgrathr@google.com>
 293
 294         * i386-opc.tbl: Add RepPrefixOk to ret.
 295         * i386-tbl.h: Regenerate.
 296
 297         * i386-opc.h (RepPrefixOk): New enum constant.
 298         (i386_opcode_modifier): New bitfield 'repprefixok'.
 299         * i386-gen.c (opcode_modifiers): Add RepPrefixOk.
 300         * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
 301         instructions that have IsString.
 302         * i386-tbl.h: Regenerate.
 303
 304 2012-06-11  Andreas Schwab  <schwab@linux-m68k.org>
 305
 306         * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
 307         (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
 308         (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
 309         (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
 310         (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
 311         (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
 312         (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
 313         (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
 314         (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
 315
 316 2012-05-19  Alan Modra  <amodra@gmail.com>
 317
 318         * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
 319         (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
 320
 321 2012-05-18  Alan Modra  <amodra@gmail.com>
 322
 323         * ia64-opc.c: Remove #include "ansidecl.h".
 324         * z8kgen.c: Include sysdep.h first.
 325
 326         * arc-dis.c: Include sysdep.h first, remove some redundant includes.
 327         * bfin-dis.c: Likewise.
 328         * i860-dis.c: Likewise.
 329         * ia64-dis.c: Likewise.
 330         * ia64-gen.c: Likewise.
 331         * m68hc11-dis.c: Likewise.
 332         * mmix-dis.c: Likewise.
 333         * msp430-dis.c: Likewise.
 334         * or32-dis.c: Likewise.
 335         * rl78-dis.c: Likewise.
 336         * rx-dis.c: Likewise.
 337         * tic4x-dis.c: Likewise.
 338         * tilegx-opc.c: Likewise.
 339         * tilepro-opc.c: Likewise.
 340         * rx-decode.c: Regenerate.
 341
 342 2012-05-17  James Lemke  <jwlemke@codesourcery.com>
 343
 344         * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
 345
 346 2012-05-17  James Lemke  <jwlemke@codesourcery.com>
 347
 348         * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
 349
 350 2012-05-17  Daniel Richard G.  <skunk@iskunk.org>
 351             Nick Clifton  <nickc@redhat.com>
 352
 353         PR 14072
 354         * configure.in: Add check that sysdep.h has been included before
 355         any system header files.
 356         * configure: Regenerate.
 357         * config.in: Regenerate.
 358         * sysdep.h: Generate an error if included before config.h.
 359         * alpha-opc.c: Include sysdep.h before any other header file.
 360         * alpha-dis.c: Likewise.
 361         * avr-dis.c: Likewise.
 362         * cgen-opc.c: Likewise.
 363         * cr16-dis.c: Likewise.
 364         * cris-dis.c: Likewise.
 365         * crx-dis.c: Likewise.
 366         * d10v-dis.c: Likewise.
 367         * d10v-opc.c: Likewise.
 368         * d30v-dis.c: Likewise.
 369         * d30v-opc.c: Likewise.
 370         * h8500-dis.c: Likewise.
 371         * i370-dis.c: Likewise.
 372         * i370-opc.c: Likewise.
 373         * m10200-dis.c: Likewise.
 374         * m10300-dis.c: Likewise.
 375         * micromips-opc.c: Likewise.
 376         * mips-opc.c: Likewise.
 377         * mips61-opc.c: Likewise.
 378         * moxie-dis.c: Likewise.
 379         * or32-opc.c: Likewise.
 380         * pj-dis.c: Likewise.
 381         * ppc-dis.c: Likewise.
 382         * ppc-opc.c: Likewise.
 383         * s390-dis.c: Likewise.
 384         * sh-dis.c: Likewise.
 385         * sh64-dis.c: Likewise.
 386         * sparc-dis.c: Likewise.
 387         * sparc-opc.c: Likewise.
 388         * spu-dis.c: Likewise.
 389         * tic30-dis.c: Likewise.
 390         * tic54x-dis.c: Likewise.
 391         * tic80-dis.c: Likewise.
 392         * tic80-opc.c: Likewise.
 393         * tilegx-dis.c: Likewise.
 394         * tilepro-dis.c: Likewise.
 395         * v850-dis.c: Likewise.
 396         * v850-opc.c: Likewise.
 397         * vax-dis.c: Likewise.
 398         * w65-dis.c: Likewise.
 399         * xgate-dis.c: Likewise.
 400         * xtensa-dis.c: Likewise.
 401         * rl78-decode.opc: Likewise.
 402         * rl78-decode.c: Regenerate.
 403         * rx-decode.opc: Likewise.
 404         * rx-decode.c: Regenerate.
 405
 406 2012-05-17  Alan Modra  <amodra@gmail.com>
 407
 408         * ppc_dis.c: Don't include elf/ppc.h.
 409
 410 2012-05-16  Meador Inge  <meadori@codesourcery.com>
 411
 412         * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
 413         to PUSH/POP {reg}.
 414
 415 2012-05-15  James Murray <jsm@jsm-net.demon.co.uk>
 416             Stephane Carrez <stcarrez@nerim.fr>
 417
 418         * configure.in: Add S12X and XGATE co-processor support to m68hc11
 419         target.
 420         * disassemble.c: Likewise.
 421         * configure: Regenerate.
 422         * m68hc11-dis.c: Make objdump output more consistent, use hex
 423         instead of decimal and use 0x prefix for hex.
 424         * m68hc11-opc.c: Add S12X and XGATE opcodes.
 425
 426 2012-05-14  James Lemke  <jwlemke@codesourcery.com>
 427
 428         * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
 429         (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
 430         (vle_opcd_indices): New array.
 431         (lookup_vle): New function.
 432         (disassemble_init_powerpc): Revise for second (VLE) opcode table.
 433         (print_insn_powerpc): Likewise.
 434         * ppc-opc.c: Likewise.
 435
 436 2012-05-14  Catherine Moore  <clm@codesourcery.com>
 437             Maciej W. Rozycki  <macro@codesourcery.com>
 438             Rhonda Wittels  <rhonda@codesourcery.com>
 439             Nathan Froyd <froydnj@codesourcery.com>
 440
 441         * ppc-opc.c (insert_arx, extract_arx): New functions.
 442         (insert_ary, extract_ary): New functions.
 443         (insert_li20, extract_li20): New functions.
 444         (insert_rx, extract_rx): New functions.
 445         (insert_ry, extract_ry): New functions.
 446         (insert_sci8, extract_sci8): New functions.
 447         (insert_sci8n, extract_sci8n): New functions.
 448         (insert_sd4h, extract_sd4h): New functions.
 449         (insert_sd4w, extract_sd4w): New functions.
 450         (insert_vlesi, extract_vlesi): New functions.
 451         (insert_vlensi, extract_vlensi): New functions.
 452         (insert_vleui, extract_vleui): New functions.
 453         (insert_vleil, extract_vleil): New functions.
 454         (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
 455         (BI16, BI32, BO32, B8): New.
 456         (B15, B24, CRD32, CRS): New.
 457         (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
 458         (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
 459         (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
 460         (SH6_MASK): Use PPC_OPSHIFT_INV.
 461         (SI8, UI5, OIMM5, UI7, BO16): New.
 462         (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
 463         (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
 464         (ALLOW8_SPRG): New.
 465         (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
 466         (OPVUP, OPVUP_MASK OPVUP): New
 467         (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
 468         (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
 469         (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
 470         (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
 471         (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
 472         (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
 473         (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
 474         (SE_IM5, SE_IM5_MASK): New.
 475         (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
 476         (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
 477         (BO32DNZ, BO32DZ): New.
 478         (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
 479         (PPCVLE): New.
 480         (powerpc_opcodes): Add new VLE instructions.  Update existing
 481         instruction to include PPCVLE if supported.
 482         * ppc-dis.c (ppc_opts): Add vle entry.
 483         (get_powerpc_dialect): New function.
 484         (powerpc_init_dialect): VLE support.
 485         (print_insn_big_powerpc): Call get_powerpc_dialect.
 486         (print_insn_little_powerpc): Likewise.
 487         (operand_value_powerpc): Handle negative shift counts.
 488         (print_insn_powerpc): Handle 2-byte instruction lengths.
 489
 490 2012-05-11  Daniel Richard G.  <skunk@iskunk.org>
 491
 492         PR binutils/14028
 493         * configure.in: Invoke ACX_HEADER_STRING.
 494         * configure: Regenerate.
 495         * config.in: Regenerate.
 496         * sysdep.h: If STRINGS_WITH_STRING is defined then include both
 497         string.h and strings.h.
 498
 499 2012-05-11  Nick Clifton  <nickc@redhat.com>
 500
 501         PR binutils/14006
 502         * arm-dis.c (print_insn): Fix detection of instruction mode in
 503         files containing multiple executable sections.
 504
 505 2012-05-03  Sean Keys  <skeys@ipdatasys.com>
 506
 507         * Makefile.in, configure: regenerate
 508         * disassemble.c (disassembler): Recognize ARCH_XGATE.
 509         * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
 510         New functions.
 511         * configure.in: Recognize xgate.
 512         * xgate-dis.c, xgate-opc.c: New files for support of xgate
 513         * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
 514         and opcode generation for xgate.
 515
 516 2012-04-30  DJ Delorie  <dj@redhat.com>
 517
 518         * rx-decode.opc (MOV): Do not sign-extend immediates which are
 519         already the maximum bit size.
 520         * rx-decode.c: Regenerate.
 521
 522 2012-04-27  David S. Miller  <davem@davemloft.net>
 523
 524         * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
 525         * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
 526
 527         * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
 528         * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
 529
 530         * sparc-opc.c (CBCOND): New define.
 531         (CBCOND_XCC): Likewise.
 532         (cbcond): New helper macro.
 533         (sparc_opcodes): Add compare-and-branch instructions.
 534
 535         * sparc-dis.c (print_insn_sparc): Handle ')'.
 536         * sparc-opc.c (sparc_opcodes): Add crypto instructions.
 537
 538         * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
 539         into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
 540
 541 2012-04-12  David S. Miller  <davem@davemloft.net>
 542
 543         * sparc-dis.c (X_DISP10): Define.
 544         (print_insn_sparc): Handle '='.
 545
 546 2012-04-01  Mike Frysinger  <vapier@gentoo.org>
 547
 548         * bfin-dis.c (fmtconst): Replace decimal handling with a single
 549         sprintf call and the '*' field width.
 550
 551 2012-03-23  Maxim Kuvyrkov  <maxim@codesourcery.com>
 552
 553         * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
 554
 555 2012-03-16  Alan Modra  <amodra@gmail.com>
 556
 557         * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
 558         (powerpc_opcd_indices): Bump array size.
 559         (disassemble_init_powerpc): Set powerpc_opcd_indices entries
 560         corresponding to unused opcodes to following entry.
 561         (lookup_powerpc): New function, extracted and optimised from..
 562         (print_insn_powerpc): ..here.
 563
 564 2012-03-15  Alan Modra  <amodra@gmail.com>
 565             James Lemke  <jwlemke@codesourcery.com>
 566
 567         * disassemble.c (disassemble_init_for_target): Handle ppc init.
 568         * ppc-dis.c (private): New var.
 569         (powerpc_init_dialect): Don't return calloc failure, instead use
 570         private.
 571         (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
 572         (powerpc_opcd_indices): New array.
 573         (disassemble_init_powerpc): New function.
 574         (print_insn_big_powerpc): Don't init dialect here.
 575         (print_insn_little_powerpc): Likewise.
 576         (print_insn_powerpc): Start search using powerpc_opcd_indices.
 577
 578 2012-03-10  Edmar Wienskoski  <edmar@freescale.com>
 579
 580         * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
 581         * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
 582         (PPCVEC2, PPCTMR, E6500): New short names.
 583         (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
 584         mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
 585         lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
 586         lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
 587         lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
 588         optional operands on sync instruction for E6500 target.
 589
 590 2012-03-08  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 591
 592         * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
 593
 594 2012-02-27  Alan Modra  <amodra@gmail.com>
 595
 596         * mt-dis.c: Regenerate.
 597
 598 2012-02-27  Alan Modra  <amodra@gmail.com>
 599
 600         * v850-opc.c (extract_v8): Rearrange to make it obvious this
 601         is the inverse of corresponding insert function.
 602         (extract_d22, extract_u9, extract_r4): Likewise.
 603         (extract_d9): Correct sign extension.
 604         (extract_d16_15): Don't assume "long" is 32 bits, and don't
 605         rely on implementation defined behaviour for shift right of
 606         signed types.
 607         (extract_d16_16, extract_d17_16, extract_i9): Likewise.
 608         (extract_d23): Likewise, and correct mask.
 609
 610 2012-02-27  Alan Modra  <amodra@gmail.com>
 611
 612         * crx-dis.c (print_arg): Mask constant to 32 bits.
 613         * crx-opc.c (cst4_map): Use int array.
 614
 615 2012-02-27  Alan Modra  <amodra@gmail.com>
 616
 617         * arc-dis.c (BITS): Don't use shifts to mask off bits.
 618         (FIELDD): Sign extend with xor,sub.
 619
 620 2012-02-25  Walter Lee  <walt@tilera.com>
 621
 622         * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
 623         * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
 624         TILEPRO_OPC_LW_TLS_SN.
 625
 626 2012-02-21  H.J. Lu  <hongjiu.lu@intel.com>
 627
 628         * i386-opc.h (HLEPrefixNone): New.
 629         (HLEPrefixLock): Likewise.
 630         (HLEPrefixAny): Likewise.
 631         (HLEPrefixRelease): Likewise.
 632
 633 2012-02-08  H.J. Lu  <hongjiu.lu@intel.com>
 634
 635         * i386-dis.c (HLE_Fixup1): New.
 636         (HLE_Fixup2): Likewise.
 637         (HLE_Fixup3): Likewise.
 638         (Ebh1): Likewise.
 639         (Evh1): Likewise.
 640         (Ebh2): Likewise.
 641         (Evh2): Likewise.
 642         (Ebh3): Likewise.
 643         (Evh3): Likewise.
 644         (MOD_C6_REG_7): Likewise.
 645         (MOD_C7_REG_7): Likewise.
 646         (RM_C6_REG_7): Likewise.
 647         (RM_C7_REG_7): Likewise.
 648         (XACQUIRE_PREFIX): Likewise.
 649         (XRELEASE_PREFIX): Likewise.
 650         (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
 651         cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
 652         Ebh2/Evh2 on xchg.  Use Ebh3/Evh3 on mov.
 653         (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
 654         not, or, sbb, sub and xor.  Use Ebh3/Evh3 on mov.  Use
 655         MOD_C6_REG_7 and MOD_C7_REG_7.
 656         (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
 657         (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7.  Add xend and
 658         xtest.
 659         (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
 660         (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
 661
 662         * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
 663         CPU_RTM_FLAGS.
 664         (cpu_flags): Add CpuHLE and CpuRTM.
 665         (opcode_modifiers): Add HLEPrefixOk.
 666
 667         * i386-opc.h (CpuHLE): New.
 668         (CpuRTM): Likewise.
 669         (HLEPrefixOk): Likewise.
 670         (i386_cpu_flags): Add cpuhle and cpurtm.
 671         (i386_opcode_modifier): Add hleprefixok.
 672
 673         * i386-opc.tbl: Add HLEPrefixOk=3 to mov.  Add HLEPrefixOk to
 674         add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
 675         sbb, sub, xor and xadd.  Add HLEPrefixOk=2 to xchg with memory
 676         operand.  Add xacquire, xrelease, xabort, xbegin, xend and
 677         xtest.
 678         * i386-init.h: Regenerated.
 679         * i386-tbl.h: Likewise.
 680
 681 2012-01-24  DJ Delorie  <dj@redhat.com>
 682
 683         * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
 684         * rl78-decode.c: Regenerate.
 685
 686 2012-01-17  James Murray  <jsm@jsm-net.demon.co.uk>
 687
 688         PR binutils/10173
 689         * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
 690
 691 2012-01-17  Andreas Schwab  <schwab@linux-m68k.org>
 692
 693         * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
 694         register and move them after pmove with PSR/PCSR register.
 695
 696 2012-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 697
 698         * i386-dis.c (mod_table): Add vmfunc.
 699
 700         * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
 701         (cpu_flags): CpuVMFUNC.
 702
 703         * i386-opc.h (CpuVMFUNC): New.
 704         (i386_cpu_flags): Add cpuvmfunc.
 705
 706         * i386-opc.tbl: Add vmfunc.
 707         * i386-init.h: Regenerated.
 708         * i386-tbl.h: Likewise.
 709
 710 For older changes see ChangeLog-2011
 711 \f
 712 Local Variables:
 713 mode: change-log
 714 left-margin: 8
 715 fill-column: 74
 716 version-control: never
 717 End: