1 2005-10-21 Nick Clifton <nickc@redhat.com>
3 * bfin-dis.c: Tidy up code, removing redundant constructs.
5 2005-10-19 Martin Schwidefsky <schwidefsky@de.ibm.com>
7 * s390-opc.txt: Add unnormalized hfp multiply and multiply-and-add
10 2005-10-18 Nick Clifton <nickc@redhat.com>
12 * m32r-asm.c: Regenerate after updating m32r.opc.
14 2005-10-18 Jie Zhang <jie.zhang@analog.com>
16 * bfin-dis.c (print_insn_bfin): Do proper endian transform when
17 reading instruction from memory.
19 2005-10-18 Nick Clifton <nickc@redhat.com>
21 * m32r-asm.c: Regenerate after updating m32r.opc.
23 2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
25 * m32r-asm.c: Regenerate after updating m32r.opc.
27 2005-10-08 James Lemke <jim@wasabisystems.com>
29 * arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
32 2005-10-06 Daniel Jacobowitz <dan@codesourcery.com>
34 * ppc-dis.c (struct dis_private): Remove.
35 (powerpc_dialect): Avoid aliasing warnings.
36 (print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
38 2005-09-30 Nick Clifton <nickc@redhat.com>
40 * po/ga.po: New Irish translation.
41 * configure.in (ALL_LINGUAS): Add "ga".
42 * configure: Regenerate.
44 2005-09-30 H.J. Lu <hongjiu.lu@intel.com>
46 * Makefile.am: Run "make dep-am".
47 * Makefile.in: Regenerated.
48 * aclocal.m4: Likewise.
49 * configure: Likewise.
51 2005-09-30 Catherine Moore <clm@cm00re.com>
53 * Makefile.am: Bfin support.
54 * Makefile.in: Regenerated.
55 * aclocal.m4: Regenerated.
56 * bfin-dis.c: New file.
57 * configure.in: Bfin support.
58 * configure: Regenerated.
59 * disassemble.c (ARCH_bfin): Define.
60 (disassembler): Add case for bfd_arch_bfin.
62 2005-09-28 Jan Beulich <jbeulich@novell.com>
64 * i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
67 (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
68 (dis386): Document and use new 'V' meta character. Use it for
69 single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
70 opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
71 (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
72 data prefix as used whenever DFLAG was examined. Handle 'V'.
73 (intel_operand_size): Use stack_v_mode.
74 (OP_E): Use stack_v_mode, but handle only the special case of
75 64-bit mode without operand size override here; fall through to
76 v_mode case otherwise.
77 (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
78 and no operand size override is present.
79 (OP_J): Use get32s for obtaining the displacement also when rex64
82 2005-09-08 Paul Brook <paul@codesourcery.com>
84 * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
86 2005-09-06 Chao-ying Fu <fu@mips.com>
88 * mips-opc.c (MT32): New define.
89 (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
90 bottom to avoid opcode collision with "mftr" and "mttr".
92 * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
93 (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
96 2005-09-02 Paul Brook <paul@codesourcery.com>
98 * arm-dis.c (coprocessor_opcodes): Add null terminator.
100 2005-09-02 Paul Brook <paul@codesourcery.com>
102 * arm-dis.c (coprocessor_opcodes): New.
103 (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
104 (print_insn_coprocessor): New function.
105 (print_insn_arm): Use print_insn_coprocessor. Remove coprocessor
107 (print_insn_thumb32): Use print_insn_coprocessor.
109 2005-08-30 Paul Brook <paul@codesourcery.com>
111 * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
113 2005-08-26 Jan Beulich <jbeulich@novell.com>
115 * i386-dis.c (intel_operand_size): New, broken out from OP_E for
117 (OP_E): Call intel_operand_size, move call site out of mode
119 (OP_OFF): Call intel_operand_size if suffix_always. Remove
120 ATTRIBUTE_UNUSED from parameters.
121 (OP_OFF64): Likewise.
122 (OP_ESreg): Call intel_operand_size.
123 (OP_DSreg): Likewise.
124 (OP_DIR): Use colon rather than semicolon as separator of far
127 2005-08-25 Chao-ying Fu <fu@mips.com>
129 * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
130 (mips_builtin_opcodes): Add DSP instructions.
131 * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
133 (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
136 2005-08-23 David Ung <davidu@mips.com>
138 * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
139 instructions to the table.
141 2005-08-18 Alan Modra <amodra@bigpond.net.au>
143 * a29k-dis.c: Delete.
144 * Makefile.am: Remove a29k support.
145 * configure.in: Likewise.
146 * disassemble.c: Likewise.
147 * Makefile.in: Regenerate.
148 * configure: Regenerate.
149 * po/POTFILES.in: Regenerate.
151 2005-08-15 Daniel Jacobowitz <dan@codesourcery.com>
153 * ppc-dis.c (powerpc_dialect): Handle e300.
154 (print_ppc_disassembler_options): Likewise.
155 * ppc-opc.c (PPCE300): Define.
156 (powerpc_opcodes): Mark icbt as available for the e300.
158 2005-08-13 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
160 * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
161 Use "rp" instead of "%r2" in "b,l" insns.
163 2005-08-12 Martin Schwidefsky <schwidefsky@de.ibm.com>
165 * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
166 * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
168 * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
169 and 4 bit optional masks.
170 (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
171 INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
172 (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
173 MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
174 (s390_opformats): Likewise.
175 * s390-opc.txt: Add new instructions for cpu type z9-109.
177 2005-08-05 John David Anglin <dave.anglin@nrc-crnc.gc.ca>
179 * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
181 2005-07-29 Paul Brook <paul@codesourcery.com>
183 * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
185 2005-07-29 Paul Brook <paul@codesourcery.com>
187 * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
188 (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
190 2005-07-25 DJ Delorie <dj@redhat.com>
192 * m32c-asm.c Regenerate.
193 * m32c-dis.c Regenerate.
195 2005-07-20 DJ Delorie <dj@redhat.com>
197 * disassemble.c (disassemble_init_for_target): M32C ISAs are
198 enums, so convert them to bit masks, which attributes are.
200 2005-07-18 Nick Clifton <nickc@redhat.com>
202 * configure.in: Restore alpha ordering to list of arches.
203 * configure: Regenerate.
204 * disassemble.c: Restore alpha ordering to list of arches.
206 2005-07-18 Nick Clifton <nickc@redhat.com>
208 * m32c-asm.c: Regenerate.
209 * m32c-desc.c: Regenerate.
210 * m32c-desc.h: Regenerate.
211 * m32c-dis.c: Regenerate.
212 * m32c-ibld.h: Regenerate.
213 * m32c-opc.c: Regenerate.
214 * m32c-opc.h: Regenerate.
216 2005-07-18 H.J. Lu <hongjiu.lu@intel.com>
218 * i386-dis.c (PNI_Fixup): Update comment.
219 (VMX_Fixup): Properly handle the suffix check.
221 2005-07-16 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
223 * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
226 2005-07-16 Alan Modra <amodra@bigpond.net.au>
228 * Makefile.am: Run "make dep-am".
229 (stamp-m32c): Fix cpu dependencies.
230 * Makefile.in: Regenerate.
231 * ip2k-dis.c: Regenerate.
233 2007-07-15 H.J. Lu <hongjiu.lu@intel.com>
235 * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
236 (VMX_Fixup): New. Fix up Intel VMX Instructions.
240 (dis386_twobyte): Updated entries 0x78 and 0x79.
241 (twobyte_has_modrm): Likewise.
242 (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
243 (OP_G): Handle m_mode.
245 2005-07-14 Jim Blandy <jimb@redhat.com>
247 Add support for the Renesas M32C and M16C.
248 * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
249 * m32c-desc.h, m32c-opc.h: New.
250 * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
251 (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
253 (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
254 m32c-ibld.lo, m32c-opc.lo.
255 (CLEANFILES): List stamp-m32c.
256 (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
257 (CGEN_CPUS): Add m32c.
258 (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
259 (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
260 (m32c_opc_h): New variable.
261 (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
262 (m32c-opc.lo): New rules.
263 * Makefile.in: Regenerated.
264 * configure.in: Add case for bfd_m32c_arch.
265 * configure: Regenerated.
266 * disassemble.c (ARCH_m32c): New.
267 [ARCH_m32c]: #include "m32c-desc.h".
268 (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
269 (disassemble_init_for_target) [ARCH_m32c]: Same.
271 * cgen-ops.h, cgen-types.h: New files.
272 * Makefile.am (HFILES): List them.
273 * Makefile.in: Regenerated.
275 2005-07-07 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
277 * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
278 d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
279 ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
280 m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
281 ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
282 v850-dis.c: Fix format bugs.
283 * ia64-gen.c (fail, warn): Add format attribute.
284 * or32-opc.c (debug): Likewise.
286 2005-07-07 Khem Raj <kraj@mvista.com>
288 * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
291 2005-07-06 Alan Modra <amodra@bigpond.net.au>
293 * Makefile.am (stamp-m32r): Fix path to cpu files.
294 (stamp-m32r, stamp-iq2000): Likewise.
295 * Makefile.in: Regenerate.
296 * m32r-asm.c: Regenerate.
297 * po/POTFILES.in: Remove arm-opc.h. Add ms1-asm.c, ms1-desc.c,
298 ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
300 2005-07-05 Nick Clifton <nickc@redhat.com>
302 * iq2000-asm.c: Regenerate.
303 * ms1-asm.c: Regenerate.
305 2005-07-05 Jan Beulich <jbeulich@novell.com>
307 * i386-dis.c (SVME_Fixup): New.
308 (grps): Use it for the lidt entry.
309 (PNI_Fixup): Call OP_M rather than OP_E.
310 (INVLPG_Fixup): Likewise.
312 2005-07-04 H.J. Lu <hongjiu.lu@intel.com>
314 * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
316 2005-07-01 Nick Clifton <nickc@redhat.com>
318 * a29k-dis.c: Update to ISO C90 style function declarations and
320 * alpha-opc.c: Likewise.
321 * arc-dis.c: Likewise.
322 * arc-opc.c: Likewise.
323 * avr-dis.c: Likewise.
324 * cgen-asm.in: Likewise.
325 * cgen-dis.in: Likewise.
326 * cgen-ibld.in: Likewise.
327 * cgen-opc.c: Likewise.
328 * cris-dis.c: Likewise.
329 * d10v-dis.c: Likewise.
330 * d30v-dis.c: Likewise.
331 * d30v-opc.c: Likewise.
332 * dis-buf.c: Likewise.
333 * dlx-dis.c: Likewise.
334 * h8300-dis.c: Likewise.
335 * h8500-dis.c: Likewise.
336 * hppa-dis.c: Likewise.
337 * i370-dis.c: Likewise.
338 * i370-opc.c: Likewise.
339 * m10200-dis.c: Likewise.
340 * m10300-dis.c: Likewise.
341 * m68k-dis.c: Likewise.
342 * m88k-dis.c: Likewise.
343 * mips-dis.c: Likewise.
344 * mmix-dis.c: Likewise.
345 * msp430-dis.c: Likewise.
346 * ns32k-dis.c: Likewise.
347 * or32-dis.c: Likewise.
348 * or32-opc.c: Likewise.
349 * pdp11-dis.c: Likewise.
350 * pj-dis.c: Likewise.
351 * s390-dis.c: Likewise.
352 * sh-dis.c: Likewise.
353 * sh64-dis.c: Likewise.
354 * sparc-dis.c: Likewise.
355 * sparc-opc.c: Likewise.
356 * sysdep.h: Likewise.
357 * tic30-dis.c: Likewise.
358 * tic4x-dis.c: Likewise.
359 * tic80-dis.c: Likewise.
360 * v850-dis.c: Likewise.
361 * v850-opc.c: Likewise.
362 * vax-dis.c: Likewise.
363 * w65-dis.c: Likewise.
364 * z8kgen.c: Likewise.
366 * fr30-*: Regenerate.
368 * ip2k-*: Regenerate.
369 * iq2000-*: Regenerate.
370 * m32r-*: Regenerate.
372 * openrisc-*: Regenerate.
373 * xstormy16-*: Regenerate.
375 2005-06-23 Ben Elliston <bje@gnu.org>
377 * m68k-dis.c: Use ISC C90.
378 * m68k-opc.c: Formatting fixes.
380 2005-06-16 David Ung <davidu@mips.com>
382 * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
383 instructions to the table; seb/seh/sew/zeb/zeh/zew.
385 2005-06-15 Dave Brolley <brolley@redhat.com>
387 Contribute Morpho ms1 on behalf of Red Hat
388 * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
389 ms1-opc.h: New files, Morpho ms1 target.
391 2004-05-14 Stan Cox <scox@redhat.com>
393 * disassemble.c (ARCH_ms1): Define.
394 (disassembler): Handle bfd_arch_ms1
396 2004-05-13 Michael Snyder <msnyder@redhat.com>
398 * Makefile.am, Makefile.in: Add ms1 target.
399 * configure.in: Ditto.
401 2005-06-08 Zack Weinberg <zack@codesourcery.com>
403 * arm-opc.h: Delete; fold contents into ...
404 * arm-dis.c: ... here. Move includes of internal COFF headers
405 next to includes of internal ELF headers.
406 (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
407 (struct arm_opcode): Rename struct opcode32. Make 'assembler' const.
408 (struct thumb_opcode): Rename struct opcode16. Make 'assembler' const.
409 (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
410 (iwmmxt_wwnames, iwmmxt_wwssnames):
412 (regnames): Remove iWMMXt coprocessor register sets.
413 (iwmmxt_regnames, iwmmxt_cregnames): New statics.
414 (get_arm_regnames): Adjust fourth argument to match above changes.
415 (set_iwmmxt_regnames): Delete.
416 (print_insn_arm): Constify 'c'. Use ISO syntax for function
417 pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames
418 and iwmmxt_cregnames, not set_iwmmxt_regnames.
419 (print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use
420 ISO syntax for function pointer calls.
422 2005-06-07 Zack Weinberg <zack@codesourcery.com>
424 * arm-dis.c: Split up the comments describing the format codes, so
425 that the ARM and 16-bit Thumb opcode tables each have comments
426 preceding them that describe all the codes, and only the codes,
427 valid in those tables. (32-bit Thumb table is already like this.)
428 Reorder the lists in all three comments to match the order in
429 which the codes are implemented.
430 Remove all forward declarations of static functions. Convert all
431 function definitions to ISO C format.
432 (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
434 (print_insn_thumb16): Remove unused case 'I'.
435 (print_insn): Update for changed calling convention of subroutines.
437 2005-05-25 Jan Beulich <jbeulich@novell.com>
439 * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
440 hex (but retain it being displayed as signed). Remove redundant
441 checks. Add handling of displacements for 16-bit addressing in Intel
444 2005-05-25 Jan Beulich <jbeulich@novell.com>
446 * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
447 (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
448 masking of 'rm' in 16-bit memory address handling.
450 2005-05-19 Anton Blanchard <anton@samba.org>
452 * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
453 (print_ppc_disassembler_options): Document it.
454 * ppc-opc.c (SVC_LEV): Define.
455 (LEV): Allow optional operand.
457 (powerpc_opcodes): Extend "sc". Adjust "svc" and "svcl". Add
458 "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
460 2005-05-19 Kelley Cook <kcook@gcc.gnu.org>
462 * Makefile.in: Regenerate.
464 2005-05-17 Zack Weinberg <zack@codesourcery.com>
466 * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
467 instructions. Adjust disassembly of some opcodes to match
469 (thumb32_opcodes): New table.
470 (print_insn_thumb): Rename print_insn_thumb16; don't handle
471 two-halfword branches here.
472 (print_insn_thumb32): New function.
473 (print_insn): Choose among print_insn_arm, print_insn_thumb16,
474 and print_insn_thumb32. Be consistent about order of
475 halfwords when printing 32-bit instructions.
477 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
480 * i386-dis.c (branch_v_mode): New.
481 (indirEv): Use branch_v_mode instead of v_mode.
482 (OP_E): Handle branch_v_mode.
484 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
486 * d10v-dis.c (dis_2_short): Support 64bit host.
488 2005-05-07 Nick Clifton <nickc@redhat.com>
490 * po/nl.po: Updated translation.
492 2005-05-07 Nick Clifton <nickc@redhat.com>
494 * Update the address and phone number of the FSF organization in
495 the GPL notices in the following files:
496 a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
497 arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
498 avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
499 cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
500 crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
501 d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
502 fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
503 fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
504 frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
505 h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
506 i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
507 ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
508 ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
509 ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
510 ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
511 iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
512 iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
513 m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
514 m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
515 m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
516 maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
517 mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
518 openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
519 openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
520 or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
521 pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
522 s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
523 sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
524 tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
525 v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
526 xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
527 xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
528 xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
530 2005-05-05 James E Wilson <wilson@specifixinc.com>
532 * ia64-opc.c: Include sysdep.h before libiberty.h.
534 2005-05-05 Nick Clifton <nickc@redhat.com>
536 * configure.in (ALL_LINGUAS): Add vi.
537 * configure: Regenerate.
540 2005-04-26 Jerome Guitton <guitton@gnat.com>
542 * configure.in: Fix the check for basename declaration.
543 * configure: Regenerate.
545 2005-04-19 Alan Modra <amodra@bigpond.net.au>
547 * ppc-opc.c (RTO): Define.
548 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
549 entries to suit PPC440.
551 2005-04-18 Mark Kettenis <kettenis@gnu.org>
553 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
556 2005-04-14 Nick Clifton <nickc@redhat.com>
558 * po/fi.po: New translation: Finnish.
559 * configure.in (ALL_LINGUAS): Add fi.
560 * configure: Regenerate.
562 2005-04-14 Alan Modra <amodra@bigpond.net.au>
564 * Makefile.am (NO_WERROR): Define.
565 * configure.in: Invoke AM_BINUTILS_WARNINGS.
566 * Makefile.in: Regenerate.
567 * aclocal.m4: Regenerate.
568 * configure: Regenerate.
570 2005-04-04 Nick Clifton <nickc@redhat.com>
572 * fr30-asm.c: Regenerate.
573 * frv-asm.c: Regenerate.
574 * iq2000-asm.c: Regenerate.
575 * m32r-asm.c: Regenerate.
576 * openrisc-asm.c: Regenerate.
578 2005-04-01 Jan Beulich <jbeulich@novell.com>
580 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
581 visible operands in Intel mode. The first operand of monitor is
584 2005-04-01 Jan Beulich <jbeulich@novell.com>
586 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
587 easier future additions.
589 2005-03-31 Jerome Guitton <guitton@gnat.com>
591 * configure.in: Check for basename.
592 * configure: Regenerate.
595 2005-03-29 H.J. Lu <hongjiu.lu@intel.com>
597 * i386-dis.c (SEG_Fixup): New.
599 (dis386): Use "Sv" for 0x8c and 0x8e.
601 2005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
602 Nick Clifton <nickc@redhat.com>
604 * vax-dis.c: (entry_addr): New varible: An array of user supplied
605 function entry mask addresses.
606 (entry_addr_occupied_slots): New variable: The number of occupied
607 elements in entry_addr.
608 (entry_addr_total_slots): New variable: The total number of
609 elements in entry_addr.
610 (parse_disassembler_options): New function. Fills in the entry_addr
612 (free_entry_array): New function. Release the memory used by the
613 entry addr array. Suppressed because there is no way to call it.
614 (is_function_entry): Check if a given address is a function's
615 start address by looking at supplied entry mask addresses and
616 symbol information, if available.
617 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
619 2005-03-23 H.J. Lu <hongjiu.lu@intel.com>
621 * cris-dis.c (print_with_operands): Use ~31L for long instead
624 2005-03-20 H.J. Lu <hongjiu.lu@intel.com>
626 * mmix-opc.c (O): Revert the last change.
629 2005-03-19 H.J. Lu <hongjiu.lu@intel.com>
631 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
634 2005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
636 * mmix-opc.c (O, Z): Force expression as unsigned long.
638 2005-03-18 Nick Clifton <nickc@redhat.com>
640 * ip2k-asm.c: Regenerate.
641 * op/opcodes.pot: Regenerate.
643 2005-03-16 Nick Clifton <nickc@redhat.com>
644 Ben Elliston <bje@au.ibm.com>
646 * configure.in (werror): New switch: Add -Werror to the
647 compiler command line. Enabled by default. Disable via
649 * configure: Regenerate.
651 2005-03-16 Alan Modra <amodra@bigpond.net.au>
653 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
656 2005-03-15 Alan Modra <amodra@bigpond.net.au>
658 * po/es.po: Commit new Spanish translation.
660 * po/fr.po: Commit new French translation.
662 2005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
664 * vax-dis.c: Fix spelling error
665 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
666 of just "Entry mask: < r1 ... >"
668 2005-03-12 Zack Weinberg <zack@codesourcery.com>
670 * arm-dis.c (arm_opcodes): Document %E and %V.
671 Add entries for v6T2 ARM instructions:
672 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
673 (print_insn_arm): Add support for %E and %V.
674 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
676 2005-03-10 Jeff Baker <jbaker@qnx.com>
677 Alan Modra <amodra@bigpond.net.au>
679 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
680 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
682 (XSPRG_MASK): Mask off extra bits now part of sprg field.
683 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
684 mfsprg4..7 after msprg and consolidate.
686 2005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
688 * vax-dis.c (entry_mask_bit): New array.
689 (print_insn_vax): Decode function entry mask.
691 2005-03-07 Aldy Hernandez <aldyh@redhat.com>
693 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
695 2005-03-05 Alan Modra <amodra@bigpond.net.au>
697 * po/opcodes.pot: Regenerate.
699 2005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
701 * arc-dis.c (a4_decoding_class): New enum.
702 (dsmOneArcInst): Use the enum values for the decoding class.
703 Remove redundant case in the switch for decodingClass value 11.
705 2005-03-02 Jan Beulich <jbeulich@novell.com>
707 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
709 (OP_C): Consider lock prefix in non-64-bit modes.
711 2005-02-24 Alan Modra <amodra@bigpond.net.au>
713 * cris-dis.c (format_hex): Remove ineffective warning fix.
714 * crx-dis.c (make_instruction): Warning fix.
715 * frv-asm.c: Regenerate.
717 2005-02-23 Nick Clifton <nickc@redhat.com>
719 * cgen-dis.in: Use bfd_byte for buffers that are passed to
722 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
724 * crx-dis.c (make_instruction): Move argument structure into inner
725 scope and ensure that all of its fields are initialised before
728 * fr30-asm.c: Regenerate.
729 * fr30-dis.c: Regenerate.
730 * frv-asm.c: Regenerate.
731 * frv-dis.c: Regenerate.
732 * ip2k-asm.c: Regenerate.
733 * ip2k-dis.c: Regenerate.
734 * iq2000-asm.c: Regenerate.
735 * iq2000-dis.c: Regenerate.
736 * m32r-asm.c: Regenerate.
737 * m32r-dis.c: Regenerate.
738 * openrisc-asm.c: Regenerate.
739 * openrisc-dis.c: Regenerate.
740 * xstormy16-asm.c: Regenerate.
741 * xstormy16-dis.c: Regenerate.
743 2005-02-22 Alan Modra <amodra@bigpond.net.au>
745 * arc-ext.c: Warning fixes.
746 * arc-ext.h: Likewise.
747 * cgen-opc.c: Likewise.
748 * ia64-gen.c: Likewise.
749 * maxq-dis.c: Likewise.
750 * ns32k-dis.c: Likewise.
751 * w65-dis.c: Likewise.
752 * ia64-asmtab.c: Regenerate.
754 2005-02-22 Alan Modra <amodra@bigpond.net.au>
756 * fr30-desc.c: Regenerate.
757 * fr30-desc.h: Regenerate.
758 * fr30-opc.c: Regenerate.
759 * fr30-opc.h: Regenerate.
760 * frv-desc.c: Regenerate.
761 * frv-desc.h: Regenerate.
762 * frv-opc.c: Regenerate.
763 * frv-opc.h: Regenerate.
764 * ip2k-desc.c: Regenerate.
765 * ip2k-desc.h: Regenerate.
766 * ip2k-opc.c: Regenerate.
767 * ip2k-opc.h: Regenerate.
768 * iq2000-desc.c: Regenerate.
769 * iq2000-desc.h: Regenerate.
770 * iq2000-opc.c: Regenerate.
771 * iq2000-opc.h: Regenerate.
772 * m32r-desc.c: Regenerate.
773 * m32r-desc.h: Regenerate.
774 * m32r-opc.c: Regenerate.
775 * m32r-opc.h: Regenerate.
776 * m32r-opinst.c: Regenerate.
777 * openrisc-desc.c: Regenerate.
778 * openrisc-desc.h: Regenerate.
779 * openrisc-opc.c: Regenerate.
780 * openrisc-opc.h: Regenerate.
781 * xstormy16-desc.c: Regenerate.
782 * xstormy16-desc.h: Regenerate.
783 * xstormy16-opc.c: Regenerate.
784 * xstormy16-opc.h: Regenerate.
786 2005-02-21 Alan Modra <amodra@bigpond.net.au>
788 * Makefile.am: Run "make dep-am"
789 * Makefile.in: Regenerate.
791 2005-02-15 Nick Clifton <nickc@redhat.com>
793 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
794 compile time warnings.
795 (print_keyword): Likewise.
796 (default_print_insn): Likewise.
798 * fr30-desc.c: Regenerated.
799 * fr30-desc.h: Regenerated.
800 * fr30-dis.c: Regenerated.
801 * fr30-opc.c: Regenerated.
802 * fr30-opc.h: Regenerated.
803 * frv-desc.c: Regenerated.
804 * frv-dis.c: Regenerated.
805 * frv-opc.c: Regenerated.
806 * ip2k-asm.c: Regenerated.
807 * ip2k-desc.c: Regenerated.
808 * ip2k-desc.h: Regenerated.
809 * ip2k-dis.c: Regenerated.
810 * ip2k-opc.c: Regenerated.
811 * ip2k-opc.h: Regenerated.
812 * iq2000-desc.c: Regenerated.
813 * iq2000-dis.c: Regenerated.
814 * iq2000-opc.c: Regenerated.
815 * m32r-asm.c: Regenerated.
816 * m32r-desc.c: Regenerated.
817 * m32r-desc.h: Regenerated.
818 * m32r-dis.c: Regenerated.
819 * m32r-opc.c: Regenerated.
820 * m32r-opc.h: Regenerated.
821 * m32r-opinst.c: Regenerated.
822 * openrisc-desc.c: Regenerated.
823 * openrisc-desc.h: Regenerated.
824 * openrisc-dis.c: Regenerated.
825 * openrisc-opc.c: Regenerated.
826 * openrisc-opc.h: Regenerated.
827 * xstormy16-desc.c: Regenerated.
828 * xstormy16-desc.h: Regenerated.
829 * xstormy16-dis.c: Regenerated.
830 * xstormy16-opc.c: Regenerated.
831 * xstormy16-opc.h: Regenerated.
833 2005-02-14 H.J. Lu <hongjiu.lu@intel.com>
835 * dis-buf.c (perror_memory): Use sprintf_vma to print out
838 2005-02-11 Nick Clifton <nickc@redhat.com>
840 * iq2000-asm.c: Regenerate.
842 * frv-dis.c: Regenerate.
844 2005-02-07 Jim Blandy <jimb@redhat.com>
846 * Makefile.am (CGEN): Load guile.scm before calling the main
848 * Makefile.in: Regenerated.
849 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
850 Simply pass the cgen-opc.scm path to ${cgen} as its first
851 argument; ${cgen} itself now contains the '-s', or whatever is
852 appropriate for the Scheme being used.
854 2005-01-31 Andrew Cagney <cagney@gnu.org>
856 * configure: Regenerate to track ../gettext.m4.
858 2005-01-31 Jan Beulich <jbeulich@novell.com>
860 * ia64-gen.c (NELEMS): Define.
861 (shrink): Generate alias with missing second predicate register when
862 opcode has two outputs and these are both predicates.
863 * ia64-opc-i.c (FULL17): Define.
864 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
865 here to generate output template.
866 (TBITCM, TNATCM): Undefine after use.
867 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
868 first input. Add ld16 aliases without ar.csd as second output. Add
869 st16 aliases without ar.csd as second input. Add cmpxchg aliases
870 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
871 ar.ccv as third/fourth inputs. Consolidate through...
872 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
873 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
874 * ia64-asmtab.c: Regenerate.
876 2005-01-27 Andrew Cagney <cagney@gnu.org>
878 * configure: Regenerate to track ../gettext.m4 change.
880 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
882 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
883 * frv-asm.c: Rebuilt.
884 * frv-desc.c: Rebuilt.
885 * frv-desc.h: Rebuilt.
886 * frv-dis.c: Rebuilt.
887 * frv-ibld.c: Rebuilt.
888 * frv-opc.c: Rebuilt.
889 * frv-opc.h: Rebuilt.
891 2005-01-24 Andrew Cagney <cagney@gnu.org>
893 * configure: Regenerate, ../gettext.m4 was updated.
895 2005-01-21 Fred Fish <fnf@specifixinc.com>
897 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
898 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
899 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
902 2005-01-20 Alan Modra <amodra@bigpond.net.au>
904 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
906 2005-01-19 Fred Fish <fnf@specifixinc.com>
908 * mips-dis.c (no_aliases): New disassembly option flag.
909 (set_default_mips_dis_options): Init no_aliases to zero.
910 (parse_mips_dis_option): Handle no-aliases option.
911 (print_insn_mips): Ignore table entries that are aliases
912 if no_aliases is set.
913 (print_insn_mips16): Ditto.
914 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
915 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
916 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
917 * mips16-opc.c (mips16_opcodes): Ditto.
919 2005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
921 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
922 (inheritance diagram): Add missing edge.
923 (arch_sh1_up): Rename arch_sh_up to match external name to make life
924 easier for the testsuite.
925 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
926 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
927 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
928 arch_sh2a_or_sh4_up child.
929 (sh_table): Do renaming as above.
930 Correct comment for ldc.l for gas testsuite to read.
931 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
932 Correct comments for movy.w and movy.l for gas testsuite to read.
933 Correct comments for fmov.d and fmov.s for gas testsuite to read.
935 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
937 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
939 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
941 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
943 2005-01-10 Andreas Schwab <schwab@suse.de>
945 * disassemble.c (disassemble_init_for_target) <case
946 bfd_arch_ia64>: Set skip_zeroes to 16.
947 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
949 2004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
951 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
953 2004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
955 * avr-dis.c: Prettyprint. Added printing of symbol names in all
956 memory references. Convert avr_operand() to C90 formatting.
958 2004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
960 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
962 2004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
964 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
965 (no_op_insn): Initialize array with instructions that have no
967 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
969 2004-11-29 Richard Earnshaw <rearnsha@arm.com>
971 * arm-dis.c: Correct top-level comment.
973 2004-11-27 Richard Earnshaw <rearnsha@arm.com>
975 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
976 architecuture defining the insn.
977 (arm_opcodes, thumb_opcodes): Delete. Move to ...
978 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
980 Also include opcode/arm.h.
981 * Makefile.am (arm-dis.lo): Update dependency list.
982 * Makefile.in: Regenerate.
984 2004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
986 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
987 reflect the change to the short immediate syntax.
989 2004-11-19 Alan Modra <amodra@bigpond.net.au>
991 * or32-opc.c (debug): Warning fix.
992 * po/POTFILES.in: Regenerate.
994 * maxq-dis.c: Formatting.
995 (print_insn): Warning fix.
997 2004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
999 * arm-dis.c (WORD_ADDRESS): Define.
1000 (print_insn): Use it. Correct big-endian end-of-section handling.
1002 2004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
1003 Vineet Sharma <vineets@noida.hcltech.com>
1005 * maxq-dis.c: New file.
1006 * disassemble.c (ARCH_maxq): Define.
1007 (disassembler): Add 'print_insn_maxq_little' for handling maxq
1009 * configure.in: Add case for bfd_maxq_arch.
1010 * configure: Regenerate.
1011 * Makefile.am: Add support for maxq-dis.c
1012 * Makefile.in: Regenerate.
1013 * aclocal.m4: Regenerate.
1015 2004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
1017 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
1019 * crx-dis.c: Likewise.
1021 2004-11-04 Hans-Peter Nilsson <hp@axis.com>
1023 Generally, handle CRISv32.
1024 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
1025 (struct cris_disasm_data): New type.
1026 (format_reg, format_hex, cris_constraint, print_flags)
1027 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
1029 (format_sup_reg, print_insn_crisv32_with_register_prefix)
1030 (print_insn_crisv32_without_register_prefix)
1031 (print_insn_crisv10_v32_with_register_prefix)
1032 (print_insn_crisv10_v32_without_register_prefix)
1033 (cris_parse_disassembler_options): New functions.
1034 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
1035 parameter. All callers changed.
1036 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
1038 (cris_constraint) <case 'Y', 'U'>: New cases.
1039 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
1041 (print_with_operands) <case 'Y'>: New case.
1042 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
1043 <case 'N', 'Y', 'Q'>: New cases.
1044 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
1045 (print_insn_cris_with_register_prefix)
1046 (print_insn_cris_without_register_prefix): Call
1047 cris_parse_disassembler_options.
1048 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
1049 for CRISv32 and the size of immediate operands. New v32-only
1050 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
1051 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
1052 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
1053 Change brp to be v3..v10.
1054 (cris_support_regs): New vector.
1055 (cris_opcodes): Update head comment. New format characters '[',
1056 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
1057 Add new opcodes for v32 and adjust existing opcodes to accommodate
1058 differences to earlier variants.
1059 (cris_cond15s): New vector.
1061 2004-11-04 Jan Beulich <jbeulich@novell.com>
1063 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
1065 (Mp): Use f_mode rather than none at all.
1066 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
1067 replaces what previously was x_mode; x_mode now means 128-bit SSE
1069 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
1070 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
1071 pinsrw's second operand is Edqw.
1072 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
1073 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
1074 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
1075 mode when an operand size override is present or always suffixing.
1076 More instructions will need to be added to this group.
1077 (putop): Handle new macro chars 'C' (short/long suffix selector),
1078 'I' (Intel mode override for following macro char), and 'J' (for
1079 adding the 'l' prefix to far branches in AT&T mode). When an
1080 alternative was specified in the template, honor macro character when
1081 specified for Intel mode.
1082 (OP_E): Handle new *_mode values. Correct pointer specifications for
1083 memory operands. Consolidate output of index register.
1084 (OP_G): Handle new *_mode values.
1085 (OP_I): Handle const_1_mode.
1086 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
1087 respective opcode prefix bits have been consumed.
1088 (OP_EM, OP_EX): Provide some default handling for generating pointer
1091 2004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
1093 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
1096 2004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
1098 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
1099 (getregliststring): Support HI/LO and user registers.
1100 * crx-opc.c (crx_instruction): Update data structure according to the
1101 rearrangement done in CRX opcode header file.
1102 (crx_regtab): Likewise.
1103 (crx_optab): Likewise.
1104 (crx_instruction): Reorder load/stor instructions, remove unsupported
1106 support new Co-Processor instruction 'cpi'.
1108 2004-10-27 Nick Clifton <nickc@redhat.com>
1110 * opcodes/iq2000-asm.c: Regenerate.
1111 * opcodes/iq2000-desc.c: Regenerate.
1112 * opcodes/iq2000-desc.h: Regenerate.
1113 * opcodes/iq2000-dis.c: Regenerate.
1114 * opcodes/iq2000-ibld.c: Regenerate.
1115 * opcodes/iq2000-opc.c: Regenerate.
1116 * opcodes/iq2000-opc.h: Regenerate.
1118 2004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
1120 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1121 us4, us5 (respectively).
1122 Remove unsupported 'popa' instruction.
1123 Reverse operands order in store co-processor instructions.
1125 2004-10-15 Alan Modra <amodra@bigpond.net.au>
1127 * Makefile.am: Run "make dep-am"
1128 * Makefile.in: Regenerate.
1130 2004-10-12 Bob Wilson <bob.wilson@acm.org>
1132 * xtensa-dis.c: Use ISO C90 formatting.
1134 2004-10-09 Alan Modra <amodra@bigpond.net.au>
1136 * ppc-opc.c: Revert 2004-09-09 change.
1138 2004-10-07 Bob Wilson <bob.wilson@acm.org>
1140 * xtensa-dis.c (state_names): Delete.
1141 (fetch_data): Use xtensa_isa_maxlength.
1142 (print_xtensa_operand): Replace operand parameter with opcode/operand
1143 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
1144 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
1145 instruction bundles. Use xmalloc instead of malloc.
1147 2004-10-07 David Gibson <david@gibson.dropbear.id.au>
1149 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1152 2004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
1154 * crx-opc.c (crx_instruction): Support Co-processor insns.
1155 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1156 (getregliststring): Change function to use the above enum.
1157 (print_arg): Handle CO-Processor insns.
1158 (crx_cinvs): Add 'b' option to invalidate the branch-target
1161 2004-10-06 Aldy Hernandez <aldyh@redhat.com>
1163 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1164 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1165 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1166 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1167 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1169 2004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
1171 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1174 2004-09-30 Paul Brook <paul@codesourcery.com>
1176 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1177 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
1179 2004-09-17 H.J. Lu <hongjiu.lu@intel.com>
1181 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1182 (CONFIG_STATUS_DEPENDENCIES): New.
1183 (Makefile): Removed.
1184 (config.status): Likewise.
1185 * Makefile.in: Regenerated.
1187 2004-09-17 Alan Modra <amodra@bigpond.net.au>
1189 * Makefile.am: Run "make dep-am".
1190 * Makefile.in: Regenerate.
1191 * aclocal.m4: Regenerate.
1192 * configure: Regenerate.
1193 * po/POTFILES.in: Regenerate.
1194 * po/opcodes.pot: Regenerate.
1196 2004-09-11 Andreas Schwab <schwab@suse.de>
1198 * configure: Rebuild.
1200 2004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
1202 * ppc-opc.c (L): Make this field not optional.
1204 2004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
1206 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1207 Fix parameter to 'm[t|f]csr' insns.
1209 2004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
1211 * configure.in: Autoupdate to autoconf 2.59.
1212 * aclocal.m4: Rebuild with aclocal 1.4p6.
1213 * configure: Rebuild with autoconf 2.59.
1214 * Makefile.in: Rebuild with automake 1.4p6 (picking up
1215 bfd changes for autoconf 2.59 on the way).
1216 * config.in: Rebuild with autoheader 2.59.
1218 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
1220 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1222 2004-07-30 Michal Ludvig <mludvig@suse.cz>
1224 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1225 (GRPPADLCK2): New define.
1226 (twobyte_has_modrm): True for 0xA6.
1227 (grps): GRPPADLCK2 for opcode 0xA6.
1229 2004-07-29 Alexandre Oliva <aoliva@redhat.com>
1231 Introduce SH2a support.
1232 * sh-opc.h (arch_sh2a_base): Renumber.
1233 (arch_sh2a_nofpu_base): Remove.
1234 (arch_sh_base_mask): Adjust.
1235 (arch_opann_mask): New.
1236 (arch_sh2a, arch_sh2a_nofpu): Adjust.
1237 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1238 (sh_table): Adjust whitespace.
1239 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
1240 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
1241 instruction list throughout.
1242 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
1243 of arch_sh2a in instruction list throughout.
1244 (arch_sh2e_up): Accomodate above changes.
1245 (arch_sh2_up): Ditto.
1246 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
1247 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1248 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
1249 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1250 * sh-opc.h (arch_sh2a_nofpu): New.
1251 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1252 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1254 2004-01-20 DJ Delorie <dj@redhat.com>
1255 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1256 2003-12-29 DJ Delorie <dj@redhat.com>
1257 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1258 sh_opcode_info, sh_table): Add sh2a support.
1259 (arch_op32): New, to tag 32-bit opcodes.
1260 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1261 2003-12-02 Michael Snyder <msnyder@redhat.com>
1262 * sh-opc.h (arch_sh2a): Add.
1263 * sh-dis.c (arch_sh2a): Handle.
1264 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1266 2004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
1268 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1270 2004-07-22 Nick Clifton <nickc@redhat.com>
1273 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1274 insns - this is done by objdump itself.
1275 * h8500-dis.c (print_insn_h8500): Likewise.
1277 2004-07-21 Jan Beulich <jbeulich@novell.com>
1279 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1280 regardless of address size prefix in effect.
1281 (ptr_reg): Size or address registers does not depend on rex64, but
1282 on the presence of an address size override.
1283 (OP_MMX): Use rex.x only for xmm registers.
1284 (OP_EM): Use rex.z only for xmm registers.
1286 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1288 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1289 move/branch operations to the bottom so that VR5400 multimedia
1290 instructions take precedence in disassembly.
1292 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1294 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1295 ISA-specific "break" encoding.
1297 2004-07-13 Elvis Chiang <elvisfb@gmail.com>
1299 * arm-opc.h: Fix typo in comment.
1301 2004-07-11 Andreas Schwab <schwab@suse.de>
1303 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1305 2004-07-09 Andreas Schwab <schwab@suse.de>
1307 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1309 2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
1311 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1312 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1313 (crx-dis.lo): New target.
1314 (crx-opc.lo): Likewise.
1315 * Makefile.in: Regenerate.
1316 * configure.in: Handle bfd_crx_arch.
1317 * configure: Regenerate.
1318 * crx-dis.c: New file.
1319 * crx-opc.c: New file.
1320 * disassemble.c (ARCH_crx): Define.
1321 (disassembler): Handle ARCH_crx.
1323 2004-06-29 James E Wilson <wilson@specifixinc.com>
1325 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1326 * ia64-asmtab.c: Regnerate.
1328 2004-06-28 Alan Modra <amodra@bigpond.net.au>
1330 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1331 (extract_fxm): Don't test dialect.
1332 (XFXFXM_MASK): Include the power4 bit.
1333 (XFXM): Add p4 param.
1334 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
1336 2004-06-27 Alexandre Oliva <aoliva@redhat.com>
1338 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
1339 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1341 2004-06-26 Alan Modra <amodra@bigpond.net.au>
1343 * ppc-opc.c (BH, XLBH_MASK): Define.
1344 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1346 2004-06-24 Alan Modra <amodra@bigpond.net.au>
1348 * i386-dis.c (x_mode): Comment.
1349 (two_source_ops): File scope.
1350 (float_mem): Correct fisttpll and fistpll.
1351 (float_mem_mode): New table.
1353 (OP_E): Correct intel mode PTR output.
1354 (ptr_reg): Use open_char and close_char.
1355 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
1356 operands. Set two_source_ops.
1358 2004-06-15 Alan Modra <amodra@bigpond.net.au>
1360 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1361 instead of _raw_size.
1363 2004-06-08 Jakub Jelinek <jakub@redhat.com>
1365 * ia64-gen.c (in_iclass): Handle more postinc st
1367 * ia64-asmtab.c: Rebuilt.
1369 2004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
1371 * s390-opc.txt: Correct architecture mask for some opcodes.
1372 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1373 in the esa mode as well.
1375 2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
1377 * sh-dis.c (target_arch): Make unsigned.
1378 (print_insn_sh): Replace (most of) switch with a call to
1379 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1380 * sh-opc.h: Redefine architecture flags values.
1381 Add sh3-nommu architecture.
1382 Reorganise <arch>_up macros so they make more visual sense.
1383 (SH_MERGE_ARCH_SET): Define new macro.
1384 (SH_VALID_BASE_ARCH_SET): Likewise.
1385 (SH_VALID_MMU_ARCH_SET): Likewise.
1386 (SH_VALID_CO_ARCH_SET): Likewise.
1387 (SH_VALID_ARCH_SET): Likewise.
1388 (SH_MERGE_ARCH_SET_VALID): Likewise.
1389 (SH_ARCH_SET_HAS_FPU): Likewise.
1390 (SH_ARCH_SET_HAS_DSP): Likewise.
1391 (SH_ARCH_UNKNOWN_ARCH): Likewise.
1392 (sh_get_arch_from_bfd_mach): Add prototype.
1393 (sh_get_arch_up_from_bfd_mach): Likewise.
1394 (sh_get_bfd_mach_from_arch_set): Likewise.
1395 (sh_merge_bfd_arc): Likewise.
1397 2004-05-24 Peter Barada <peter@the-baradas.com>
1399 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1400 into new match_insn_m68k function. Loop over canidate
1401 matches and select first that completely matches.
1402 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1403 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1404 to verify addressing for MAC/EMAC.
1405 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1406 reigster halves since 'fpu' and 'spl' look misleading.
1407 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1408 * m68k-opc.c: Rearragne mac/emac cases to use longest for
1409 first, tighten up match masks.
1410 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
1411 'size' from special case code in print_insn_m68k to
1412 determine decode size of insns.
1414 2004-05-19 Alan Modra <amodra@bigpond.net.au>
1416 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1417 well as when -mpower4.
1419 2004-05-13 Nick Clifton <nickc@redhat.com>
1421 * po/fr.po: Updated French translation.
1423 2004-05-05 Peter Barada <peter@the-baradas.com>
1425 * m68k-dis.c(print_insn_m68k): Add new chips, use core
1426 variants in arch_mask. Only set m68881/68851 for 68k chips.
1427 * m68k-op.c: Switch from ColdFire chips to core variants.
1429 2004-05-05 Alan Modra <amodra@bigpond.net.au>
1432 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1434 2004-04-29 Ben Elliston <bje@au.ibm.com>
1436 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1437 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1439 2004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
1441 * sh-dis.c (print_insn_sh): Print the value in constant pool
1442 as a symbol if it looks like a symbol.
1444 2004-04-22 Peter Barada <peter@the-baradas.com>
1446 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1447 appropriate ColdFire architectures.
1448 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1450 Add EMAC instructions, fix MAC instructions. Remove
1451 macmw/macml/msacmw/msacml instructions since mask addressing now
1454 2004-04-20 Jakub Jelinek <jakub@redhat.com>
1456 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1457 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1458 suffix. Use fmov*x macros, create all 3 fpsize variants in one
1459 macro. Adjust all users.
1461 2004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
1463 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1466 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1468 * m32r-asm.c: Regenerate.
1470 2004-03-29 Stan Shebs <shebs@apple.com>
1472 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1475 2004-03-19 Alan Modra <amodra@bigpond.net.au>
1477 * aclocal.m4: Regenerate.
1478 * config.in: Regenerate.
1479 * configure: Regenerate.
1480 * po/POTFILES.in: Regenerate.
1481 * po/opcodes.pot: Regenerate.
1483 2004-03-16 Alan Modra <amodra@bigpond.net.au>
1485 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
1487 * ppc-opc.c (RA0): Define.
1488 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1489 (RAOPT): Rename from RAO. Update all uses.
1490 (powerpc_opcodes): Use RA0 as appropriate.
1492 2004-03-15 Aldy Hernandez <aldyh@redhat.com>
1494 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1496 2004-03-15 Alan Modra <amodra@bigpond.net.au>
1498 * sparc-dis.c (print_insn_sparc): Update getword prototype.
1500 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1502 * i386-dis.c (GRPPLOCK): Delete.
1503 (grps): Delete GRPPLOCK entry.
1505 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1507 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1509 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1510 (GRPPADLCK): Define.
1511 (dis386): Use NOP_Fixup on "nop".
1512 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1513 (twobyte_has_modrm): Set for 0xa7.
1514 (padlock_table): Delete. Move to..
1515 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
1517 (print_insn): Revert PADLOCK_SPECIAL code.
1518 (OP_E): Delete sfence, lfence, mfence checks.
1520 2004-03-12 Jakub Jelinek <jakub@redhat.com>
1522 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1523 (INVLPG_Fixup): New function.
1524 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1526 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1528 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1529 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1530 (padlock_table): New struct with PadLock instructions.
1531 (print_insn): Handle PADLOCK_SPECIAL.
1533 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1535 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1536 (OP_E): Twiddle clflush to sfence here.
1538 2004-03-08 Nick Clifton <nickc@redhat.com>
1540 * po/de.po: Updated German translation.
1542 2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
1544 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1545 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
1546 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1549 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1551 * frv-asm.c: Regenerate.
1552 * frv-desc.c: Regenerate.
1553 * frv-desc.h: Regenerate.
1554 * frv-dis.c: Regenerate.
1555 * frv-ibld.c: Regenerate.
1556 * frv-opc.c: Regenerate.
1557 * frv-opc.h: Regenerate.
1559 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1561 * frv-desc.c, frv-opc.c: Regenerate.
1563 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1565 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1567 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1569 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1570 Also correct mistake in the comment.
1572 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1574 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1575 ensure that double registers have even numbers.
1576 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1577 that reserved instruction 0xfffd does not decode the same
1579 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1580 REG_N refers to a double register.
1581 Add REG_N_B01 nibble type and use it instead of REG_NM
1583 Adjust the bit patterns in a few comments.
1585 2004-02-25 Aldy Hernandez <aldyh@redhat.com>
1587 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1589 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1591 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1593 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1595 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1597 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1599 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1600 mtivor32, mtivor33, mtivor34.
1602 2004-02-19 Aldy Hernandez <aldyh@redhat.com>
1604 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1606 2004-02-10 Petko Manolov <petkan@nucleusys.com>
1608 * arm-opc.h Maverick accumulator register opcode fixes.
1610 2004-02-13 Ben Elliston <bje@wasabisystems.com>
1612 * m32r-dis.c: Regenerate.
1614 2004-01-27 Michael Snyder <msnyder@redhat.com>
1616 * sh-opc.h (sh_table): "fsrra", not "fssra".
1618 2004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1620 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1623 2004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1625 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1627 2004-01-19 Alan Modra <amodra@bigpond.net.au>
1629 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1630 1. Don't print scale factor on AT&T mode when index missing.
1632 2004-01-16 Alexandre Oliva <aoliva@redhat.com>
1634 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1635 when loaded into XR registers.
1637 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
1639 * frv-desc.h: Regenerate.
1640 * frv-desc.c: Regenerate.
1641 * frv-opc.c: Regenerate.
1643 2004-01-13 Michael Snyder <msnyder@redhat.com>
1645 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1647 2004-01-09 Paul Brook <paul@codesourcery.com>
1649 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1652 2004-01-07 Daniel Jacobowitz <drow@mvista.com>
1654 * Makefile.am (libopcodes_la_DEPENDENCIES)
1655 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1656 comment about the problem.
1657 * Makefile.in: Regenerate.
1659 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
1661 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1662 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1663 cut&paste errors in shifting/truncating numerical operands.
1664 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1665 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1666 (parse_uslo16): Likewise.
1667 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1668 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1669 (parse_s12): Likewise.
1670 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1671 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1672 (parse_uslo16): Likewise.
1673 (parse_uhi16): Parse gothi and gotfuncdeschi.
1674 (parse_d12): Parse got12 and gotfuncdesc12.
1675 (parse_s12): Likewise.
1677 2004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1679 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1680 instruction which looks similar to an 'rla' instruction.
1682 For older changes see ChangeLog-0203
1688 version-control: never