1 2015-04-06 Ilya Tocar <ilya.tocar@intel.com>
2 H.J. Lu <hongjiu.lu@intel.com>
4 * i386-dis-evex.h (evex_table): Fill prefix_requirement field.
5 * i386-dis.c (PREFIX_MANDATORY_REPZ, PREFIX_MANDATORY_REPNZ,
6 PREFIX_MANDATORY_DATA, PREFIX_MANDATORY_ADDR, PREFIX_MANDATORY_LOCK,
7 PREFIX_UD_SHIFT, PREFIX_UD_REPZ, REFIX_UD_REPNZ, PREFIX_UD_DATA,
8 PREFIX_UD_ADDR, PREFIX_UD_LOCK, PREFIX_MANDATORY): Define.
9 (Bad_Opcode, FLOAT, DIS386, DIS386_PREFIX, THREE_BYTE_TABLE_PREFIX):
10 Fill prefix_requirement field.
11 (struct dis386): Add prefix_requirement field.
12 (dis386): Fill prefix_requirement field.
13 (dis386_twobyte): Ditto.
14 (twobyte_has_mandatory_prefix_: Remove.
15 (reg_table): Fill prefix_requirement field.
16 (prefix_table): Ditto.
17 (x86_64_table): Ditto.
18 (three_byte_table): Ditto.
21 (vex_len_table): Ditto.
25 (print_insn): Use prefix_requirement.
26 (FGRPd9_2, FGRPd9_4, FGRPd9_5, FGRPd9_6, FGRPd9_7, FGRPda_5, FGRPdb_4,
27 FGRPde_3, FGRPdf_4): Fill prefix_requirement field.
30 2015-03-30 Mike Frysinger <vapier@gentoo.org>
32 * d10v-opc.c (d10v_reg_name_cnt): Convert old style prototype.
34 2015-03-29 H.J. Lu <hongjiu.lu@intel.com>
36 * Makefile.in: Regenerated.
38 2015-03-25 Anton Blanchard <anton@samba.org>
40 * ppc-dis.c (disassemble_init_powerpc): Only initialise
41 powerpc_opcd_indices and vle_opcd_indices once.
43 2015-03-25 Anton Blanchard <anton@samba.org>
45 * ppc-opc.c (powerpc_opcodes): Add slbfee.
47 2015-03-24 Terry Guo <terry.guo@arm.com>
49 * arm-dis.c (opcode32): Updated to use new arm feature struct.
51 (coprocessor_opcodes): Replace bit with feature struct.
52 (neon_opcodes): Likewise.
53 (arm_opcodes): Likewise.
54 (thumb_opcodes): Likewise.
55 (thumb32_opcodes): Likewise.
56 (print_insn_coprocessor): Likewise.
57 (print_insn_arm): Likewise.
58 (select_arm_features): Follow new feature struct.
60 2015-03-17 Ganesh Gopalasubramanian <Ganesh.Gopalasubramanian@amd.com>
62 * i386-dis.c (rm_table): Add clzero.
63 * i386-gen.c (cpu_flag_init): Add new CPU_ZNVER1_FLAGS.
65 (cpu_flags): Add CpuCLZERO.
66 * i386-opc.h: Add CpuCLZERO.
67 * i386-opc.tbl: Add clzero.
68 * i386-init.h: Re-generated.
69 * i386-tbl.h: Re-generated.
71 2015-03-13 Andrew Bennett <andrew.bennett@imgtec.com>
73 * mips-opc.c (decode_mips_operand): Fix constraint issues
74 with u and y operands.
76 2015-03-13 Andrew Bennett <andrew.bennett@imgtec.com>
78 * mips-opc.c (mips_builtin_opcodes): Add evp and dvp instructions.
80 2015-03-10 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
82 * s390-opc.c: Add new IBM z13 instructions.
83 * s390-opc.txt: Likewise.
85 2015-03-10 Renlin Li <renlin.li@arm.com>
87 * aarch64-tbl.h (aarch64_opcode_table): Remove strub, ldurb, ldursb,
88 stur, ldur, sturh, ldurh, ldursh, ldursw, prfum F_HAS_ALIAS flag and
90 * aarch64-asm-2.c: Regenerate.
91 * aarch64-dis-2.c: Likewise.
92 * aarch64-opc-2.c: Likewise.
94 2015-03-03 Jiong Wang <jiong.wang@arm.com>
96 * arm-dis.c (arm_symbol_is_valid): Skip ARM private symbols.
98 2015-02-25 Oleg Endo <olegendo@gcc.gnu.org>
100 * sh-opc.h (clrs, sets): Mark as arch_sh3_nommu_up instead of
102 (pref): Mark as arch_sh2a_nofpu_or_sh3_nommu_up instead of
103 arch_sh2a_nofpu_or_sh4_nommu_nofpu_up.
105 2015-02-23 Vinay <Vinay.G@kpit.com>
107 * rl78-decode.opc (MOV): Added space between two operands for
108 'mov' instruction in index addressing mode.
109 * rl78-decode.c: Regenerate.
111 2015-02-19 Pedro Alves <palves@redhat.com>
113 * microblaze-dis.h [__cplusplus]: Wrap in extern "C".
115 2015-02-10 Pedro Alves <palves@redhat.com>
116 Tom Tromey <tromey@redhat.com>
118 * microblaze-opcm.h (or, and, xor): Rename to microblaze_or,
119 microblaze_and, microblaze_xor.
120 * microblaze-opc.h (opcodes): Adjust.
122 2015-01-28 James Bowman <james.bowman@ftdichip.com>
124 * Makefile.am: Add FT32 files.
125 * configure.ac: Handle FT32.
126 * disassemble.c (disassembler): Call print_insn_ft32.
127 * ft32-dis.c: New file.
128 * ft32-opc.c: New file.
129 * Makefile.in: Regenerate.
130 * configure: Regenerate.
131 * po/POTFILES.in: Regenerate.
133 2015-01-28 Kuan-Lin Chen <kuanlinchentw@gmail.com>
135 * nds32-asm.c (keyword_sr): Add new system registers.
137 2015-01-16 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
139 * s390-dis.c (s390_extract_operand): Support vector register
141 (s390_print_insn_with_opcode): Support new operands types and add
142 new handling of optional operands.
143 * s390-mkopc.c (s390_opcode_mode_val, s390_opcode_cpu_val): Remove
144 and include opcode/s390.h instead.
145 (struct op_struct): New field `flags'.
146 (insertOpcode, insertExpandedMnemonic): New parameter `flags'.
147 (dumpTable): Dump flags.
148 (main): Parse flags from the s390-opc.txt file. Add z13 as cpu
150 * s390-opc.c: Add new operands types, instruction formats, and
152 (s390_opformats): Add new formats for .insn.
153 * s390-opc.txt: Add new instructions.
155 2015-01-01 Alan Modra <amodra@gmail.com>
157 Update year range in copyright notice of all files.
159 For older changes see ChangeLog-2014
161 Copyright (C) 2015 Free Software Foundation, Inc.
163 Copying and distribution of this file, with or without modification,
164 are permitted in any medium without royalty provided the copyright
165 notice and this notice are preserved.
171 version-control: never