opcodes/ChangeLog

   1 2010-10-25  Nathan Sidwell  <nathan@codesourcery.com>
   2
   3         * tic6x-dis.c: Add attribution.
   4
   5 2010-10-22  Alan Modra  <amodra@gmail.com>
   6
   7         * Makefile.am (CLEANFILES): Add stamp-lm32.  Sort.
   8         * Makefile.in: Regenerate.
   9
  10 2010-10-18  Maciej W. Rozycki  <macro@linux-mips.org>
  11
  12         * mips-opc.c (mips_builtin_opcodes): Move M_LD_OB and M_SD_OB
  13         macros before their corresponding MIPS III hardware instructions.
  14
  15 2010-10-16  H.J. Lu  <hongjiu.lu@intel.com>
  16
  17         * i386-gen.c (cpu_flag_init): Add CpuNop to CPU_GENERIC64_FLAGS.
  18
  19         * i386-init.h: Regenerated.
  20
  21 2010-10-15  Mike Frysinger  <vapier@gentoo.org>
  22
  23         * bfin-dis.c (decode_dsp32alu_0): Call imm5d() for BYTEOP2M.
  24
  25 2010-10-14  H.J. Lu  <hongjiu.lu@intel.com>
  26
  27         * i386-opc.tbl: Remove CheckRegSize from movq.
  28         * i386-tbl.h: Regenerated.
  29
  30 2010-10-14  H.J. Lu  <hongjiu.lu@intel.com>
  31
  32         * i386-opc.tbl: Remove CheckRegSize from instructions with
  33         0, 1 or fixed operands.
  34         * i386-tbl.h: Regenerated.
  35
  36 2010-10-14  H.J. Lu  <hongjiu.lu@intel.com>
  37
  38         * i386-gen.c (opcode_modifiers): Add CheckRegSize.
  39
  40         * i386-opc.h (CheckRegSize): New.
  41         (i386_opcode_modifier): Add checkregsize.
  42
  43         * i386-opc.tbl: Add CheckRegSize to instructions which
  44         require register size check.
  45         * i386-tbl.h: Regenerated.
  46
  47 2010-10-12  Andreas Schwab  <schwab@linux-m68k.org>
  48
  49         * m68k-opc.c (m68k_opcodes): Move fnop before fbf.
  50
  51 2010-10-11  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
  52
  53         * s390-opc.c: Make the instruction masks for the load/store on
  54         condition instructions to cover the condition code mask as well.
  55         * s390-opc.txt: lgoc -> locg and stgoc -> stocg.
  56
  57 2010-10-11  Jan Kratochvil  <jan.kratochvil@redhat.com>
  58             Jiang Jilin  <freephp@gmail.com>
  59
  60         * Makefile.am (libopcodes_a_SOURCES): New as empty.
  61         * Makefile.in: Regenerate.
  62
  63 2010-10-09  Matt Rice  <ratmice@gmail.com>
  64
  65         * fr30-desc.h: Regenerate.
  66         * frv-desc.h: Regenerate.
  67         * ip2k-desc.h: Regenerate.
  68         * iq2000-desc.h: Regenerate.
  69         * lm32-desc.h: Regenerate.
  70         * m32c-desc.h: Regenerate.
  71         * m32r-desc.h: Regenerate.
  72         * mep-desc.h: Regenerate.
  73         * mep-opc.c: Regenerate.
  74         * mt-desc.h: Regenerate.
  75         * openrisc-desc.h: Regenerate.
  76         * xc16x-desc.h: Regenerate.
  77         * xstormy16-desc.h: Regenerate.
  78
  79 2010-10-08  Pierre Muller  <muller@ics.u-strasbg.fr>
  80
  81         Fix build with -DDEBUG=7
  82         * frv-opc.c: Regenerate.
  83         * or32-dis.c (DEBUG): Don't redefine.
  84         (find_bytes_big, or32_extract, or32_opcode_match, or32_print_register):
  85         Adapt DEBUG code to some type changes throughout.
  86         * or32-opc.c (or32_extract): Likewise.
  87
  88 2010-10-07  Bernd Schmidt  <bernds@codesourcery.com>
  89
  90         * tic6x-dis.c (print_insn_tic6x): Correct decoding of fstg field
  91         in SPKERNEL instructions.
  92
  93 2010-10-02  H.J. Lu  <hongjiu.lu@intel.com>
  94
  95         PR binutils/12076
  96         * i386-dis.c (RMAL): Remove duplicate.
  97
  98 2010-09-30  Pierre Muller  <muller@ics.u-strasbg.fr>
  99
 100         * s390-mkopc.c (main): Exit with error 1 if sscanf fails
 101         to parse all 6 parameters.
 102
 103 2010-09-28  Pierre Muller  <muller@ics.u-strasbg.fr>
 104
 105         * s390-mkopc.c (main): Change description array size to 80.
 106         Add maximum length of 79 to description parsing.
 107
 108 2010-09-27  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 109
 110         * configure: Regenerate.
 111
 112 2010-09-27  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 113
 114         * s390-mkopc.c (enum s390_opcde_cpu_val): Add S390_OPCODE_Z196.
 115         (main): Recognize the new CPU string.
 116         * s390-opc.c: Add new instruction formats and masks.
 117         * s390-opc.txt: Add new z196 instructions.
 118
 119 2010-09-27  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 120
 121         * s390-dis.c (print_insn_s390): Pick instruction with most
 122         specific mask.
 123         * s390-opc.c: Add unused bits to the insn mask.
 124         * s390-opc.txt: Reorder some instructions to prefer more recent
 125         versions.
 126
 127 2010-09-27  Tejas Belagod  <tejas.belagod@arm.com>
 128
 129         * arm_dis.c (print_insn_coprocessor): Apply off-by-alignment
 130         correction to unaligned PCs while printing comment.
 131
 132 2010-09-23  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 133
 134         * arm-dis.c (arm_opcodes): Add Virtualiztion Extensions support.
 135         (thumb32_opcodes): Likewise.
 136         (banked_regname): New function.
 137         (print_insn_arm): Add Virtualization Extensions support.
 138         (print_insn_thumb32): Likewise.
 139
 140 2010-09-23  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 141
 142         * arm-dis.c (arm_opcodes): Support disassembly of UDIV and SDIV in
 143         ARM state.
 144
 145 2010-09-23  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 146
 147         * arm-dis.c (arm_opcodes): SMC implies Security Extensions.
 148         (thumb32_opcodes): Likewise.
 149
 150 2010-09-23  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 151
 152         * arm-dis.c (arm_opcodes): Add support for pldw.
 153         (thumb32_opcodes): Likewise.
 154
 155 2010-09-22  Robin Getz  <robin.getz@analog.com>
 156
 157         * bfin-dis.c (fmtconst): Cast address to 32bits.
 158
 159 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
 160
 161         * bfin-dis.c (decode_REGMV_0): Rewrite valid combo checks.
 162
 163 2010-09-22  Robin Getz  <robin.getz@analog.com>
 164
 165         * bfin-dis.c (decode_ProgCtrl_0): Check for parallel insns.
 166         Reject P6/P7 to TESTSET.
 167         (decode_PushPopReg_0): Check for parallel insns.  Reject pushing
 168         SP onto the stack.
 169         (decode_PushPopMultiple_0): Check for parallel insns.  Make sure
 170         P/D fields match all the time.
 171         (decode_CCflag_0): Check for parallel insns.  Verify x/y fields
 172         are 0 for accumulator compares.
 173         (decode_CC2stat_0): Check for parallel insns.  Reject CC<op>CC.
 174         (decode_CaCTRL_0, decode_ccMV_0, decode_CC2dreg_0, decode_BRCC_0,
 175         decode_UJUMP_0, decode_LOGI2op_0, decode_COMPI2opD_0,
 176         decode_COMPI2opP_0, decode_LoopSetup_0, decode_LDIMMhalf_0,
 177         decode_CALLa_0, decode_linkage_0, decode_pseudoDEBUG_0,
 178         decode_pseudoOChar_0, decode_pseudodbg_assert_0): Check for parallel
 179         insns.
 180         (decode_dagMODim_0): Verify br field for IREG ops.
 181         (decode_LDST_0): Reject preg load into same preg.
 182         (_print_insn_bfin): Handle returns for ILLEGAL decodes.
 183         (print_insn_bfin): Likewise.
 184
 185 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
 186
 187         * bfin-dis.c (decode_PushPopMultiple_0): Return 0 when pr > 5.
 188
 189 2010-09-22  Robin Getz  <robin.getz@analog.com>
 190
 191         * bfin-dis.c (decode_dsp32shiftimm_0): Add missing "S" flag.
 192
 193 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
 194
 195         * bfin-dis.c (decode_CC2stat_0): Decode all ASTAT bits.
 196
 197 2010-09-22  Robin Getz  <robin.getz@analog.com>
 198
 199         * bfin-dis.c (IS_DREG, IS_PREG, IS_GENREG, IS_DAGREG): Reject
 200         register values greater than 8.
 201         (IS_RESERVEDREG, allreg, mostreg): New helpers.
 202         (decode_ProgCtrl_0): Call IS_DREG/IS_PREG as appropriate.
 203         (decode_PushPopReg_0): Call mostreg/allreg as appropriate.
 204         (decode_CC2dreg_0): Check valid CC register number.
 205
 206 2010-09-22  Robin Getz  <robin.getz@analog.com>
 207
 208         * bfin-dis.c (decode_pseudoDEBUG_0): Add space after DBG.
 209
 210 2010-09-22  Robin Getz  <robin.getz@analog.com>
 211
 212         * bfin-dis.c (machine_registers): Add AC0_COPY, V_COPY, and RND_MOD.
 213         (reg_names): Likewise.
 214         (decode_statbits): Likewise; while reformatting to make manageable.
 215
 216 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
 217
 218         * bfin-dis.c (decode_pseudoDEBUG_0): Add space after OUTC.
 219         (decode_pseudoOChar_0): New function.
 220         (_print_insn_bfin): Remove #if 0 and call new decode_pseudoOChar_0.
 221
 222 2010-09-22  Robin Getz  <robin.getz@analog.com>
 223
 224         * bfin-dis.c (decode_dsp32shift_0): Decode sub opcodes 2/2 as
 225         LSHIFT instead of SHIFT.
 226
 227 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
 228
 229         * bfin-dis.c (constant_formats): Constify the whole structure.
 230         (fmtconst): Add const to return value.
 231         (reg_names): Mark const.
 232         (decode_multfunc): Mark s0/s1 as const.
 233         (decode_macfunc): Mark a/sop as const.
 234
 235 2010-09-17  Tejas Belagod  <tejas.belagod@arm.com>
 236
 237         * arm_dis.c (coprocessor_opcodes): Add MRC entry for APSR_nzcv.
 238
 239 2010-09-14  Maciej W. Rozycki  <macro@codesourcery.com>
 240
 241         * mips-opc.c (mips_builtin_opcodes): Add "sync_acquire",
 242         "sync_mb", "sync_release", "sync_rmb" and "sync_wmb".
 243
 244 2010-09-10  Pierre Muller  <muller@ics.u-strasbg.fr>
 245
 246         * src/opcodes/dlx-dis.c (print_insn_dlx): Use dlx_insn type for
 247         dlx_insn_type array.
 248
 249 2010-08-31  H.J. Lu  <hongjiu.lu@intel.com>
 250
 251         PR binutils/11960
 252         * i386-dis.c (sIv): New.
 253         (dis386): Replace Iq with sIv on "pushT".
 254         (reg_table): Replace T with {T|} on callT, JcallT, jmpT and JjmpT.
 255         (x86_64_table): Replace {T|}/{P|} with P.
 256         (putop): Add 'w' to 'T'/'P' if needed for Intel syntax.
 257         (OP_sI): Update v_mode.  Remove w_mode.
 258
 259 2010-08-27  Nathan Froyd  <froydnj@codesourcery.com>
 260
 261         * ppc-opc.c (powerpc_opcodes) [lswx,lswi,stswx,stswi]: Deprecate
 262         on E500 and E500MC.
 263
 264 2010-08-17  H.J. Lu  <hongjiu.lu@intel.com>
 265
 266         * i386-dis.c (reg_table): Replace Eb with Mb on prefetch and
 267         prefetchw.
 268
 269 2010-08-06  Quentin Neill <quentin.neill@amd.com>
 270
 271         * i386-gen.c (cpu_flag_init): Define CpuNop extension flag, add
 272         to processor flags for PENTIUMPRO processors and later.
 273         * i386-opc.h (enum): Add CpuNop.
 274         (i386_cpu_flags): Add cpunop bit.
 275         * i386-opc.tbl: Change nop cpu_flags.
 276         * i386-init.h: Regenerated.
 277         * i386-tbl.h: Likewise.
 278
 279 2010-08-06  Quentin Neill <quentin.neill@amd.com>
 280
 281         * i386-opc.h (enum): Fix typos in comments.
 282
 283 2010-08-06  Alan Modra  <amodra@gmail.com>
 284
 285         * disassemble.c: Formatting.
 286         (disassemble_init_for_target <ARCH_m32c>): Comment on endian.
 287
 288 2010-08-05  H.J. Lu  <hongjiu.lu@intel.com>
 289
 290         * i386-opc.tbl: Add Cpu186 to ud1/ud2/ud2a/ud2b.
 291         * i386-tbl.h: Regenerated.
 292
 293 2010-08-05  H.J. Lu  <hongjiu.lu@intel.com>
 294
 295         * i386-dis.c (dis386_twobyte): Replace ud2a/ud2b with ud2/ud1.
 296
 297         * i386-opc.tbl: Add ud1.  Remove Cpu686 from ud2/ud2a/ud2b.
 298         * i386-tbl.h: Regenerated.
 299
 300 2010-07-29  DJ Delorie  <dj@redhat.com>
 301
 302         * rx-decode.opc (SRR): New.
 303         (rx_decode_opcode): Use it for movbi and movbir.  Decode NOP2 (mov
 304         r0,r0) and NOP3 (max r0,r0) special cases.
 305         * rx-decode.c: Regenerate.
 306
 307 2010-07-28  H.J. Lu  <hongjiu.lu@intel.com>
 308
 309         * i386-dis.c: Add 0F to VEX opcode enums.
 310
 311 2010-07-27  DJ Delorie  <dj@redhat.com>
 312
 313         * rx-decode.opc (store_flags): Remove, replace with F_* macros.
 314         (rx_decode_opcode): Likewise.
 315         * rx-decode.c: Regenerate.
 316
 317 2010-07-23  Naveen.H.S  <naveen.S@kpitcummins.com>
 318             Ina Pandit  <ina.pandit@kpitcummins.com>
 319
 320         * v850-dis.c (v850_sreg_names): Updated structure for system
 321         registers.
 322         (float_cc_names): new structure for condition codes.
 323         (print_value): Update the function that prints value.
 324         (get_operand_value): New function to get the operand value.
 325         (disassemble): Updated to handle the disassembly of instructions.
 326         (print_insn_v850): Updated function to print instruction for different
 327         families.
 328         * opcodes/v850-opc.c (v850_msg_is_out_of_range, insert_i5div1,
 329         extract_i5div1, insert_i5div2, extract_i5div2, insert_i5div3,
 330         extract_i5div3, insert_d5_4, extract_d5_4, extract_d8_6,
 331         insert_d8_7, extract_d8_7, insert_v8, extract_v8, insert_u16_loop,
 332         extract_u16_loop, insert_d16_15, extract_d16_15, insert_d16_16,
 333         extract_d16_16, nsert_d17_16, extract_d17_16, insert_d22,
 334         extract_d22, insert_d23, extract_d23, insert_i9, extract_i9,
 335         insert_u9, extract_u9, extract_spe, insert_r4, extract_r4): New.
 336         (insert_d8_7, insert_d5_4, insert_i5div): Remove.
 337         (v850_operands): Update with the relocation name. Also update
 338         the instructions with specific set of processors.
 339
 340 2010-07-08 Tejas Belagod <tejas.belagod@arm.com>
 341
 342         * arm-dis.c (print_insn_arm): Add cases for printing more
 343         symbolic operands.
 344         (print_insn_thumb32): Likewise.
 345
 346 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
 347
 348         * mips-dis.c (print_insn_mips): Correct branch instruction type
 349         determination.
 350
 351 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
 352
 353         * mips-dis.c (print_mips16_insn_arg): Remove branch instruction
 354         type and delay slot determination.
 355         (print_insn_mips16): Extend branch instruction type and delay
 356         slot determination to cover all instructions.
 357         * mips16-opc.c (BR): Remove macro.
 358         (UBR, CBR): New macros.
 359         (mips16_opcodes): Update branch annotation for "b", "beqz",
 360         "bnez", "bteqz" and "btnez".  Add branch annotation for "jalrc"
 361         and "jrc".
 362
 363 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
 364
 365         AVX Programming Reference (June, 2010)
 366         * i386-dis.c (mod_table): Replace rdrnd with rdrand.
 367         * i386-opc.tbl: Likewise.
 368         * i386-tbl.h: Regenerated.
 369
 370 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
 371
 372         * i386-opc.h (CpuFSGSBase): Fix a typo in comments.
 373
 374 2010-07-03  Andreas Schwab  <schwab@linux-m68k.org>
 375
 376         * ppc-dis.c (powerpc_init_dialect): Cast PPC_OPCODE_xxx to
 377         ppc_cpu_t before inverting.
 378         (ppc_parse_cpu): Likewise.
 379         (print_insn_powerpc): Likewise.
 380
 381 2010-07-03  Alan Modra  <amodra@gmail.com>
 382
 383         * ppc-dis.c (ppc_opts, powerpc_init_dialect): Remove old opcode flags.
 384         * ppc-opc.c (PPC32, POWER32, COM32, CLASSIC): Delete.
 385         (PPC64, MFDEC2): Update.
 386         (NON32, NO371): Define.
 387         (powerpc_opcode): Update to not use old opcode flags, and avoid
 388         -m601 duplicates.
 389
 390 2010-07-03  DJ Delorie  <dj@delorie.com>
 391
 392         * m32c-ibld.c: Regenerate.
 393
 394 2010-07-03  Alan Modra  <amodra@gmail.com>
 395
 396         * ppc-opc.c (PWR2COM): Define.
 397         (PPCPWR2): Add PPC_OPCODE_COMMON.
 398         (powerpc_opcodes): Add "subc", "subco", "subco.", "fcir", "fcir.",
 399         "fcirz", "fcirz." to -mcom opcodes.  Remove "mfsri", "dclst",
 400         "rac" from -mcom.
 401
 402 2010-07-01  H.J. Lu  <hongjiu.lu@intel.com>
 403
 404         AVX Programming Reference (June, 2010)
 405         * i386-dis.c (PREFIX_0FAE_REG_0): New.
 406         (PREFIX_0FAE_REG_1): Likewise.
 407         (PREFIX_0FAE_REG_2): Likewise.
 408         (PREFIX_0FAE_REG_3): Likewise.
 409         (PREFIX_VEX_3813): Likewise.
 410         (PREFIX_VEX_3A1D): Likewise.
 411         (prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
 412         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 and
 413         PREFIX_VEX_3A1D.
 414         (vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D.
 415         (mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
 416         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd.
 417
 418         * i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS,
 419         CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS.
 420         (cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C.
 421
 422         * i386-opc.h (CpuXsaveopt): New.
 423         (CpuFSGSBase): Likewise.
 424         (CpuRdRnd): Likewise.
 425         (CpuF16C): Likewise.
 426         (i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and
 427         cpuf16c.
 428
 429         * i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd,
 430         wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph.
 431         * i386-init.h: Regenerated.
 432         * i386-tbl.h: Likewise.
 433
 434 2010-07-01  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 435
 436         * ppc-opc.c (powerpc_opcodes): Revert deprecation of mfocrf, mtcrf
 437         and mtocrf on EFS.
 438
 439 2010-06-29  Alan Modra  <amodra@gmail.com>
 440
 441         * maxq-dis.c: Delete file.
 442         * Makefile.am: Remove references to maxq.
 443         * configure.in: Likewise.
 444         * disassemble.c: Likewise.
 445         * Makefile.in: Regenerate.
 446         * configure: Regenerate.
 447         * po/POTFILES.in: Regenerate.
 448
 449 2010-06-29  Alan Modra  <amodra@gmail.com>
 450
 451         * mep-dis.c: Regenerate.
 452
 453 2010-06-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 454
 455         * arm-disc.c (parse_insn_neon):  Fix Neon alignment syntax.
 456
 457 2010-06-27  Alan Modra  <amodra@gmail.com>
 458
 459         * arc-dis.c (arc_sprintf): Delete set but unused variables.
 460         (decodeInstr): Likewise.
 461         * dlx-dis.c (print_insn_dlx): Likewise.
 462         * h8300-dis.c (bfd_h8_disassemble_init): Likewise.
 463         * maxq-dis.c (check_move, print_insn): Likewise.
 464         * mep-dis.c (mep_examine_ivc2_insns): Likewise.
 465         * msp430-dis.c (msp430_branchinstr): Likewise.
 466         * bfin-dis.c (_print_insn_bfin): Avoid set but unused warning.
 467         * cgen-asm.in (parse_insn_normal, _cgen_assemble_insn): Likewise.
 468         * sparc-dis.c (print_insn_sparc): Likewise.
 469         * fr30-asm.c: Regenerate.
 470         * frv-asm.c: Regenerate.
 471         * ip2k-asm.c: Regenerate.
 472         * iq2000-asm.c: Regenerate.
 473         * lm32-asm.c: Regenerate.
 474         * m32c-asm.c: Regenerate.
 475         * m32r-asm.c: Regenerate.
 476         * mep-asm.c: Regenerate.
 477         * mt-asm.c: Regenerate.
 478         * openrisc-asm.c: Regenerate.
 479         * xc16x-asm.c: Regenerate.
 480         * xstormy16-asm.c: Regenerate.
 481
 482 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 483
 484         PR gas/11673
 485         * m68k-opc.c (m68k_opcodes): Remove move.l for isab and later.
 486
 487 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 488
 489         PR binutils/11676
 490         * m68k-dis.c (print_insn_arg): Prefix float constants with #0e.
 491
 492 2010-06-14  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 493
 494         * ppc-dis.c (ppc_opts):  Remove PPC_OPCODE_E500MC from e500 and
 495         e500x2.  Add PPC_OPCODE_E500 to e500 and e500x2
 496         * ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which
 497         touch floating point regs and are enabled by COM, PPC or PPCCOM.
 498         Treat sync as msync on e500.  Treat eieio as mbar 1 on e500.
 499         Treat lwsync as msync on e500.
 500
 501 2010-06-07  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 502
 503         * arm-dis.c (thumb-opcodes): Add disassembly for movs.
 504
 505 2010-05-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 506
 507         * arm-dis.c (print_insn_neon):  Ensure disassembly of Neon
 508         constants is the same on 32-bit and 64-bit hosts.
 509
 510 2010-05-27  Jason Duerstock  <jason.duerstock+binutils@gmail.com>
 511
 512         * m68k-dis.c (print_insn_m68k): Emit undefined instructions as
 513         .short directives so that they can be reassembled.
 514
 515 2010-05-26  Catherine Moore <clm@codesourcery.com>
 516             David Ung  <davidu@mips.com>
 517
 518         * mips-opc.c: Change membership to I1 for instructions ssnop and
 519         ehb.
 520
 521 2010-05-26  H.J. Lu  <hongjiu.lu@intel.com>
 522
 523         * i386-dis.c (sib): New.
 524         (get_sib): Likewise.
 525         (print_insn): Call get_sib.
 526         OP_E_memory): Use sib.
 527
 528 2010-05-26  Catherine Moore  <clm@codesoourcery.com>
 529
 530         * mips-dis.c (mips_arch): Remove INSN_MIPS16.
 531         * mips-opc.c (I16): Remove.
 532         (mips_builtin_op): Reclassify jalx.
 533
 534 2010-05-19  Alan Modra  <amodra@gmail.com>
 535
 536         * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
 537         divwe, divdeuo, divweuo, divdeo, divweo for A2.  Add icswepx.
 538
 539 2010-05-13  Alan Modra  <amodra@gmail.com>
 540
 541         * ppc-opc.c (powerpc_opcodes): Correct wclr encoding.
 542
 543 2010-05-11  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 544
 545         * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
 546         format.
 547         (print_insn_thumb16): Add support for new %W format.
 548
 549 2010-05-07  Tristan Gingold  <gingold@adacore.com>
 550
 551         * Makefile.in: Regenerate with automake 1.11.1.
 552         * aclocal.m4: Ditto.
 553
 554 2010-05-05  Nick Clifton  <nickc@redhat.com>
 555
 556         * po/es.po: Updated Spanish translation.
 557
 558 2010-04-22  Nick Clifton  <nickc@redhat.com>
 559
 560         * po/opcodes.pot: Updated by the Translation project.
 561         * po/vi.po: Updated Vietnamese translation.
 562
 563 2010-04-16  H.J. Lu  <hongjiu.lu@intel.com>
 564
 565         * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
 566         bits in opcode.
 567
 568 2010-04-09  Nick Clifton  <nickc@redhat.com>
 569
 570         * i386-dis.c (print_insn): Remove unused variable op.
 571         (OP_sI): Remove unused variable mask.
 572
 573 2010-04-07  Alan Modra  <amodra@gmail.com>
 574
 575         * configure: Regenerate.
 576
 577 2010-04-06  Peter Bergner  <bergner@vnet.ibm.com>
 578
 579         * ppc-opc.c (RBOPT): New define.
 580         ("dccci"): Enable for PPCA2.  Make operands optional.
 581         ("iccci"): Likewise.  Do not deprecate for PPC476.
 582
 583 2010-04-02  Masaki Muranaka  <monaka@monami-software.com>
 584
 585         * cr16-opc.c (cr16_instruction): Fix typo in comment.
 586
 587 2010-03-25  Joseph Myers  <joseph@codesourcery.com>
 588
 589         * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
 590         * Makefile.in: Regenerate.
 591         * configure.in (bfd_tic6x_arch): New.
 592         * configure: Regenerate.
 593         * disassemble.c (ARCH_tic6x): Define if ARCH_all.
 594         (disassembler): Handle TI C6X.
 595         * tic6x-dis.c: New.
 596
 597 2010-03-24  Mike Frysinger  <vapier@gentoo.org>
 598
 599         * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
 600
 601 2010-03-23  Joseph Myers  <joseph@codesourcery.com>
 602
 603         * dis-buf.c (buffer_read_memory): Give error for reading just
 604         before the start of memory.
 605
 606 2010-03-22  Sebastian Pop  <sebastian.pop@amd.com>
 607             Quentin Neill <quentin.neill@amd.com>
 608
 609         * i386-dis.c (OP_LWP_I): Removed.
 610         (reg_table): Do not use OP_LWP_I, use Iq.
 611         (OP_LWPCB_E): Remove use of names16.
 612         (OP_LWP_E): Same.
 613         * i386-opc.tbl: Removed 16bit LWP insns.  32bit LWP insns
 614         should not set the Vex.length bit.
 615         * i386-tbl.h: Regenerated.
 616
 617 2010-02-25  Edmar Wienskoski  <edmar@freescale.com>
 618
 619         * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
 620
 621 2010-02-24  Nick Clifton  <nickc@redhat.com>
 622
 623         PR binutils/6773
 624         * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
 625         <prefix>asx.  Replace <prefix>subaddx with <prefix>sax.
 626         (thumb32_opcodes): Likewise.
 627
 628 2010-02-15  Nick Clifton  <nickc@redhat.com>
 629
 630         * po/vi.po: Updated Vietnamese translation.
 631
 632 2010-02-12  Doug Evans  <dje@sebabeach.org>
 633
 634         * lm32-opinst.c: Regenerate.
 635
 636 2010-02-11  Doug Evans  <dje@sebabeach.org>
 637
 638         * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
 639         (print_address): Delete CGEN_PRINT_ADDRESS.
 640         * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
 641         * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
 642         * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
 643         * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
 644
 645         * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
 646         * frv-desc.c, * frv-desc.h, * frv-opc.c,
 647         * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
 648         * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
 649         * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
 650         * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
 651         * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
 652         * mep-desc.c, * mep-desc.h, * mep-opc.c,
 653         * mt-desc.c, * mt-desc.h, * mt-opc.c,
 654         * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
 655         * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
 656         * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
 657
 658 2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 659
 660         * i386-dis.c: Update copyright.
 661         * i386-gen.c: Likewise.
 662         * i386-opc.h: Likewise.
 663         * i386-opc.tbl: Likewise.
 664
 665 2010-02-10  Quentin Neill  <quentin.neill@amd.com>
 666             Sebastian Pop  <sebastian.pop@amd.com>
 667
 668         * i386-dis.c (OP_EX_VexImmW): Reintroduced
 669         function to handle 5th imm8 operand.
 670         (PREFIX_VEX_3A48): Added.
 671         (PREFIX_VEX_3A49): Added.
 672         (VEX_W_3A48_P_2): Added.
 673         (VEX_W_3A49_P_2): Added.
 674         (prefix table): Added entries for PREFIX_VEX_3A48
 675         and PREFIX_VEX_3A49.
 676         (vex table): Added entries for VEX_W_3A48_P_2 and
 677         and VEX_W_3A49_P_2.
 678         * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
 679         for Vec_Imm4 operands.
 680         * i386-opc.h (enum): Added Vec_Imm4.
 681         (i386_operand_type): Added vec_imm4.
 682         * i386-opc.tbl: Add entries for vpermilp[ds].
 683         * i386-init.h: Regenerated.
 684         * i386-tbl.h: Regenerated.
 685
 686 2010-02-10  Richard Sandiford  <r.sandiford@uk.ibm.com>
 687
 688         * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
 689         and "pwr7".  Move "a2" into alphabetical order.
 690
 691 2010-02-08  Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 692
 693         * ppc-dis.c (ppc_opts): Add titan entry.
 694         * ppc-opc.c (TITAN, MULHW): Define.
 695         (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
 696
 697 2010-02-03  Quentin Neill  <quentin.neill@amd.com>
 698
 699         * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
 700         to CPU_BDVER1_FLAGS
 701         * i386-init.h: Regenerated.
 702
 703 2010-02-03  Anthony Green  <green@moxielogic.com>
 704
 705         * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
 706         0x0f, and make 0x00 an illegal instruction.
 707
 708 2010-01-29  Daniel Jacobowitz  <dan@codesourcery.com>
 709
 710         * opcodes/arm-dis.c (struct arm_private_data): New.
 711         (print_insn_coprocessor, print_insn_arm): Update to use struct
 712         arm_private_data.
 713         (is_mapping_symbol, get_map_sym_type): New functions.
 714         (get_sym_code_type): Check the symbol's section.  Do not check
 715         mapping symbols.
 716         (print_insn): Default to disassembling ARM mode code.  Check
 717         for mapping symbols separately from other symbols.  Use
 718         struct arm_private_data.
 719
 720 2010-01-28  H.J. Lu  <hongjiu.lu@intel.com>
 721
 722         * i386-dis.c (EXVexWdqScalar): New.
 723         (vex_scalar_w_dq_mode): Likewise.
 724         (prefix_table): Update entries for PREFIX_VEX_3899,
 725         PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
 726         PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
 727         PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
 728         PREFIX_VEX_38BD and PREFIX_VEX_38BF.
 729         (intel_operand_size): Handle vex_scalar_w_dq_mode.
 730         (OP_EX): Likewise.
 731
 732 2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>
 733
 734         * i386-dis.c (XMScalar): New.
 735         (EXdScalar): Likewise.
 736         (EXqScalar): Likewise.
 737         (EXqScalarS): Likewise.
 738         (VexScalar): Likewise.
 739         (EXdVexScalarS): Likewise.
 740         (EXqVexScalarS): Likewise.
 741         (XMVexScalar): Likewise.
 742         (scalar_mode): Likewise.
 743         (d_scalar_mode): Likewise.
 744         (d_scalar_swap_mode): Likewise.
 745         (q_scalar_mode): Likewise.
 746         (q_scalar_swap_mode): Likewise.
 747         (vex_scalar_mode): Likewise.
 748         (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
 749         VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
 750         VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
 751         VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
 752         VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
 753         VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
 754         VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
 755         VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
 756         VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
 757         VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
 758         (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
 759         VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
 760         VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
 761         VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
 762         VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
 763         VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
 764         VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
 765         VEX_W_7E_P_1, VEX_W_D6_P_2  VEX_W_C2_P_1, VEX_W_C2_P_3,
 766         VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
 767         (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
 768         q_scalar_mode, q_scalar_swap_mode.
 769         (OP_XMM): Handle scalar_mode.
 770         (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
 771         and q_scalar_swap_mode.
 772         (OP_VEX): Handle vex_scalar_mode.
 773
 774 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 775
 776         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 777
 778 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 779
 780         * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
 781
 782 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 783
 784         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 785
 786 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 787
 788         * i386-dis.c (Bad_Opcode): New.
 789         (bad_opcode): Likewise.
 790         (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
 791         (dis386_twobyte): Likewise.
 792         (reg_table): Likewise.
 793         (prefix_table): Likewise.
 794         (x86_64_table): Likewise.
 795         (vex_len_table): Likewise.
 796         (vex_w_table): Likewise.
 797         (mod_table): Likewise.
 798         (rm_table): Likewise.
 799         (float_reg): Likewise.
 800         (reg_table): Remove trailing "(bad)" entries.
 801         (prefix_table): Likewise.
 802         (x86_64_table): Likewise.
 803         (vex_len_table): Likewise.
 804         (vex_w_table): Likewise.
 805         (mod_table): Likewise.
 806         (rm_table): Likewise.
 807         (get_valid_dis386): Handle bytemode 0.
 808
 809 2010-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 810
 811         * i386-opc.h (VEXScalar): New.
 812
 813         * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
 814         instructions.
 815         * i386-tbl.h: Regenerated.
 816
 817 2010-01-21  H.J. Lu  <hongjiu.lu@intel.com>
 818
 819         * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
 820
 821         * i386-opc.tbl: Add xsave64 and xrstor64.
 822         * i386-tbl.h: Regenerated.
 823
 824 2010-01-20  Nick Clifton  <nickc@redhat.com>
 825
 826         PR 11170
 827         * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
 828         based post-indexed addressing.
 829
 830 2010-01-15  Sebastian Pop  <sebastian.pop@amd.com>
 831
 832         * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
 833         * i386-tbl.h: Regenerated.
 834
 835 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 836
 837         * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
 838         comments.
 839
 840 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 841
 842         * i386-dis.c (names_mm): New.
 843         (intel_names_mm): Likewise.
 844         (att_names_mm): Likewise.
 845         (names_xmm): Likewise.
 846         (intel_names_xmm): Likewise.
 847         (att_names_xmm): Likewise.
 848         (names_ymm): Likewise.
 849         (intel_names_ymm): Likewise.
 850         (att_names_ymm): Likewise.
 851         (print_insn): Set names_mm, names_xmm and names_ymm.
 852         (OP_MMX): Use names_mm, names_xmm and names_ymm.
 853         (OP_XMM): Likewise.
 854         (OP_EM): Likewise.
 855         (OP_EMC): Likewise.
 856         (OP_MXC): Likewise.
 857         (OP_EX): Likewise.
 858         (XMM_Fixup): Likewise.
 859         (OP_VEX): Likewise.
 860         (OP_EX_VexReg): Likewise.
 861         (OP_Vex_2src): Likewise.
 862         (OP_Vex_2src_1): Likewise.
 863         (OP_Vex_2src_2): Likewise.
 864         (OP_REG_VexI4): Likewise.
 865
 866 2010-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 867
 868         * i386-dis.c (print_insn): Update comments.
 869
 870 2010-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 871
 872         * i386-dis.c (rex_original): Removed.
 873         (ckprefix): Remove rex_original.
 874         (print_insn): Update comments.
 875
 876 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 877
 878         * Makefile.in: Regenerate.
 879         * configure: Regenerate.
 880
 881 2010-01-07  Doug Evans  <dje@sebabeach.org>
 882
 883         * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
 884         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 885         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 886         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 887         * xstormy16-ibld.c: Regenerate.
 888
 889 2010-01-06  Quentin Neill  <quentin.neill@amd.com>
 890
 891         * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
 892         * i386-init.h: Regenerated.
 893
 894 2010-01-06  Daniel Gutson  <dgutson@codesourcery.com>
 895
 896         * arm-dis.c (print_insn): Fixed search for next symbol and data
 897         dumping condition, and the initial mapping symbol state.
 898
 899 2010-01-05  Doug Evans  <dje@sebabeach.org>
 900
 901         * cgen-ibld.in: #include "cgen/basic-modes.h".
 902         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 903         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 904         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 905         * xstormy16-ibld.c: Regenerate.
 906
 907 2010-01-04  Nick Clifton  <nickc@redhat.com>
 908
 909         PR 11123
 910         * arm-dis.c (print_insn_coprocessor): Initialise value.
 911
 912 2010-01-04  Edmar Wienskoski  <edmar@freescale.com>
 913
 914         * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
 915
 916 2010-01-02  Doug Evans  <dje@sebabeach.org>
 917
 918         * cgen-asm.in: Update copyright year.
 919         * cgen-dis.in: Update copyright year.
 920         * cgen-ibld.in: Update copyright year.
 921         * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
 922         * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
 923         * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
 924         * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
 925         * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
 926         * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
 927         * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
 928         * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
 929         * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
 930         * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
 931         * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
 932         * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
 933         * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
 934         * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
 935         * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
 936         * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
 937         * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
 938         * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
 939         * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
 940         * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
 941         * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
 942
 943 For older changes see ChangeLog-2009
 944 \f
 945 Local Variables:
 946 mode: change-log
 947 left-margin: 8
 948 fill-column: 74
 949 version-control: never
 950 End: