* gas/config/tc-arm.c (el_type_type_check): Add handling for 16-bit
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
2
3 * arm-dis.c (coprocessor_opcodes): Add support for HP/DP
4 conversions.
5
6 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
7
8 * arm-dis.c (coprocessor_opcodes): Add VRINT.
9 (neon_opcodes): Likewise.
10
11 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
12
13 * arm-dis.c (coprocessor_opcodes): Add support for new VCVT
14 variants.
15 (neon_opcodes): Likewise.
16
17 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
18
19 * arm-dis.c (coprocessor_opcodes): Add VMAXNM/VMINNM.
20 (neon_opcodes): Likewise.
21
22 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
23
24 * arm-dis.c (coprocessor_opcodes): Add VSEL.
25 (print_insn_coprocessor): Add new %<>c bitfield format
26 specifier.
27
28 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
29
30 * arm-dis.c (arm_opcodes): Add LDRA/STRL instructions.
31 (thumb32_opcodes): Likewise.
32 (print_arm_insn): Add support for %<>T formatter.
33
34 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
35
36 * arm-dis.c (arm_opcodes): Add HLT.
37 (thumb_opcodes): Likewise.
38
39 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
40
41 * arm-dis.c (thumb32_opcodes): Add DCPS instruction.
42
43 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
44
45 * arm-dis.c (arm_opcodes): Add SEVL.
46 (thumb_opcodes): Likewise.
47 (thumb32_opcodes): Likewise.
48
49 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
50
51 * arm-dis.c (data_barrier_option): New function.
52 (print_insn_arm): Use data_barrier_option.
53 (print_insn_thumb32): Use data_barrier_option.
54
55 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com
56
57 * arm-dis.c (COND_UNCOND): New constant.
58 (print_insn_coprocessor): Add support for %u format specifier.
59 (print_insn_neon): Likewise.
60
61 2012-08-21 David S. Miller <davem@davemloft.net>
62
63 * sparc-opc.c (4-argument crypto instructions): Fix encoding using
64 F3F4 macro.
65
66 2012-08-20 Edmar Wienskoski <edmar@freescale.com>
67
68 * ppc-opc.c (powerpc_opcodes): Changed opcode for vabsdub,
69 vabsduh, vabsduw, mviwsplt.
70
71 2012-08-17 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
72
73 * i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and
74 CPU_BTVER2_FLAGS.
75
76 * i386-opc.h: Update CpuPRFCHW comment.
77
78 * i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW.
79 * i386-init.h: Regenerated.
80 * i386-tbl.h: Likewise.
81
82 2012-08-17 Nick Clifton <nickc@redhat.com>
83
84 * po/uk.po: New Ukranian translation.
85 * configure.in (ALL_LINGUAS): Add uk.
86 * configure: Regenerate.
87
88 2012-08-16 Peter Bergner <bergner@vnet.ibm.com>
89
90 * ppc-opc.c (powerpc_opcodes) <"lswx">: Use RAX for the second and
91 RBX for the third operand.
92 <"lswi">: Use RAX for second and NBI for the third operand.
93
94 2012-08-15 DJ Delorie <dj@redhat.com>
95
96 * rl78-decode.opc (rl78_decode_opcode): Merge %e and %[01]
97 operands, so that data addresses can be corrected when not
98 ES-overridden.
99 * rl78-decode.c: Regenerate.
100 * rl78-dis.c (print_insn_rl78): Make order of modifiers
101 irrelevent. When the 'e' specifier is used on an operand and no
102 ES prefix is provided, adjust address to make it absolute.
103
104 2012-08-15 Peter Bergner <bergner@vnet.ibm.com>
105
106 * ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR.
107
108 2012-08-15 Peter Bergner <bergner@vnet.ibm.com>
109
110 * ppc-opc.c <xnop, yield, mdoio, mdoom>: New extended mnemonics.
111
112 2012-08-14 Maciej W. Rozycki <macro@codesourcery.com>
113
114 * mips-dis.c (print_insn_args): Add GET_OP and GET_OP_S local
115 macros, use local variables for info struct member accesses,
116 update the type of the variable used to hold the instruction
117 word.
118 (print_insn_mips, print_mips16_insn_arg): Likewise.
119 (print_insn_mips16): Add GET_OP and GET_OP_S local macros, use
120 local variables for info struct member accesses.
121 (print_insn_micromips): Add GET_OP_S local macro.
122 (_print_insn_mips): Update the type of the variable used to hold
123 the instruction word.
124
125 2012-08-13 Ian Bolton <ian.bolton@arm.com>
126 Laurent Desnogues <laurent.desnogues@arm.com>
127 Jim MacArthur <jim.macarthur@arm.com>
128 Marcus Shawcroft <marcus.shawcroft@arm.com>
129 Nigel Stephens <nigel.stephens@arm.com>
130 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
131 Richard Earnshaw <rearnsha@arm.com>
132 Sofiane Naci <sofiane.naci@arm.com>
133 Tejas Belagod <tejas.belagod@arm.com>
134 Yufeng Zhang <yufeng.zhang@arm.com>
135
136 * Makefile.am: Add AArch64.
137 * Makefile.in: Regenerate.
138 * aarch64-asm.c: New file.
139 * aarch64-asm.h: New file.
140 * aarch64-dis.c: New file.
141 * aarch64-dis.h: New file.
142 * aarch64-gen.c: New file.
143 * aarch64-opc.c: New file.
144 * aarch64-opc.h: New file.
145 * aarch64-tbl.h: New file.
146 * configure.in: Add AArch64.
147 * configure: Regenerate.
148 * disassemble.c: Add AArch64.
149 * aarch64-asm-2.c: New file (automatically generated).
150 * aarch64-dis-2.c: New file (automatically generated).
151 * aarch64-opc-2.c: New file (automatically generated).
152 * po/POTFILES.in: Regenerate.
153
154 2012-08-13 Maciej W. Rozycki <macro@codesourcery.com>
155
156 * micromips-opc.c (micromips_opcodes): Update comment.
157 * mips-opc.c (mips_builtin_opcodes): Likewise. Mark coprocessor
158 instructions for IOCT as appropriate.
159 * mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with
160 opcode_is_member.
161 * configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with
162 the result of a check for the -Wno-missing-field-initializers
163 GCC option.
164 * Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable.
165 (mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to
166 compilation.
167 (mips16-opc.lo): Likewise.
168 (micromips-opc.lo): Likewise.
169 * aclocal.m4: Regenerate.
170 * configure: Regenerate.
171 * Makefile.in: Regenerate.
172
173 2012-08-11 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
174
175 PR gas/14423
176 * i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS.
177 * i386-init.h: Regenerated.
178
179 2012-08-09 Nick Clifton <nickc@redhat.com>
180
181 * po/vi.po: Updated Vietnamese translation.
182
183 2012-08-07 Roland McGrath <mcgrathr@google.com>
184
185 * i386-dis.c (reg_table): Fill out REG_0F0D table with
186 AMD-reserved cases as "prefetch".
187 (MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants.
188 (MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise.
189 (reg_table): Use those under REG_0F18.
190 (mod_table): Add those cases as "nop/reserved".
191
192 2012-08-07 Jan Beulich <jbeulich@suse.com>
193
194 * i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
195
196 2012-08-06 Roland McGrath <mcgrathr@google.com>
197
198 * i386-dis.c (print_insn): Print spaces between multiple excess
199 prefixes. Return actual number of excess prefixes consumed,
200 not always one.
201
202 * i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
203
204 2012-08-06 Roland McGrath <mcgrathr@google.com>
205 Victor Khimenko <khim@google.com>
206 H.J. Lu <hongjiu.lu@intel.com>
207
208 * i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG.
209 (putop): For 'T', 'U', and 'V', treat REX_W like DFLAG.
210 (intel_operand_size): For stack_v_mode, treat REX_W like DFLAG.
211 (OP_E_register): Likewise.
212 (OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
213
214 2012-08-02 Jan-Benedict Glaw <jbglaw@lug-owl.de>
215
216 * configure.in: Formatting.
217 * configure: Regenerate.
218
219 2012-08-01 Alan Modra <amodra@gmail.com>
220
221 * h8300-dis.c: Fix printf arg warnings.
222 * i960-dis.c: Likewise.
223 * mips-dis.c: Likewise.
224 * pdp11-dis.c: Likewise.
225 * sh-dis.c: Likewise.
226 * v850-dis.c: Likewise.
227 * configure.in: Formatting.
228 * configure: Regenerate.
229 * rl78-decode.c: Regenerate.
230 * po/POTFILES.in: Regenerate.
231
232 2012-07-31 Chao-Ying Fu <fu@mips.com>
233 Catherine Moore <clm@codesourcery.com>
234 Maciej W. Rozycki <macro@codesourcery.com>
235
236 * micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
237 (DSP_VOLA): Likewise.
238 (D32, D33): Likewise.
239 (micromips_opcodes): Add DSP ASE instructions.
240 * mips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
241 <'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
242
243 2012-07-31 Jan Beulich <jbeulich@suse.com>
244
245 * i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2
246 instruction group. Mark as requiring AVX2.
247 * i386-tbl.h: Re-generate.
248
249 2012-07-30 Nick Clifton <nickc@redhat.com>
250
251 * po/opcodes.pot: Updated template.
252 * po/es.po: Updated Spanish translation.
253 * po/fi.po: Updated Finnish translation.
254
255 2012-07-27 Mike Frysinger <vapier@gentoo.org>
256
257 * configure.in (BFD_VERSION): Run bfd/configure --version and
258 parse the output of that.
259 * configure: Regenerate.
260
261 2012-07-25 James Lemke <jwlemke@codesourcery.com>
262
263 * ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
264
265 2012-07-24 Stephan McCamant <smcc@cs.berkeley.edu>
266 Dr David Alan Gilbert <dave@treblig.org>
267
268 PR binutils/13135
269 * arm-dis.c: Add necessary casts for printing integer values.
270 Use %s when printing string values.
271 * hppa-dis.c: Likewise.
272 * m68k-dis.c: Likewise.
273 * microblaze-dis.c: Likewise.
274 * mips-dis.c: Likewise.
275 * sparc-dis.c: Likewise.
276
277 2012-07-19 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
278
279 PR binutils/14355
280 * i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
281 (VEX_LEN_0FXOP_08_CD): Likewise.
282 (VEX_LEN_0FXOP_08_CE): Likewise.
283 (VEX_LEN_0FXOP_08_CF): Likewise.
284 (VEX_LEN_0FXOP_08_EC): Likewise.
285 (VEX_LEN_0FXOP_08_ED): Likewise.
286 (VEX_LEN_0FXOP_08_EE): Likewise.
287 (VEX_LEN_0FXOP_08_EF): Likewise.
288 (xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
289 vpcomub, vpcomuw, vpcomud, vpcomuq.
290 (vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
291 VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
292 VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
293 VEX_LEN_0FXOP_08_EF.
294
295 2012-07-16 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
296
297 * i386-dis.c (PREFIX_0F38F6): New.
298 (prefix_table): Add adcx, adox instructions.
299 (three_byte_table): Use PREFIX_0F38F6.
300 (mod_table): Add rdseed instruction.
301 * i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
302 (cpu_flags): Likewise.
303 * i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
304 (i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
305 * i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
306 prefetchw.
307 * i386-tbl.h: Regenerate.
308 * i386-init.h: Likewise.
309
310 2012-07-05 Thomas Schwinge <thomas@codesourcery.com>
311
312 * mips-dis.c: Remove gratuitous newline.
313
314 2012-07-05 Sean Keys <skeys@ipdatasys.com>
315
316 * xgate-dis.c: Removed an IF statement that will
317 always be false due to overlapping operand masks.
318 * xgate-opc.c: Corrected 'com' opcode entry and
319 fixed spacing.
320
321 2012-07-02 Roland McGrath <mcgrathr@google.com>
322
323 * i386-opc.tbl: Add RepPrefixOk to nop.
324 * i386-tbl.h: Regenerate.
325
326 2012-06-28 Nick Clifton <nickc@redhat.com>
327
328 * po/vi.po: Updated Vietnamese translation.
329
330 2012-06-22 Roland McGrath <mcgrathr@google.com>
331
332 * i386-opc.tbl: Add RepPrefixOk to ret.
333 * i386-tbl.h: Regenerate.
334
335 * i386-opc.h (RepPrefixOk): New enum constant.
336 (i386_opcode_modifier): New bitfield 'repprefixok'.
337 * i386-gen.c (opcode_modifiers): Add RepPrefixOk.
338 * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
339 instructions that have IsString.
340 * i386-tbl.h: Regenerate.
341
342 2012-06-11 Andreas Schwab <schwab@linux-m68k.org>
343
344 * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
345 (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
346 (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
347 (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
348 (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
349 (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
350 (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
351 (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
352 (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
353
354 2012-05-19 Alan Modra <amodra@gmail.com>
355
356 * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
357 (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
358
359 2012-05-18 Alan Modra <amodra@gmail.com>
360
361 * ia64-opc.c: Remove #include "ansidecl.h".
362 * z8kgen.c: Include sysdep.h first.
363
364 * arc-dis.c: Include sysdep.h first, remove some redundant includes.
365 * bfin-dis.c: Likewise.
366 * i860-dis.c: Likewise.
367 * ia64-dis.c: Likewise.
368 * ia64-gen.c: Likewise.
369 * m68hc11-dis.c: Likewise.
370 * mmix-dis.c: Likewise.
371 * msp430-dis.c: Likewise.
372 * or32-dis.c: Likewise.
373 * rl78-dis.c: Likewise.
374 * rx-dis.c: Likewise.
375 * tic4x-dis.c: Likewise.
376 * tilegx-opc.c: Likewise.
377 * tilepro-opc.c: Likewise.
378 * rx-decode.c: Regenerate.
379
380 2012-05-17 James Lemke <jwlemke@codesourcery.com>
381
382 * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
383
384 2012-05-17 James Lemke <jwlemke@codesourcery.com>
385
386 * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
387
388 2012-05-17 Daniel Richard G. <skunk@iskunk.org>
389 Nick Clifton <nickc@redhat.com>
390
391 PR 14072
392 * configure.in: Add check that sysdep.h has been included before
393 any system header files.
394 * configure: Regenerate.
395 * config.in: Regenerate.
396 * sysdep.h: Generate an error if included before config.h.
397 * alpha-opc.c: Include sysdep.h before any other header file.
398 * alpha-dis.c: Likewise.
399 * avr-dis.c: Likewise.
400 * cgen-opc.c: Likewise.
401 * cr16-dis.c: Likewise.
402 * cris-dis.c: Likewise.
403 * crx-dis.c: Likewise.
404 * d10v-dis.c: Likewise.
405 * d10v-opc.c: Likewise.
406 * d30v-dis.c: Likewise.
407 * d30v-opc.c: Likewise.
408 * h8500-dis.c: Likewise.
409 * i370-dis.c: Likewise.
410 * i370-opc.c: Likewise.
411 * m10200-dis.c: Likewise.
412 * m10300-dis.c: Likewise.
413 * micromips-opc.c: Likewise.
414 * mips-opc.c: Likewise.
415 * mips61-opc.c: Likewise.
416 * moxie-dis.c: Likewise.
417 * or32-opc.c: Likewise.
418 * pj-dis.c: Likewise.
419 * ppc-dis.c: Likewise.
420 * ppc-opc.c: Likewise.
421 * s390-dis.c: Likewise.
422 * sh-dis.c: Likewise.
423 * sh64-dis.c: Likewise.
424 * sparc-dis.c: Likewise.
425 * sparc-opc.c: Likewise.
426 * spu-dis.c: Likewise.
427 * tic30-dis.c: Likewise.
428 * tic54x-dis.c: Likewise.
429 * tic80-dis.c: Likewise.
430 * tic80-opc.c: Likewise.
431 * tilegx-dis.c: Likewise.
432 * tilepro-dis.c: Likewise.
433 * v850-dis.c: Likewise.
434 * v850-opc.c: Likewise.
435 * vax-dis.c: Likewise.
436 * w65-dis.c: Likewise.
437 * xgate-dis.c: Likewise.
438 * xtensa-dis.c: Likewise.
439 * rl78-decode.opc: Likewise.
440 * rl78-decode.c: Regenerate.
441 * rx-decode.opc: Likewise.
442 * rx-decode.c: Regenerate.
443
444 2012-05-17 Alan Modra <amodra@gmail.com>
445
446 * ppc_dis.c: Don't include elf/ppc.h.
447
448 2012-05-16 Meador Inge <meadori@codesourcery.com>
449
450 * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
451 to PUSH/POP {reg}.
452
453 2012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
454 Stephane Carrez <stcarrez@nerim.fr>
455
456 * configure.in: Add S12X and XGATE co-processor support to m68hc11
457 target.
458 * disassemble.c: Likewise.
459 * configure: Regenerate.
460 * m68hc11-dis.c: Make objdump output more consistent, use hex
461 instead of decimal and use 0x prefix for hex.
462 * m68hc11-opc.c: Add S12X and XGATE opcodes.
463
464 2012-05-14 James Lemke <jwlemke@codesourcery.com>
465
466 * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
467 (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
468 (vle_opcd_indices): New array.
469 (lookup_vle): New function.
470 (disassemble_init_powerpc): Revise for second (VLE) opcode table.
471 (print_insn_powerpc): Likewise.
472 * ppc-opc.c: Likewise.
473
474 2012-05-14 Catherine Moore <clm@codesourcery.com>
475 Maciej W. Rozycki <macro@codesourcery.com>
476 Rhonda Wittels <rhonda@codesourcery.com>
477 Nathan Froyd <froydnj@codesourcery.com>
478
479 * ppc-opc.c (insert_arx, extract_arx): New functions.
480 (insert_ary, extract_ary): New functions.
481 (insert_li20, extract_li20): New functions.
482 (insert_rx, extract_rx): New functions.
483 (insert_ry, extract_ry): New functions.
484 (insert_sci8, extract_sci8): New functions.
485 (insert_sci8n, extract_sci8n): New functions.
486 (insert_sd4h, extract_sd4h): New functions.
487 (insert_sd4w, extract_sd4w): New functions.
488 (insert_vlesi, extract_vlesi): New functions.
489 (insert_vlensi, extract_vlensi): New functions.
490 (insert_vleui, extract_vleui): New functions.
491 (insert_vleil, extract_vleil): New functions.
492 (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
493 (BI16, BI32, BO32, B8): New.
494 (B15, B24, CRD32, CRS): New.
495 (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
496 (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
497 (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
498 (SH6_MASK): Use PPC_OPSHIFT_INV.
499 (SI8, UI5, OIMM5, UI7, BO16): New.
500 (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
501 (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
502 (ALLOW8_SPRG): New.
503 (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
504 (OPVUP, OPVUP_MASK OPVUP): New
505 (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
506 (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
507 (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
508 (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
509 (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
510 (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
511 (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
512 (SE_IM5, SE_IM5_MASK): New.
513 (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
514 (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
515 (BO32DNZ, BO32DZ): New.
516 (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
517 (PPCVLE): New.
518 (powerpc_opcodes): Add new VLE instructions. Update existing
519 instruction to include PPCVLE if supported.
520 * ppc-dis.c (ppc_opts): Add vle entry.
521 (get_powerpc_dialect): New function.
522 (powerpc_init_dialect): VLE support.
523 (print_insn_big_powerpc): Call get_powerpc_dialect.
524 (print_insn_little_powerpc): Likewise.
525 (operand_value_powerpc): Handle negative shift counts.
526 (print_insn_powerpc): Handle 2-byte instruction lengths.
527
528 2012-05-11 Daniel Richard G. <skunk@iskunk.org>
529
530 PR binutils/14028
531 * configure.in: Invoke ACX_HEADER_STRING.
532 * configure: Regenerate.
533 * config.in: Regenerate.
534 * sysdep.h: If STRINGS_WITH_STRING is defined then include both
535 string.h and strings.h.
536
537 2012-05-11 Nick Clifton <nickc@redhat.com>
538
539 PR binutils/14006
540 * arm-dis.c (print_insn): Fix detection of instruction mode in
541 files containing multiple executable sections.
542
543 2012-05-03 Sean Keys <skeys@ipdatasys.com>
544
545 * Makefile.in, configure: regenerate
546 * disassemble.c (disassembler): Recognize ARCH_XGATE.
547 * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
548 New functions.
549 * configure.in: Recognize xgate.
550 * xgate-dis.c, xgate-opc.c: New files for support of xgate
551 * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
552 and opcode generation for xgate.
553
554 2012-04-30 DJ Delorie <dj@redhat.com>
555
556 * rx-decode.opc (MOV): Do not sign-extend immediates which are
557 already the maximum bit size.
558 * rx-decode.c: Regenerate.
559
560 2012-04-27 David S. Miller <davem@davemloft.net>
561
562 * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
563 * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
564
565 * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
566 * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
567
568 * sparc-opc.c (CBCOND): New define.
569 (CBCOND_XCC): Likewise.
570 (cbcond): New helper macro.
571 (sparc_opcodes): Add compare-and-branch instructions.
572
573 * sparc-dis.c (print_insn_sparc): Handle ')'.
574 * sparc-opc.c (sparc_opcodes): Add crypto instructions.
575
576 * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
577 into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
578
579 2012-04-12 David S. Miller <davem@davemloft.net>
580
581 * sparc-dis.c (X_DISP10): Define.
582 (print_insn_sparc): Handle '='.
583
584 2012-04-01 Mike Frysinger <vapier@gentoo.org>
585
586 * bfin-dis.c (fmtconst): Replace decimal handling with a single
587 sprintf call and the '*' field width.
588
589 2012-03-23 Maxim Kuvyrkov <maxim@codesourcery.com>
590
591 * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
592
593 2012-03-16 Alan Modra <amodra@gmail.com>
594
595 * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
596 (powerpc_opcd_indices): Bump array size.
597 (disassemble_init_powerpc): Set powerpc_opcd_indices entries
598 corresponding to unused opcodes to following entry.
599 (lookup_powerpc): New function, extracted and optimised from..
600 (print_insn_powerpc): ..here.
601
602 2012-03-15 Alan Modra <amodra@gmail.com>
603 James Lemke <jwlemke@codesourcery.com>
604
605 * disassemble.c (disassemble_init_for_target): Handle ppc init.
606 * ppc-dis.c (private): New var.
607 (powerpc_init_dialect): Don't return calloc failure, instead use
608 private.
609 (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
610 (powerpc_opcd_indices): New array.
611 (disassemble_init_powerpc): New function.
612 (print_insn_big_powerpc): Don't init dialect here.
613 (print_insn_little_powerpc): Likewise.
614 (print_insn_powerpc): Start search using powerpc_opcd_indices.
615
616 2012-03-10 Edmar Wienskoski <edmar@freescale.com>
617
618 * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
619 * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
620 (PPCVEC2, PPCTMR, E6500): New short names.
621 (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
622 mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
623 lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
624 lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
625 lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
626 optional operands on sync instruction for E6500 target.
627
628 2012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
629
630 * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
631
632 2012-02-27 Alan Modra <amodra@gmail.com>
633
634 * mt-dis.c: Regenerate.
635
636 2012-02-27 Alan Modra <amodra@gmail.com>
637
638 * v850-opc.c (extract_v8): Rearrange to make it obvious this
639 is the inverse of corresponding insert function.
640 (extract_d22, extract_u9, extract_r4): Likewise.
641 (extract_d9): Correct sign extension.
642 (extract_d16_15): Don't assume "long" is 32 bits, and don't
643 rely on implementation defined behaviour for shift right of
644 signed types.
645 (extract_d16_16, extract_d17_16, extract_i9): Likewise.
646 (extract_d23): Likewise, and correct mask.
647
648 2012-02-27 Alan Modra <amodra@gmail.com>
649
650 * crx-dis.c (print_arg): Mask constant to 32 bits.
651 * crx-opc.c (cst4_map): Use int array.
652
653 2012-02-27 Alan Modra <amodra@gmail.com>
654
655 * arc-dis.c (BITS): Don't use shifts to mask off bits.
656 (FIELDD): Sign extend with xor,sub.
657
658 2012-02-25 Walter Lee <walt@tilera.com>
659
660 * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
661 * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
662 TILEPRO_OPC_LW_TLS_SN.
663
664 2012-02-21 H.J. Lu <hongjiu.lu@intel.com>
665
666 * i386-opc.h (HLEPrefixNone): New.
667 (HLEPrefixLock): Likewise.
668 (HLEPrefixAny): Likewise.
669 (HLEPrefixRelease): Likewise.
670
671 2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
672
673 * i386-dis.c (HLE_Fixup1): New.
674 (HLE_Fixup2): Likewise.
675 (HLE_Fixup3): Likewise.
676 (Ebh1): Likewise.
677 (Evh1): Likewise.
678 (Ebh2): Likewise.
679 (Evh2): Likewise.
680 (Ebh3): Likewise.
681 (Evh3): Likewise.
682 (MOD_C6_REG_7): Likewise.
683 (MOD_C7_REG_7): Likewise.
684 (RM_C6_REG_7): Likewise.
685 (RM_C7_REG_7): Likewise.
686 (XACQUIRE_PREFIX): Likewise.
687 (XRELEASE_PREFIX): Likewise.
688 (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
689 cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
690 Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
691 (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
692 not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
693 MOD_C6_REG_7 and MOD_C7_REG_7.
694 (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
695 (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
696 xtest.
697 (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
698 (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
699
700 * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
701 CPU_RTM_FLAGS.
702 (cpu_flags): Add CpuHLE and CpuRTM.
703 (opcode_modifiers): Add HLEPrefixOk.
704
705 * i386-opc.h (CpuHLE): New.
706 (CpuRTM): Likewise.
707 (HLEPrefixOk): Likewise.
708 (i386_cpu_flags): Add cpuhle and cpurtm.
709 (i386_opcode_modifier): Add hleprefixok.
710
711 * i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
712 add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
713 sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
714 operand. Add xacquire, xrelease, xabort, xbegin, xend and
715 xtest.
716 * i386-init.h: Regenerated.
717 * i386-tbl.h: Likewise.
718
719 2012-01-24 DJ Delorie <dj@redhat.com>
720
721 * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
722 * rl78-decode.c: Regenerate.
723
724 2012-01-17 James Murray <jsm@jsm-net.demon.co.uk>
725
726 PR binutils/10173
727 * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
728
729 2012-01-17 Andreas Schwab <schwab@linux-m68k.org>
730
731 * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
732 register and move them after pmove with PSR/PCSR register.
733
734 2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
735
736 * i386-dis.c (mod_table): Add vmfunc.
737
738 * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
739 (cpu_flags): CpuVMFUNC.
740
741 * i386-opc.h (CpuVMFUNC): New.
742 (i386_cpu_flags): Add cpuvmfunc.
743
744 * i386-opc.tbl: Add vmfunc.
745 * i386-init.h: Regenerated.
746 * i386-tbl.h: Likewise.
747
748 For older changes see ChangeLog-2011
749 \f
750 Local Variables:
751 mode: change-log
752 left-margin: 8
753 fill-column: 74
754 version-control: never
755 End:
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