opcodes/ChangeLog

   1 2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
   2
   3         * arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.
   4
   5 2016-04-15  H.J. Lu  <hongjiu.lu@intel.com>
   6
   7         * Makefile.in: Regenerated with automake 1.11.6.
   8         * aclocal.m4: Likewise.
   9
  10 2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>
  11
  12         * arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
  13         instructions.
  14         * arc-opc.c (insert_nps_cmem_uimm16): New function.
  15         (extract_nps_cmem_uimm16): New function.
  16         (arc_operands): Add NPS_XLDST_UIMM16 operand.
  17
  18 2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>
  19
  20         * arc-dis.c (arc_insn_length): New function.
  21         (print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
  22         (find_format): Change insnLen parameter to unsigned.
  23
  24 2016-04-13  Nick Clifton  <nickc@redhat.com>
  25
  26         PR target/19937
  27         * v850-opc.c (v850_opcodes): Correct masks for long versions of
  28         the LD.B and LD.BU instructions.
  29
  30 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
  31
  32         * arc-dis.c (find_format): Check for extension flags.
  33         (print_flags): New function.
  34         (print_insn_arc): Update for .extCondCode, .extCoreRegister and
  35         .extAuxRegister.
  36         * arc-ext.c (arcExtMap_coreRegName): Use
  37         LAST_EXTENSION_CORE_REGISTER.
  38         (arcExtMap_coreReadWrite): Likewise.
  39         (dump_ARC_extmap): Update printing.
  40         * arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
  41         (arc_aux_regs): Add cpu field.
  42         * arc-regs.h: Add cpu field, lower case name aux registers.
  43
  44 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
  45
  46         * arc-tbl.h: Add rtsc, sleep with no arguments.
  47
  48 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
  49
  50         * arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
  51         Initialize.
  52         (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
  53         (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
  54         (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
  55         (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
  56         (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
  57         (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
  58         (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
  59         (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
  60         (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
  61         (arc_opcode arc_opcodes): Null terminate the array.
  62         (arc_num_opcodes): Remove.
  63         * arc-ext.h (INSERT_XOP): Define.
  64         (extInstruction_t): Likewise.
  65         (arcExtMap_instName): Delete.
  66         (arcExtMap_insn): New function.
  67         (arcExtMap_genOpcode): Likewise.
  68         * arc-ext.c (ExtInstruction): Remove.
  69         (create_map): Zero initialize instruction fields.
  70         (arcExtMap_instName): Remove.
  71         (arcExtMap_insn): New function.
  72         (dump_ARC_extmap): More info while debuging.
  73         (arcExtMap_genOpcode): New function.
  74         * arc-dis.c (find_format): New function.
  75         (print_insn_arc): Use find_format.
  76         (arc_get_disassembler): Enable dump_ARC_extmap only when
  77         debugging.
  78
  79 2016-04-11  Maciej W. Rozycki  <macro@imgtec.com>
  80
  81         * mips-dis.c (print_mips16_insn_arg): Mask unused extended
  82         instruction bits out.
  83
  84 2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>
  85
  86         * arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
  87         * arc-opc.c (arc_flag_operands): Add new flags.
  88         (arc_flag_classes): Add new classes.
  89
  90 2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>
  91
  92         * arc-opc.c (arc_opcodes): Extend comment to discus table layout.
  93
  94 2016-04-05  Andrew Burgess  <andrew.burgess@embecosm.com>
  95
  96         * arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
  97         encode1, rflt, crc16, and crc32 instructions.
  98         * arc-opc.c (arc_flag_operands): Add F_NPS_R.
  99         (arc_flag_classes): Add C_NPS_R.
 100         (insert_nps_bitop_size_2b): New function.
 101         (extract_nps_bitop_size_2b): Likewise.
 102         (insert_nps_bitop_uimm8): Likewise.
 103         (extract_nps_bitop_uimm8): Likewise.
 104         (arc_operands): Add new operand entries.
 105
 106 2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>
 107
 108         * arc-regs.h: Add a new subclass field.  Add double assist
 109         accumulator register values.
 110         * arc-tbl.h: Use DPA subclass to mark the double assist
 111         instructions.  Use DPX/SPX subclas to mark the FPX instructions.
 112         * arc-opc.c (RSP): Define instead of SP.
 113         (arc_aux_regs): Add the subclass field.
 114
 115 2016-04-05  Jiong Wang  <jiong.wang@arm.com>
 116
 117         * arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
 118
 119 2016-03-31  Andrew Burgess  <andrew.burgess@embecosm.com>
 120
 121         * arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
 122         NPS_R_SRC1.
 123
 124 2016-03-30  Andrew Burgess  <andrew.burgess@embecosm.com>
 125
 126         * arc-nps400-tbl.h: Add a header comment, and fix some whitespace
 127         issues.  No functional changes.
 128
 129 2016-03-30  Claudiu Zissulescu  <claziss@synopsys.com>
 130
 131         * arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
 132         (AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
 133         (RTT): Remove duplicate.
 134         (LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
 135         (PCT_CONFIG*): Remove.
 136         (D1L, D1H, D2H, D2L): Define.
 137
 138 2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>
 139
 140         * arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
 141
 142 2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>
 143
 144         * arc-tbl.h (invld07): Remove.
 145         * arc-ext-tbl.h: New file.
 146         * arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
 147         * arc-opc.c (arc_opcodes): Add ext-tbl include.
 148
 149 2016-03-24  Jan Kratochvil  <jan.kratochvil@redhat.com>
 150
 151         Fix -Wstack-usage warnings.
 152         * aarch64-dis.c (print_operands): Substitute size.
 153         * aarch64-opc.c (print_register_offset_address): Substitute tblen.
 154
 155 2016-03-22  Jose E. Marchesi  <jose.marchesi@oracle.com>
 156
 157         * sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
 158         to get a proper diagnostic when an invalid ASR register is used.
 159
 160 2016-03-22  Nick Clifton  <nickc@redhat.com>
 161
 162         * configure: Regenerate.
 163
 164 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 165
 166         * arc-nps400-tbl.h: New file.
 167         * arc-opc.c: Add top level comment.
 168         (insert_nps_3bit_dst): New function.
 169         (extract_nps_3bit_dst): New function.
 170         (insert_nps_3bit_src2): New function.
 171         (extract_nps_3bit_src2): New function.
 172         (insert_nps_bitop_size): New function.
 173         (extract_nps_bitop_size): New function.
 174         (arc_flag_operands): Add nps400 entries.
 175         (arc_flag_classes): Add nps400 entries.
 176         (arc_operands): Add nps400 entries.
 177         (arc_opcodes): Add nps400 include.
 178
 179 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 180
 181         * arc-opc.c (arc_flag_classes): Convert all flag classes to use
 182         the new class enum values.
 183
 184 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 185
 186         * arc-dis.c (print_insn_arc): Handle nps400.
 187
 188 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 189
 190         * arc-opc.c (BASE): Delete.
 191
 192 2016-03-18  Nick Clifton  <nickc@redhat.com>
 193
 194         PR target/19721
 195         * aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
 196         of MOV insn that aliases an ORR insn.
 197
 198 2016-03-16  Jiong Wang  <jiong.wang@arm.com>
 199
 200         * arm-dis.c (neon_opcodes): Support new FP16 instructions.
 201
 202 2016-03-07  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 203
 204         * mcore-opc.h: Add const qualifiers.
 205         * microblaze-opc.h (struct op_code_struct): Likewise.
 206         * sh-opc.h: Likewise.
 207         * tic4x-dis.c (tic4x_print_indirect): Likewise.
 208         (tic4x_print_op): Likewise.
 209
 210 2016-03-02  Alan Modra  <amodra@gmail.com>
 211
 212         * or1k-desc.h: Regenerate.
 213         * fr30-ibld.c: Regenerate.
 214         * rl78-decode.c: Regenerate.
 215
 216 2016-03-01  Nick Clifton  <nickc@redhat.com>
 217
 218         PR target/19747
 219         * rl78-dis.c (print_insn_rl78_common): Fix typo.
 220
 221 2016-02-24  Renlin Li  <renlin.li@arm.com>
 222
 223         * arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
 224         (print_insn_coprocessor): Support fp16 instructions.
 225
 226 2016-02-24  Renlin Li  <renlin.li@arm.com>
 227
 228         * arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
 229         vminnm, vrint(mpna).
 230
 231 2016-02-24  Renlin Li  <renlin.li@arm.com>
 232
 233         * arm-dis.c (print_insn_coprocessor): Check co-processor number for
 234         cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
 235
 236 2016-02-15  H.J. Lu  <hongjiu.lu@intel.com>
 237
 238         * i386-dis.c (print_insn): Parenthesize expression to prevent
 239         truncated addresses.
 240         (OP_J): Likewise.
 241
 242 2016-02-10  Claudiu Zissulescu  <claziss@synopsys.com>
 243             Janek van Oirschot  <jvanoirs@synopsys.com>
 244
 245         * arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
 246         variable.
 247
 248 2016-02-04  Nick Clifton  <nickc@redhat.com>
 249
 250         PR target/19561
 251         * msp430-dis.c (print_insn_msp430): Add a special case for
 252         decoding an RRC instruction with the ZC bit set in the extension
 253         word.
 254
 255 2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 256
 257         * cgen-ibld.in (insert_normal): Rework calculation of shift.
 258         * epiphany-ibld.c: Regenerate.
 259         * fr30-ibld.c: Regenerate.
 260         * frv-ibld.c: Regenerate.
 261         * ip2k-ibld.c: Regenerate.
 262         * iq2000-ibld.c: Regenerate.
 263         * lm32-ibld.c: Regenerate.
 264         * m32c-ibld.c: Regenerate.
 265         * m32r-ibld.c: Regenerate.
 266         * mep-ibld.c: Regenerate.
 267         * mt-ibld.c: Regenerate.
 268         * or1k-ibld.c: Regenerate.
 269         * xc16x-ibld.c: Regenerate.
 270         * xstormy16-ibld.c: Regenerate.
 271
 272 2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 273
 274         * epiphany-dis.c: Regenerated from latest cpu files.
 275
 276 2016-02-01  Michael McConville  <mmcco@mykolab.com>
 277
 278         * cgen-dis.c (count_decodable_bits): Use unsigned value for mask
 279         test bit.
 280
 281 2016-01-25  Renlin Li  <renlin.li@arm.com>
 282
 283         * arm-dis.c (mapping_symbol_for_insn): New function.
 284         (find_ifthen_state): Call mapping_symbol_for_insn().
 285
 286 2016-01-20  Matthew Wahab  <matthew.wahab@arm.com>
 287
 288         * aarch64-opc.c (operand_general_constraint_met_p): Check validity
 289         of MSR UAO immediate operand.
 290
 291 2016-01-18  Maciej W. Rozycki  <macro@imgtec.com>
 292
 293         * mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
 294         instruction support.
 295
 296 2016-01-17  Alan Modra  <amodra@gmail.com>
 297
 298         * configure: Regenerate.
 299
 300 2016-01-14  Nick Clifton  <nickc@redhat.com>
 301
 302         * rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
 303         instructions that can support stack pointer operations.
 304         * rl78-decode.c: Regenerate.
 305         * rl78-dis.c: Fix display of stack pointer in MOVW based
 306         instructions.
 307
 308 2016-01-14  Matthew Wahab  <matthew.wahab@arm.com>
 309
 310         * aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
 311         testing for RAS support.  Add checks for erxfr_el1, erxctlr_el1,
 312         erxtatus_el1 and erxaddr_el1.
 313
 314 2016-01-12  Matthew Wahab  <matthew.wahab@arm.com>
 315
 316         * arm-dis.c (arm_opcodes): Add "esb".
 317         (thumb_opcodes): Likewise.
 318
 319 2016-01-11  Peter Bergner <bergner@vnet.ibm.com>
 320
 321         * ppc-opc.c <xscmpnedp>: Delete.
 322         <xvcmpnedp>: Likewise.
 323         <xvcmpnedp.>: Likewise.
 324         <xvcmpnesp>: Likewise.
 325         <xvcmpnesp.>: Likewise.
 326
 327 2016-01-08  Andreas Schwab  <schwab@linux-m68k.org>
 328
 329         PR gas/13050
 330         * m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
 331         addition to ISA_A.
 332
 333 2016-01-01  Alan Modra  <amodra@gmail.com>
 334
 335         Update year range in copyright notice of all files.
 336
 337 For older changes see ChangeLog-2015
 338 \f
 339 Copyright (C) 2016 Free Software Foundation, Inc.
 340
 341 Copying and distribution of this file, with or without modification,
 342 are permitted in any medium without royalty provided the copyright
 343 notice and this notice are preserved.
 344
 345 Local Variables:
 346 mode: change-log
 347 left-margin: 8
 348 fill-column: 74
 349 version-control: never
 350 End: