2007-06-26 Paul Brook <paul@codesourcery.com>
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2007-06-26 Paul Brook <paul@codesourcery.com>
2
3 * arm-dis.c (coprocessor_opcodes): Add fmxr/fmrx mvfr0/mvfr1.
4
5 2007-06-25 H.J. Lu <hongjiu.lu@intel.com>
6
7 * i386-opc.h (regKludge): Renamed to ...
8 (RegKludge): This.
9
10 * i386-opc.c (i386_optab): Replace regKludge with RegKludge.
11
12 2007-06-23 H.J. Lu <hongjiu.lu@intel.com>
13
14 PR binutils/4667
15 * i386-dis.c (EX): Removed.
16 (EMd): New.
17 (EMq): Likewise.
18 (EXd): Likewise.
19 (EXq): Likewise.
20 (EXx): Likewise.
21 (PREGRP93...PREGRP97): Likewise.
22 (dis386_twobyte): Updated.
23 (prefix_user_table): Updated. Add PREGRP93...PREGRP97.
24 (OP_EX): Remove Intel syntax handling.
25
26 2007-06-18 Nathan Sidwell <nathan@codesourcery.com>
27
28 * m68k-opc.c (m68k_opcodes): Add wdebugl variants.
29
30 2007-06-14 H.J. Lu <hongjiu.lu@intel.com>
31
32 * Makefile.am (ACLOCAL_AMFLAGS): Add -I ../config -I ../bfd.
33
34 * acinclude.m4: Removed.
35
36 * Makefile.in: Regenerated.
37 * doc/Makefile.in: Likewise.
38 * aclocal.m4: Likewise.
39 * configure: Likewise.
40
41 2007-06-05 Paul Brook <paul@codesourcery.com>
42
43 * arm-dis.c (thumb32_opcodes): Display writeback ldrd/strd addresses.
44
45 2007-05-24 Steve Ellcey <sje@cup.hp.com>
46
47 * Makefile.in: Regnerate.
48 * configure: Regenerate.
49 * aclocal.m4: Regenerate.
50
51 2007-05-18 Alan Modra <amodra@bigpond.net.au>
52
53 * ppc-dis.c (print_insn_powerpc): Don't skip all operands
54 after setting skip_optional.
55
56 2007-05-16 Peter Bergner <bergner@vnet.ibm.com>
57
58 * ppc-dis.c (operand_value_powerpc, skip_optional_operands): New.
59 (print_insn_powerpc): Use the new operand_value_powerpc and
60 skip_optional_operands functions to omit or print all optional
61 operands as a group.
62 * ppc-opc.c (BFF, W, XFL_L, XWRA_MASK): New.
63 (XFL_MASK): Delete L and W bits from the mask.
64 (mtfsfi, mtfsfi.): Replace use of BF with BFF. Relpace use of XRA_MASK
65 with XWRA_MASK. Use W.
66 (mtfsf, mtfsf.): Use XFL_L and W.
67
68 2007-05-14 H.J. Lu <hongjiu.lu@intel.com>
69
70 PR binutils/4502
71 * i386-dis.c (Suffix3DNow): Replace "pfmulhrw" with "pmulhrw".
72
73 2007-05-10 H.J. Lu <hongjiu.lu@intel.com>
74
75 * i386-opc.h (ShortForm): Redefined.
76 (Jump): Likewise.
77 (JumpDword): Likewise.
78 (JumpByte): Likewise.
79 (JumpInterSegment): Likewise.
80 (FloatMF): Likewise.
81 (FloatR): Likewise.
82 (FloatD): Likewise.
83 (Size16): Likewise.
84 (Size32): Likewise.
85 (Size64): Likewise.
86 (IgnoreSize): Likewise.
87 (DefaultSize): Likewise.
88 (No_bSuf): Likewise.
89 (No_wSuf): Likewise.
90 (No_lSuf): Likewise.
91 (No_sSuf): Likewise.
92 (No_qSuf): Likewise.
93 (No_xSuf): Likewise.
94 (FWait): Likewise.
95 (IsString): Likewise.
96 (regKludge): Likewise.
97 (IsPrefix): Likewise.
98 (ImmExt): Likewise.
99 (NoRex64): Likewise.
100 (Rex64): Likewise.
101 (Ugh): Likewise.
102
103 2007-05-07 H.J. Lu <hongjiu.lu@intel.com>
104
105 * i386-dis.c (threebyte_0x38_uses_DATA_prefix): Correct entries
106 for some SSE4 instructions.
107 (threebyte_0x3a_uses_DATA_prefix): Likewise.
108
109 2007-05-03 H.J. Lu <hongjiu.lu@intel.com>
110
111 * i386-dis.c (CRC32_Fixup): Don't print suffix in Intel mode.
112
113 * i386-opc.c (i386_optab): Remove IgnoreSize and correct operand
114 type for crc32.
115
116 2007-05-01 H.J. Lu <hongjiu.lu@intel.com>
117
118 * i386-dis.c (CRC32_Fixup): Properly handle Intel mode and
119 check data size prefix in 16bit mode.
120
121 * i386-opc.c (i386_optab): Default crc32 to non-8bit and
122 support Intel mode.
123
124 2007-04-30 Mark Salter <msalter@redhat.com>
125
126 * frv-desc.c: Regenerate.
127 * frv-desc.h: Regenerate.
128
129 2007-04-30 Alan Modra <amodra@bigpond.net.au>
130
131 PR 4436
132 * ppc-opc.c (powerpc_operands): Correct bitm for second entry of MBE.
133
134 2007-04-27 H.J. Lu <hongjiu.lu@intel.com>
135
136 * i386-dis.c (modrm): Put reg before rm.
137
138 2007-04-26 H.J. Lu <hongjiu.lu@intel.com>
139
140 PR binutils/4430
141 * i386-dis.c (print_displacement): New.
142 (OP_E): Call print_displacement instead of print_operand_value
143 to output displacement when either base or index exist. Print
144 the explicit zero displacement in 16bit mode.
145
146 2007-04-26 H.J. Lu <hongjiu.lu@intel.com>
147
148 PR binutils/4429
149 * i386-dis.c (print_insn): Also swap the order of op_riprel
150 when swapping op_index. Break when the RIP relative address
151 is printed.
152 (OP_E): Properly handle RIP relative addressing and print the
153 explicit zero displacement for Intel mode.
154
155 2007-04-27 Alan Modra <amodra@bigpond.net.au>
156
157 * Makefile.am: Run "make dep-am".
158 * Makefile.in: Regenerate.
159 * ns32k-dis.c: Include sysdep.h first.
160
161 2007-04-24 Andreas Krebbel <krebbel1@de.ibm.com>
162
163 * opcodes/s390-opc.c (MASK_SSF_RRDRD): Fourth nybble belongs to the
164 opcode.
165 * opcodes/s390-opc.txt (pfpo, ectg, csst): Add new z9-ec instructions.
166
167 2007-04-24 Nick Clifton <nickc@redhat.com>
168
169 * arm-dis.c (print_insn): Initialise type.
170
171 2007-04-24 Alan Modra <amodra@bigpond.net.au>
172
173 * cgen-types.h: Include bfd_stdint.h, not stdint.h.
174 * Makefile.am: Run "make dep-am".
175 * Makefile.in: Regenerate.
176
177 2007-04-23 Nathan Sidwell <nathan@codesourcery.com>
178
179 * m68k-opc.c: Mark mcfisa_c instructions.
180
181 2007-04-21 Richard Earnshaw <rearnsha@arm.com>
182
183 * arm-dis.c (arm_opcodes): Disassemble to unified syntax.
184 (thumb_opcodes): Add missing white space in adr.
185 (arm_decode_shift): New parameter, print_shift. Only decode the
186 shift parameter if set. Adjust callers.
187 (print_insn_arm): Support for operand type q with no shift decode.
188
189 2007-04-21 Alan Modra <amodra@bigpond.net.au>
190
191 * i386-opc.c (i386_float_regtab, i386_float_regtab_size): Delete.
192 Move contents to..
193 (i386_regtab): ..here.
194 * i386-opc.h (i386_float_regtab, i386_float_regtab_size): Delete.
195
196 * ppc-opc.c (powerpc_operands): Delete duplicate entries.
197 (BA_MASK, FXM_MASK, STRM_MASK, VA_MASK, VB_MASK, VC_MASK): Delete.
198 (VD_MASK, WS_MASK, MTMSRD_L, XRT_L): Delete.
199 (powerpc_opcodes): Replace uses of MTMSRD_L and XRT_L.
200
201 2007-04-20 Nathan Sidwell <nathan@codesourcery.com>
202
203 * m68k-dis.c (print_insn_arg): Show c04 as rambar0 and c05 as
204 rambar1.
205
206 2007-04-20 Alan Modra <amodra@bigpond.net.au>
207
208 * ppc-dis.c (print_insn_powerpc): Adjust for struct powerpc_operand
209 change.
210 * ppc-opc.c (powerpc_operands): Replace bit count with bit mask
211 in all entries. Add PPC_OPERAND_SIGNED to DE entry. Remove
212 references to following deleted functions.
213 (insert_bd, extract_bd, insert_dq, extract_dq): Delete.
214 (insert_ds, extract_ds, insert_de, extract_de): Delete.
215 (insert_des, extract_des, insert_li, extract_li): Delete.
216 (insert_nb, insert_rsq, insert_rtq, insert_ev2, extract_ev2): Delete.
217 (insert_ev4, extract_ev4, insert_ev8, extract_ev8): Delete.
218 (num_powerpc_operands): New constant.
219 (XSPRG_MASK): Remove entire SPRG field.
220 (powerpc_opcodes <bcctre, bcctrel>): Use XLBB_MASK not XLYBB_MASK.
221
222 2007-04-20 Alan Modra <amodra@bigpond.net.au>
223
224 * ppc-opc.c (DCM, DGM, TE, RMC, R, SP, S): Correct shift.
225 (Z2_MASK): Define.
226 (powerpc_opcodes): Use Z2_MASK in all insns taking RMC operand.
227
228 2007-04-20 Richard Earnshaw <rearnsha@arm.com>
229
230 * arm-dis.c (print_insn): Only look for a mapping symbol in the section
231 being disassembled.
232
233 2007-04-19 Alan Modra <amodra@bigpond.net.au>
234
235 * Makefile.am: Run "make dep-am".
236 * Makefile.in: Regenerate.
237 * po/POTFILES.in: Regenerate.
238
239 2007-04-19 Alan Modra <amodra@bigpond.net.au>
240
241 * ppc-opc.c (powerpc_opcodes): Add cctpl, cctpm, cctph, db8cyc,
242 db10cyc, db12cyc, db16cyc.
243
244 2007-04-19 Nathan Froyd <froydnj@codesourcery.com>
245
246 * ppc-opc.c (powerpc_opcodes): Recognize three-operand tlbsxe.
247
248 2007-04-18 H.J. Lu <hongjiu.lu@intel.com>
249
250 * i386-dis.c (CRC32_Fixup): New.
251 (PREGRP85, PREGRP86, PREGRP87, PREGRP88, PREGRP89, PREGRP90,
252 PREGRP91): New.
253 (threebyte_0x38_uses_DATA_prefix): Updated for SSE4.2.
254 (threebyte_0x3a_uses_DATA_prefix): Likewise.
255 (prefix_user_table): Add PREGRP85, PREGRP86, PREGRP87,
256 PREGRP88, PREGRP89, PREGRP90 and PREGRP91.
257 (three_byte_table): Likewise.
258
259 * i386-opc.c (i386_optab): Add SSE4.2 opcodes.
260
261 * i386-opc.h (CpuSSE4_2): New.
262 (CpuSSE4): Likewise.
263 (CpuUnknownFlags): Add CpuSSE4_2.
264
265 2007-04-18 H.J. Lu <hongjiu.lu@intel.com>
266
267 * i386-dis.c (XMM_Fixup): New.
268 (Edqb): New.
269 (Edqd): New.
270 (XMM0): New.
271 (dqb_mode): New.
272 (dqd_mode): New.
273 (PREGRP39 ... PREGRP85): New.
274 (threebyte_0x38_uses_DATA_prefix): Updated for SSE4.
275 (threebyte_0x3a_uses_DATA_prefix): Likewise.
276 (prefix_user_table): Add PREGRP39 ... PREGRP85.
277 (three_byte_table): Likewise.
278 (putop): Handle 'K'.
279 (intel_operand_size): Handle dqb_mode, dqd_mode):
280 (OP_E): Likewise.
281 (OP_G): Likewise.
282
283 * i386-opc.c (i386_optab): Add SSE4.1 opcodes.
284
285 * i386-opc.h (CpuSSE4_1): New.
286 (CpuUnknownFlags): Add CpuSSE4_1.
287 (regKludge): Update comment.
288
289 2007-04-18 Matthias Klose <doko@ubuntu.com>
290
291 * Makefile.am (libopcodes_la_LDFLAGS): Use bfd soversion.
292 * Makefile.in: Regenerate.
293
294 2007-04-14 Steve Ellcey <sje@cup.hp.com>
295
296 * Makefile.am: Add ACLOCAL_AMFLAGS.
297 * Makefile.in: Regenerate.
298
299 2007-04-13 H.J. Lu <hongjiu.lu@intel.com>
300
301 * i386-dis.c: Remove trailing white spaces.
302 * i386-opc.c: Likewise.
303 * i386-opc.h: Likewise.
304
305 2007-04-11 H.J. Lu <hongjiu.lu@intel.com>
306
307 PR binutils/4333
308 * i386-dis.c (GRP1a): New.
309 (GRP1b ... GRPPADLCK2): Update index.
310 (dis386): Use GRP1a for entry 0x8f.
311 (mod, rm, reg): Removed. Replaced by ...
312 (modrm): This.
313 (grps): Add GRP1a.
314
315 2007-04-09 Kazu Hirata <kazu@codesourcery.com>
316
317 * m68k-dis.c (print_insn_m68k): Restore info->fprintf_func and
318 info->print_address_func if longjmp is called.
319
320 2007-03-29 DJ Delorie <dj@redhat.com>
321
322 * m32c-desc.c: Regenerate.
323 * m32c-dis.c: Regenerate.
324 * m32c-opc.c: Regenerate.
325
326 2007-03-28 H.J. Lu <hongjiu.lu@intel.com>
327
328 * i386-opc.c (i386_optab): Change InvMem to RegMem for mov and
329 movq. Remove InvMem from sldt, smsw and str.
330
331 * i386-opc.h (InvMem): Renamed to ...
332 (RegMem): Update comments.
333 (AnyMem): Remove InvMem.
334
335 2007-03-27 Paul Brook <paul@codesourcery.com>
336
337 * arm-dis.c (thumb_opcodes): Add entry for undefined insns (0xbe??).
338
339 2007-03-24 Paul Brook <paul@codesourcery.com>
340
341 * arm-dis.c (coprocessor_opcodes): Remove superfluous 0x.
342 (print_insn_coprocessor): Handle %<bitfield>x.
343
344 2007-03-24 Paul Brook <paul@codesourcery.com>
345 Mark Shinwell <shinwell@codesourcery.com>
346
347 * arm-dis.c (arm_opcodes): Print SRS base register.
348
349 2007-03-23 H.J. Lu <hongjiu.lu@intel.com>
350
351 * i386-dis.c (prefix_name): Replace rex64XYZ with rex.WRXB.
352
353 * i386-opc.c (i386_optab): Add rex.wrxb.
354
355 2007-03-21 H.J. Lu <hongjiu.lu@intel.com>
356
357 * i386-dis.c (REX_MODE64): Remove definition.
358 (REX_EXTX): Likewise.
359 (REX_EXTY): Likewise.
360 (REX_EXTZ): Likewise.
361 (USED_REX): Use REX_OPCODE instead of 0x40.
362 Replace REX_MODE64, REX_EXTX, REX_EXTY and REX_EXTZ with REX_W,
363 REX_R, REX_X and REX_B respectively.
364
365 2007-03-21 H.J. Lu <hongjiu.lu@intel.com>
366
367 PR binutils/4218
368 * i386-dis.c (PREGRP38): New.
369 (dis386): Use PREGRP38 for 0x90.
370 (prefix_user_table): Add PREGRP38.
371 (print_insn): Set uses_REPZ_prefix to 1 for pause.
372 (NOP_Fixup1): Properly handle REX bits.
373 (NOP_Fixup2): Likewise.
374
375 * i386-opc.c (i386_optab): Allow %eax with xchg in 64bit.
376 Allow register with nop.
377
378 2007-03-20 DJ Delorie <dj@redhat.com>
379
380 * m32c-asm.c: Regenerate.
381 * m32c-desc.c: Regenerate.
382 * m32c-desc.h: Regenerate.
383 * m32c-dis.h: Regenerate.
384 * m32c-ibld.c: Regenerate.
385 * m32c-opc.c: Regenerate.
386 * m32c-opc.h: Regenerate.
387
388 2007-03-15 H.J. Lu <hongjiu.lu@intel.com>
389
390 * i386-opc.c: Include "libiberty.h".
391 (i386_regtab): Remove the last entry.
392 (i386_regtab_size): New.
393 (i386_float_regtab_size): Likewise.
394
395 * i386-opc.h (i386_regtab_size): New.
396 (i386_float_regtab_size): Likewise.
397
398 2007-03-15 H.J. Lu <hongjiu.lu@intel.com>
399
400 * Makefile.am (CFILES): Add i386-opc.c.
401 (ALL_MACHINES): Add i386-opc.lo.
402 Run "make dep-am".
403 * Makefile.in: Regenerated.
404
405 * configure.in: Add i386-opc.lo for bfd_i386_arch.
406 * configure: Regenerated.
407
408 * i386-dis.c: Include "opcode/i386.h".
409 (MAXLEN): Renamed to MAX_MNEM_SIZE. Remove definition.
410 (FWAIT_OPCODE): Remove definition.
411 (UNIXWARE_COMPAT): Renamed to SYSV386_COMPAT. Remove definition.
412 (MAX_OPERANDS): Remove definition.
413
414 * i386-opc.c: New file.
415 * i386-opc.h: Likewise.
416
417 2007-03-15 H.J. Lu <hongjiu.lu@intel.com>
418
419 * Makefile.in: Regenerated.
420
421 2007-03-09 H.J. Lu <hongjiu.lu@intel.com>
422
423 * i386-dis.c (OP_Rd): Renamed to ...
424 (OP_R): This.
425 (Rd): Updated.
426 (Rm): Likewise.
427
428 2007-03-08 Alan Modra <amodra@bigpond.net.au>
429
430 * fr30-asm.c: Regenerate.
431 * frv-asm.c: Regenerate.
432 * ip2k-asm.c: Regenerate.
433 * iq2000-asm.c: Regenerate.
434 * m32c-asm.c: Regenerate.
435 * m32r-asm.c: Regenerate.
436 * m32r-dis.c: Regenerate.
437 * mt-asm.c: Regenerate.
438 * mt-ibld.c: Regenerate.
439 * mt-opc.c: Regenerate.
440 * openrisc-asm.c: Regenerate.
441 * xc16x-asm.c: Regenerate.
442 * xstormy16-asm.c: Regenerate.
443
444 * Makefile.am: Run "make dep-am".
445 * Makefile.in: Regenerate.
446 * po/POTFILES.in: Regenerate.
447
448 2007-03-06 Andreas Krebbel <krebbel1@de.ibm.com>
449
450 * opcodes/s390-opc.c (INSTR_RRE_FR, INSTR_RRF_F0FF2, INSTR_RRF_F0FR,
451 INSTR_RRF_UUFF, INSTR_RRF_0UFF, INSTR_RRF_FFFU, INSTR_RRR_F0FF): New
452 instruction formats added.
453 (MASK_RRE_FR, MASK_RRF_F0FF2, MASK_RRF_F0FR, MASK_RRF_UUFF,
454 MASK_RRF_0UFF, MASK_RRF_FFFU, MASK_RRR_F0FF): New instruction format
455 masks added.
456 * opcodes/s390-opc.txt (lpdfr - tgxt): Decimal floating point
457 instructions added.
458 * opcodes/s390-mkopc.c (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added.
459 (main): z9-ec cpu type option added.
460 * include/opcode/s390.h (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added.
461
462 2007-02-22 DJ Delorie <dj@redhat.com>
463
464 * s390-opc.c (INSTR_SS_L2RDRD): New.
465 (MASK_SS_L2RDRD): New.
466 * s390-opc.txt (pka): Use it.
467
468 2007-02-20 Thiemo Seufer <ths@mips.com>
469 Chao-Ying Fu <fu@mips.com>
470
471 * mips-dis.c (mips_arch_choices): Add DSP R2 support.
472 (print_insn_args): Add support for balign instruction.
473 * mips-opc.c (D33): New shortcut for DSP R2 instructions.
474 (mips_builtin_opcodes): Add DSP R2 instructions.
475
476 2007-02-19 Andreas Krebbel <krebbel1@de.ibm.com>
477
478 * s390-opc.c (INSTR_RRF_U0FR, MASK_RRF_U0FR): Removed.
479 (INSTR_RRF_U0RF, MASK_RRF_U0RF): Added.
480 * s390-opc.txt (cfxbr, cfdbr, cfebr, cgebr, cgdbr, cgxbr, cger, cgdr,
481 cgxr, cfxr, cfdr, cfer): Instruction type set to INSTR_RRF_U0RF.
482
483 2007-02-19 Andreas Krebbel <krebbel1@de.ibm.com>
484
485 * s390-opc.txt ("efpc", "sfpc"): Set to RRE_RR_OPT instruction type.
486 * s390-opc.c (s390_operands): Add RO_28 as optional gpr.
487 (INSTR_RRE_RR_OPT, MASK_RRE_RR_OPT): New instruction type for efpc
488 and sfpc.
489
490 2007-02-16 Nick Clifton <nickc@redhat.com>
491
492 PR binutils/4045
493 * avr-dis.c (comment_start): New variable, contains the prefix to
494 use when printing addresses in comments.
495 (print_insn_avr): Set comment_start to an empty space if there is
496 no symbol table available as the generic address printing code
497 will prefix the numeric value of the address with 0x.
498
499 2007-02-13 H.J. Lu <hongjiu.lu@intel.com>
500
501 * i386-dis.c: Updated to use an array of MAX_OPERANDS operands
502 in struct dis386.
503
504 2007-02-05 Dave Brolley <brolley@redhat.com>
505 Richard Sandiford <rsandifo@redhat.com>
506 DJ Delorie <dj@redhat.com>
507 Graydon Hoare <graydon@redhat.com>
508 Frank Ch. Eigler <fche@redhat.com>
509 Ben Elliston <bje@redhat.com>
510
511 * Makefile.am (HFILES): Add mep-desc.h mep-opc.h.
512 (CFILES): Add mep-*.c
513 (ALL_MACHINES): Add mep-*.lo.
514 (CLEANFILES): Add stamp-mep.
515 (CGEN_CPUS): Add mep.
516 (MEP_DEPS): New variable.
517 (mep-*): New targets.
518 * configure.in: Handle bfd_mep_arch.
519 * disassemble.c (ARCH_mep): New macro.
520 (disassembler): Handle bfd_arch_mep.
521 (disassemble_init_for_target): Likewise.
522 * mep-*: New files for Toshiba Media Processor (MeP).
523 * Makefile.in: Regenerated.
524 * configure: Regenerated.
525
526 2007-02-05 H.J. Lu <hongjiu.lu@intel.com>
527
528 * i386-dis.c (OP_J): Undo the last change. Properly handle 64K
529 wrap around within the same segment in 16bit mode.
530
531 2007-02-02 H.J. Lu <hongjiu.lu@intel.com>
532
533 * i386-dis.c (OP_J): Mask to 16bit only if there is a data16
534 prefix.
535
536 2007-02-02 H.J. Lu <hongjiu.lu@intel.com>
537
538 * avr-dis.c (avr_operand): Correct PR number in comment.
539
540 2007-02-02 H.J. Lu <hongjiu.lu@intel.com>
541
542 * disassemble.c (disassembler_usage): Call
543 print_i386_disassembler_options for i386 disassembler.
544
545 * i386-dis.c (print_i386_disassembler_options): New.
546 (print_insn): Support the new addr64 option.
547
548 2007-02-02 Hiroki Kaminaga <kaminaga@sm.sony.co.jp>
549
550 * ppc-dis.c (powerpc_dialect): Handle ppc440.
551 * ppc-dis.c (print_ppc_disassembler_options): Note the -M440 can
552 be used.
553
554 2007-02-02 Alan Modra <amodra@bigpond.net.au>
555
556 * ppc-opc.c (insert_bdm): -Many comment.
557 (valid_bo): Add "extract" param. Accept both powerpc and power4
558 BO fields when disassembling with -Many.
559 (insert_bo, extract_bo, insert_boe, extract_boe): Adjust valid_bo call.
560
561 2007-01-08 Kazu Hirata <kazu@codesourcery.com>
562
563 * m68k-opc.c (m68k_opcodes): Replace cpu32 with
564 cpu32 | fido_a except on tbl instructions.
565
566 2007-01-04 Paul Brook <paul@codesourcery.com>
567
568 * arm-dis.c (arm_opcodes): Fix cpsie and cpsid entries.
569
570 2007-01-04 Andreas Schwab <schwab@suse.de>
571
572 * m68k-opc.c: Fix encoding of signed bit in the cpu32 tbls insns.
573
574 2007-01-04 Julian Brown <julian@codesourcery.com>
575
576 * arm-dis.c (neon_opcode): Fix disassembly for vshl, vqshl, vrshl,
577 vqrshl instructions.
578
579 For older changes see ChangeLog-2006
580 \f
581 Local Variables:
582 mode: change-log
583 left-margin: 8
584 fill-column: 74
585 version-control: never
586 End:
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