1 2019-04-24 John Darrington <john@darrington.wattle.id.au>
3 * s12z-opc.h: Add extern "C" bracketing to help
4 users who wish to use this interface in c++ code.
6 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
8 * arm-dis.c (coprocessor_opcodes): Document new %J and %K format
9 specifier. Add entries for VLDR and VSTR of system registers.
10 (print_insn_coprocessor): Forbid coprocessor numbers 8, 14 and 15 in
11 coprocessor instructions on Armv8.1-M Mainline targets. Add handling
12 of %J and %K format specifier.
14 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
16 * arm-dis.c (coprocessor_opcodes): Document new %C format control code.
17 Add new entries for VSCCLRM instruction.
18 (print_insn_coprocessor): Handle new %C format control code.
20 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
22 * arm-dis.c (enum isa): New enum.
23 (struct sopcode32): New structure.
24 (coprocessor_opcodes): change type of entries to struct sopcode32 and
25 set isa field of all current entries to ANY.
26 (print_insn_coprocessor): Change type of insn to struct sopcode32.
27 Only match an entry if its isa field allows the current mode.
29 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
31 * arm-dis.c (thumb_opcodes): Document %n control code. Add entry for
33 (print_insn_thumb32): Add logic to print %n CLRM register list.
35 2019-04-15 Sudakshina Das <sudi.das@arm.com>
37 * arm-dis.c (print_insn_thumb32): Updated to accept new %P
40 2019-04-15 Sudakshina Das <sudi.das@arm.com>
42 * arm-dis.c (thumb32_opcodes): New instruction bfcsel.
43 (print_insn_thumb32): Edit the switch case for %Z.
45 2019-04-15 Sudakshina Das <sudi.das@arm.com>
47 * arm-dis.c (print_insn_thumb32): Updated to accept new %Z pattern.
49 2019-04-15 Sudakshina Das <sudi.das@arm.com>
51 * arm-dis.c (thumb32_opcodes): New instruction bfl.
53 2019-04-15 Sudakshina Das <sudi.das@arm.com>
55 * arm-dis.c (print_insn_thumb32): Updated to accept new %Y pattern.
57 2019-04-15 Sudakshina Das <sudi.das@arm.com>
59 * arm-dis.c (print_insn_thumb32): Add '%<bitfield>S' to print an
60 Arm register with r13 and r15 unpredictable.
61 (thumb32_opcodes): New instructions for bfx and bflx.
63 2019-04-15 Sudakshina Das <sudi.das@arm.com>
65 * arm-dis.c (thumb32_opcodes): New instructions for bf.
67 2019-04-15 Sudakshina Das <sudi.das@arm.com>
69 * arm-dis.c (print_insn_thumb32): Updated to accept new %W pattern.
71 2019-04-15 Sudakshina Das <sudi.das@arm.com>
73 * arm-dis.c (print_insn_thumb32): Updated to accept new %G pattern.
75 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
77 * arm-dis.c (select_arm_features): Add logic for Armv8.1-M Mainline.
79 2019-04-12 John Darrington <john@darrington.wattle.id.au>
81 s12z-dis.c, s12z-opc.c, s12z-opc.h: Replace "operator" with
82 "optr". ("operator" is a reserved word in c++).
84 2019-04-11 Sudakshina Das <sudi.das@arm.com>
86 * aarch64-opc.c (aarch64_print_operand): Add case for
88 (verify_constraints): Likewise.
89 * aarch64-tbl.h (QL_LDST_AT): Update to add SP qualifier.
90 (struct aarch64_opcode): Update stg, stzg, st2g, stz2g instructions
91 to accept Rt|SP as first operand.
92 (AARCH64_OPERANDS): Add new Rt_SP.
93 * aarch64-asm-2.c: Regenerated.
94 * aarch64-dis-2.c: Regenerated.
95 * aarch64-opc-2.c: Regenerated.
97 2019-04-11 Sudakshina Das <sudi.das@arm.com>
99 * aarch64-asm-2.c: Regenerated.
100 * aarch64-dis-2.c: Likewise.
101 * aarch64-opc-2.c: Likewise.
102 * aarch64-tbl.h (aarch64_opcode): Add new ldgm and stgm.
104 2019-04-09 Robert Suchanek <robert.suchanek@mips.com>
106 * mips-opc.c (mips_builtin_opcodes): Add RDHWR rt rd sel.
108 2019-04-08 H.J. Lu <hongjiu.lu@intel.com>
110 * i386-opc.tbl: Consolidate AVX512 BF16 entries.
111 * i386-init.h: Regenerated.
113 2019-04-07 Alan Modra <amodra@gmail.com>
115 * ppc-dis.c (print_insn_powerpc): Use a tiny state machine
116 op_separator to control printing of spaces, comma and parens
117 rather than need_comma, need_paren and spaces vars.
119 2019-04-07 Alan Modra <amodra@gmail.com>
122 * arm-dis.c (print_insn_coprocessor): Correct bracket placement.
123 (print_insn_neon, print_insn_arm): Likewise.
125 2019-04-05 Xuepeng Guo <xuepeng.guo@intel.com>
127 * i386-dis-evex.h (evex_table): Updated to support BF16
129 * i386-dis.c (enum): Add EVEX_W_0F3852_P_1, EVEX_W_0F3872_P_1
130 and EVEX_W_0F3872_P_3.
131 * i386-gen.c (cpu_flag_init): Add CPU_AVX512_BF16_FLAGS.
132 (cpu_flags): Add bitfield for CpuAVX512_BF16.
133 * i386-opc.h (enum): Add CpuAVX512_BF16.
134 (i386_cpu_flags): Add bitfield for cpuavx512_bf16.
135 * i386-opc.tbl: Add AVX512 BF16 instructions.
136 * i386-init.h: Regenerated.
137 * i386-tbl.h: Likewise.
139 2019-04-05 Alan Modra <amodra@gmail.com>
141 * ppc-opc.c (XLBH_MASK): Subtract off BH field from BB_MASK.
142 (powerpc_opcodes): Reorder bcctr and bclr extended mnemonics
143 to favour printing of "-" branch hint when using the "y" bit.
144 Allow BH field on bc{ctr,lr,tar}{,l}{-,+}.
146 2019-04-05 Alan Modra <amodra@gmail.com>
148 * ppc-dis.c (print_insn_powerpc): Delay printing spaces after
149 opcode until first operand is output.
151 2019-04-04 Peter Bergner <bergner@linux.ibm.com>
154 * ppc-opc.c (valid_bo_pre_v2): Add comments.
155 (valid_bo_post_v2): Add support for 'at' branch hints.
156 (insert_bo): Only error on branch on ctr.
157 (get_bo_hint_mask): New function.
158 (insert_boe): Add new 'branch_taken' formal argument. Add support
159 for inserting 'at' branch hints.
160 (extract_boe): Add new 'branch_taken' formal argument. Add support
161 for extracting 'at' branch hints.
162 (insert_bom, extract_bom, insert_bop, extract_bop): New functions.
163 (BOE): Delete operand.
164 (BOM, BOP): New operands.
166 (XLYLK, XLYLK_MASK, XLYBB_MASK): Delete.
167 (powerpc_opcodes) <bc-, bcl-, bca-, bcla-, bclr-, bclrl-, bcctr-,
168 bcctrl-, bctar-, bctarl->: Replace BOE with BOM.
169 (powerpc_opcodes) <bc+, bcl+, bca+, bcla+, bclr+, bclrl+, bcctr+,
170 bcctrl+, bctar+, bctarl+>: Replace BOE with BOP.
171 <bdnztar, bdnztarl, bdztar, bdztarl, btar, btarl, bdnztar-, bdnztarl-,
172 bdnztar+, bdnztarl+, bdztar-, bdztarl-, bdztar+, bdztarl+, bgetar,
173 bnltar, bgetarl, bnltarl, bletar, bngtar, bletarl, bngtarl, bnetar,
174 bnetarl, bnstar, bnutar, bnstarl, bnutarl, bgetar-, bnltar-, bgetarl-,
175 bnltarl-, bletar-, bngtar-, bletarl-, bngtarl-, bnetar-, bnetarl-,
176 bnstar-, bnutar-, bnstarl-, bnutarl-, bgetar+, bnltar+, bgetarl+,
177 bnltarl+, bletar+, bngtar+, bletarl+, bngtarl+, bnetar+, bnetarl+,
178 bnstar+, bnutar+, bnstarl+, bnutarl+, blttar, blttarl, bgttar, bgttarl,
179 beqtar, beqtarl, bsotar, buntar, bsotarl, buntarl, blttar-, blttarl-,
180 bgttar-, bgttarl-, beqtar-, beqtarl-, bsotar-, buntar-, bsotarl-,
181 buntarl-, blttar+, blttarl+, bgttar+, bgttarl+, beqtar+, beqtarl+,
182 bsotar+, buntar+, bsotarl+, buntarl+, bdnzftar, bdnzftarl, bdzftar,
183 bdzftarl, bftar, bftarl, bftar-, bftarl-, bftar+, bftarl+, bdnzttar,
184 bdnzttarl, bdzttar, bdzttarl, bttar, bttarl, bttar-, bttarl-, bttar+,
185 bttarl+>: New extended mnemonics.
187 2019-03-28 Alan Modra <amodra@gmail.com>
190 * ppc-opc.c (BTF): Define.
191 (powerpc_opcodes): Use for mtfsb*.
192 * ppc-dis.c (print_insn_powerpc): Print fields with both
193 PPC_OPERAND_CR_REG and PPC_OPERAND_CR_BIT as a plain number.
195 2019-03-25 Tamar Christina <tamar.christina@arm.com>
197 * arm-dis.c (struct arm_private_data): Remove has_mapping_symbols.
198 (mapping_symbol_for_insn): Implement new algorithm.
199 (print_insn): Remove duplicate code.
201 2019-03-25 Tamar Christina <tamar.christina@arm.com>
203 * aarch64-dis.c (print_insn_aarch64):
206 2019-03-25 Tamar Christina <tamar.christina@arm.com>
208 * aarch64-dis.c (print_insn_aarch64): Update the mapping symbol search
211 2019-03-25 Tamar Christina <tamar.christina@arm.com>
213 * aarch64-dis.c (last_stop_offset): New.
214 (print_insn_aarch64): Use stop_offset.
216 2019-03-19 H.J. Lu <hongjiu.lu@intel.com>
219 * i386-gen.c (cpu_flag_init): Add CPU_ANY_AVX512F_FLAGS to
221 * i386-init.h: Regenerated.
223 2019-03-18 H.J. Lu <hongjiu.lu@intel.com>
226 * i386-opc.tbl: Add Optimize to vmovdqa32, vmovdqa64, vmovdqu8,
227 vmovdqu16, vmovdqu32 and vmovdqu64.
228 * i386-tbl.h: Regenerated.
230 2019-03-12 Andreas Krebbel <krebbel@linux.ibm.com>
232 * s390-opc.txt: Rename selhhhr to selfhr. Remove optional operand
233 from vstrszb, vstrszh, and vstrszf.
235 2019-03-12 Andreas Krebbel <krebbel@linux.ibm.com>
237 * s390-opc.txt: Add instruction descriptions.
239 2019-02-08 Jim Wilson <jimw@sifive.com>
241 * riscv-opc.c (riscv_opcodes) <beq>: Use Cz to compress 3 operand form.
244 2019-02-07 Tamar Christina <tamar.christina@arm.com>
246 * arm-dis.c (arm_opcodes): Redefine hlt to armv1.
248 2019-02-07 Tamar Christina <tamar.christina@arm.com>
251 * aarch64-opc.h (enum aarch64_field_kind): Add FLD_sz.
252 * aarch64-opc.c (verify_elem_sd): New.
253 (fields): Add FLD_sz entr.
254 * aarch64-tbl.h (_SIMD_INSN): New.
255 (aarch64_opcode_table): Add elem_sd verifier to fmla, fmls, fmul and
256 fmulx scalar and vector by element isns.
258 2019-02-07 Nick Clifton <nickc@redhat.com>
260 * po/sv.po: Updated Swedish translation.
262 2019-01-31 Andreas Krebbel <krebbel@linux.ibm.com>
264 * s390-mkopc.c (main): Accept arch13 as cpu string.
265 * s390-opc.c: Add new instruction formats and instruction opcode
267 * s390-opc.txt: Add new arch13 instructions.
269 2019-01-25 Sudakshina Das <sudi.das@arm.com>
271 * aarch64-tbl.h (QL_LDST_AT): Update macro.
272 (aarch64_opcode): Change encoding for stg, stzg
274 * aarch64-asm-2.c: Regenerated.
275 * aarch64-dis-2.c: Regenerated.
276 * aarch64-opc-2.c: Regenerated.
278 2019-01-25 Sudakshina Das <sudi.das@arm.com>
280 * aarch64-asm-2.c: Regenerated.
281 * aarch64-dis-2.c: Likewise.
282 * aarch64-opc-2.c: Likewise.
283 * aarch64-tbl.h (aarch64_opcode): Add new stzgm.
285 2019-01-25 Sudakshina Das <sudi.das@arm.com>
286 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
288 * aarch64-asm.c (aarch64_ins_addr_simple_2): Remove.
289 * aarch64-asm.h (ins_addr_simple_2): Likeiwse.
290 * aarch64-dis.c (aarch64_ext_addr_simple_2): Likewise.
291 * aarch64-dis.h (ext_addr_simple_2): Likewise.
292 * aarch64-opc.c (operand_general_constraint_met_p): Remove
293 case for ldstgv_indexed.
294 (aarch64_print_operand): Remove case for AARCH64_OPND_ADDR_SIMPLE_2.
295 * aarch64-tbl.h (struct aarch64_opcode): Remove ldgv and stgv.
296 (AARCH64_OPERANDS): Remove ADDR_SIMPLE_2.
297 * aarch64-asm-2.c: Regenerated.
298 * aarch64-dis-2.c: Regenerated.
299 * aarch64-opc-2.c: Regenerated.
301 2019-01-23 Nick Clifton <nickc@redhat.com>
303 * po/pt_BR.po: Updated Brazilian Portuguese translation.
305 2019-01-21 Nick Clifton <nickc@redhat.com>
307 * po/de.po: Updated German translation.
308 * po/uk.po: Updated Ukranian translation.
310 2019-01-20 Chenghua Xu <paul.hua.gm@gmail.com>
311 * mips-dis.c (mips_arch_choices): Fix typo in
312 gs464, gs464e and gs264e descriptors.
314 2019-01-19 Nick Clifton <nickc@redhat.com>
316 * configure: Regenerate.
317 * po/opcodes.pot: Regenerate.
319 2018-06-24 Nick Clifton <nickc@redhat.com>
323 2019-01-09 John Darrington <john@darrington.wattle.id.au>
325 * s12z-dis.c (print_insn_s12z): Do not dereference an operand
327 -dis.c (opr_emit_disassembly): Do not omit an index if it is
330 2019-01-09 Andrew Paprocki <andrew@ishiboo.com>
332 * configure: Regenerate.
334 2019-01-07 Alan Modra <amodra@gmail.com>
336 * configure: Regenerate.
337 * po/POTFILES.in: Regenerate.
339 2019-01-03 John Darrington <john@darrington.wattle.id.au>
341 * s12z-opc.c: New file.
342 * s12z-opc.h: New file.
343 * s12z-dis.c: Removed all code not directly related to display
344 of instructions. Used the interface provided by the new files
346 * Makefile.am (TARGET_LIBOPCODES_CFILES) Add s12z-opc.c.
347 * Makefile.in: Regenerate.
348 * configure.ac (bfd_s12z_arch): Correct the dependencies.
349 * configure: Regenerate.
351 2019-01-01 Alan Modra <amodra@gmail.com>
353 Update year range in copyright notice of all files.
355 For older changes see ChangeLog-2018
357 Copyright (C) 2019 Free Software Foundation, Inc.
359 Copying and distribution of this file, with or without modification,
360 are permitted in any medium without royalty provided the copyright
361 notice and this notice are preserved.
367 version-control: never