opcodes/ChangeLog

   1 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
   2
   3         * Makefile.am (stamp-m32r): Fix path to cpu files.
   4         (stamp-m32r, stamp-iq2000): Likewise.
   5         * Makefile.in: Regenerate.
   6         * m32r-asm.c: Regenerate.
   7         * po/POTFILES.in: Remove arm-opc.h.  Add ms1-asm.c, ms1-desc.c,
   8         ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
   9
  10 2005-07-05  Nick Clifton  <nickc@redhat.com>
  11
  12         * iq2000-asm.c: Regenerate.
  13         * ms1-asm.c: Regenerate.
  14
  15 2005-07-05  Jan Beulich  <jbeulich@novell.com>
  16
  17         * i386-dis.c (SVME_Fixup): New.
  18         (grps): Use it for the lidt entry.
  19         (PNI_Fixup): Call OP_M rather than OP_E.
  20         (INVLPG_Fixup): Likewise.
  21
  22 2005-07-04  H.J. Lu  <hongjiu.lu@intel.com>
  23
  24         * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
  25
  26 2005-07-01  Nick Clifton  <nickc@redhat.com>
  27
  28         * a29k-dis.c: Update to ISO C90 style function declarations and
  29         fix formatting.
  30         * alpha-opc.c: Likewise.
  31         * arc-dis.c: Likewise.
  32         * arc-opc.c: Likewise.
  33         * avr-dis.c: Likewise.
  34         * cgen-asm.in: Likewise.
  35         * cgen-dis.in: Likewise.
  36         * cgen-ibld.in: Likewise.
  37         * cgen-opc.c: Likewise.
  38         * cris-dis.c: Likewise.
  39         * d10v-dis.c: Likewise.
  40         * d30v-dis.c: Likewise.
  41         * d30v-opc.c: Likewise.
  42         * dis-buf.c: Likewise.
  43         * dlx-dis.c: Likewise.
  44         * h8300-dis.c: Likewise.
  45         * h8500-dis.c: Likewise.
  46         * hppa-dis.c: Likewise.
  47         * i370-dis.c: Likewise.
  48         * i370-opc.c: Likewise.
  49         * m10200-dis.c: Likewise.
  50         * m10300-dis.c: Likewise.
  51         * m68k-dis.c: Likewise.
  52         * m88k-dis.c: Likewise.
  53         * mips-dis.c: Likewise.
  54         * mmix-dis.c: Likewise.
  55         * msp430-dis.c: Likewise.
  56         * ns32k-dis.c: Likewise.
  57         * or32-dis.c: Likewise.
  58         * or32-opc.c: Likewise.
  59         * pdp11-dis.c: Likewise.
  60         * pj-dis.c: Likewise.
  61         * s390-dis.c: Likewise.
  62         * sh-dis.c: Likewise.
  63         * sh64-dis.c: Likewise.
  64         * sparc-dis.c: Likewise.
  65         * sparc-opc.c: Likewise.
  66         * sysdep.h: Likewise.
  67         * tic30-dis.c: Likewise.
  68         * tic4x-dis.c: Likewise.
  69         * tic80-dis.c: Likewise.
  70         * v850-dis.c: Likewise.
  71         * v850-opc.c: Likewise.
  72         * vax-dis.c: Likewise.
  73         * w65-dis.c: Likewise.
  74         * z8kgen.c: Likewise.
  75
  76         * fr30-*: Regenerate.
  77         * frv-*: Regenerate.
  78         * ip2k-*: Regenerate.
  79         * iq2000-*: Regenerate.
  80         * m32r-*: Regenerate.
  81         * ms1-*: Regenerate.
  82         * openrisc-*: Regenerate.
  83         * xstormy16-*: Regenerate.
  84
  85 2005-06-23  Ben Elliston  <bje@gnu.org>
  86
  87         * m68k-dis.c: Use ISC C90.
  88         * m68k-opc.c: Formatting fixes.
  89
  90 2005-06-16  David Ung  <davidu@mips.com>
  91
  92         * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
  93         instructions to the table; seb/seh/sew/zeb/zeh/zew.
  94
  95 2005-06-15  Dave Brolley  <brolley@redhat.com>
  96
  97         Contribute Morpho ms1 on behalf of Red Hat
  98         * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
  99         ms1-opc.h: New files, Morpho ms1 target.
 100
 101         2004-05-14  Stan Cox  <scox@redhat.com>
 102
 103         * disassemble.c (ARCH_ms1): Define.
 104         (disassembler): Handle bfd_arch_ms1
 105
 106         2004-05-13  Michael Snyder  <msnyder@redhat.com>
 107
 108         * Makefile.am, Makefile.in: Add ms1 target.
 109         * configure.in: Ditto.
 110
 111 2005-06-08  Zack Weinberg  <zack@codesourcery.com>
 112
 113         * arm-opc.h: Delete; fold contents into ...
 114         * arm-dis.c: ... here.  Move includes of internal COFF headers
 115         next to includes of internal ELF headers.
 116         (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
 117         (struct arm_opcode): Rename struct opcode32.  Make 'assembler' const.
 118         (struct thumb_opcode): Rename struct opcode16.  Make 'assembler' const.
 119         (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
 120         (iwmmxt_wwnames, iwmmxt_wwssnames):
 121         Make const.
 122         (regnames): Remove iWMMXt coprocessor register sets.
 123         (iwmmxt_regnames, iwmmxt_cregnames): New statics.
 124         (get_arm_regnames): Adjust fourth argument to match above changes.
 125         (set_iwmmxt_regnames): Delete.
 126         (print_insn_arm): Constify 'c'.  Use ISO syntax for function
 127         pointer calls.  Expand sole use of BDISP.  Use iwmmxt_regnames
 128         and iwmmxt_cregnames, not set_iwmmxt_regnames.
 129         (print_insn_thumb16, print_insn_thumb32): Constify 'c'.  Use
 130         ISO syntax for function pointer calls.
 131
 132 2005-06-07  Zack Weinberg  <zack@codesourcery.com>
 133
 134         * arm-dis.c: Split up the comments describing the format codes, so
 135         that the ARM and 16-bit Thumb opcode tables each have comments
 136         preceding them that describe all the codes, and only the codes,
 137         valid in those tables.  (32-bit Thumb table is already like this.)
 138         Reorder the lists in all three comments to match the order in
 139         which the codes are implemented.
 140         Remove all forward declarations of static functions.  Convert all
 141         function definitions to ISO C format.
 142         (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
 143         Return nothing.
 144         (print_insn_thumb16): Remove unused case 'I'.
 145         (print_insn): Update for changed calling convention of subroutines.
 146
 147 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 148
 149         * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
 150         hex (but retain it being displayed as signed). Remove redundant
 151         checks. Add handling of displacements for 16-bit addressing in Intel
 152         mode.
 153
 154 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 155
 156         * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
 157         (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
 158         masking of 'rm' in 16-bit memory address handling.
 159
 160 2005-05-19  Anton Blanchard  <anton@samba.org>
 161
 162         * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
 163         (print_ppc_disassembler_options): Document it.
 164         * ppc-opc.c (SVC_LEV): Define.
 165         (LEV): Allow optional operand.
 166         (POWER5): Define.
 167         (powerpc_opcodes): Extend "sc".  Adjust "svc" and "svcl".  Add
 168         "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
 169
 170 2005-05-19  Kelley Cook  <kcook@gcc.gnu.org>
 171
 172         * Makefile.in:  Regenerate.
 173
 174 2005-05-17  Zack Weinberg  <zack@codesourcery.com>
 175
 176         * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
 177         instructions.  Adjust disassembly of some opcodes to match
 178         unified syntax.
 179         (thumb32_opcodes): New table.
 180         (print_insn_thumb): Rename print_insn_thumb16; don't handle
 181         two-halfword branches here.
 182         (print_insn_thumb32): New function.
 183         (print_insn): Choose among print_insn_arm, print_insn_thumb16,
 184         and print_insn_thumb32.  Be consistent about order of
 185         halfwords when printing 32-bit instructions.
 186
 187 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 188
 189         PR 843
 190         * i386-dis.c (branch_v_mode): New.
 191         (indirEv): Use branch_v_mode instead of v_mode.
 192         (OP_E): Handle branch_v_mode.
 193
 194 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 195
 196         * d10v-dis.c (dis_2_short): Support 64bit host.
 197
 198 2005-05-07  Nick Clifton  <nickc@redhat.com>
 199
 200         * po/nl.po: Updated translation.
 201
 202 2005-05-07  Nick Clifton  <nickc@redhat.com>
 203
 204         * Update the address and phone number of the FSF organization in
 205         the GPL notices in the following files:
 206         a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
 207         arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
 208         avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
 209         cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
 210         crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
 211         d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
 212         fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
 213         fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
 214         frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
 215         h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
 216         i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
 217         ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
 218         ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
 219         ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
 220         ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
 221         iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
 222         iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
 223         m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
 224         m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
 225         m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
 226         maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
 227         mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
 228         openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
 229         openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
 230         or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
 231         pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
 232         s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
 233         sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
 234         tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
 235         v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
 236         xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
 237         xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
 238         xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
 239
 240 2005-05-05  James E Wilson  <wilson@specifixinc.com>
 241
 242         * ia64-opc.c: Include sysdep.h before libiberty.h.
 243
 244 2005-05-05  Nick Clifton  <nickc@redhat.com>
 245
 246         * configure.in (ALL_LINGUAS): Add vi.
 247         * configure: Regenerate.
 248         * po/vi.po: New.
 249
 250 2005-04-26  Jerome Guitton  <guitton@gnat.com>
 251
 252         * configure.in: Fix the check for basename declaration.
 253         * configure: Regenerate.
 254
 255 2005-04-19  Alan Modra  <amodra@bigpond.net.au>
 256
 257         * ppc-opc.c (RTO): Define.
 258         (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
 259         entries to suit PPC440.
 260
 261 2005-04-18  Mark Kettenis  <kettenis@gnu.org>
 262
 263         * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
 264         Add xcrypt-ctr.
 265
 266 2005-04-14  Nick Clifton  <nickc@redhat.com>
 267
 268         * po/fi.po: New translation: Finnish.
 269         * configure.in (ALL_LINGUAS): Add fi.
 270         * configure: Regenerate.
 271
 272 2005-04-14  Alan Modra  <amodra@bigpond.net.au>
 273
 274         * Makefile.am (NO_WERROR): Define.
 275         * configure.in: Invoke AM_BINUTILS_WARNINGS.
 276         * Makefile.in: Regenerate.
 277         * aclocal.m4: Regenerate.
 278         * configure: Regenerate.
 279
 280 2005-04-04  Nick Clifton  <nickc@redhat.com>
 281
 282         * fr30-asm.c: Regenerate.
 283         * frv-asm.c: Regenerate.
 284         * iq2000-asm.c: Regenerate.
 285         * m32r-asm.c: Regenerate.
 286         * openrisc-asm.c: Regenerate.
 287
 288 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 289
 290         * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
 291         visible operands in Intel mode. The first operand of monitor is
 292         %rax in 64-bit mode.
 293
 294 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 295
 296         * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
 297         easier future additions.
 298
 299 2005-03-31  Jerome Guitton  <guitton@gnat.com>
 300
 301         * configure.in: Check for basename.
 302         * configure: Regenerate.
 303         * config.in: Ditto.
 304
 305 2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>
 306
 307         * i386-dis.c (SEG_Fixup): New.
 308         (Sv): New.
 309         (dis386): Use "Sv" for 0x8c and 0x8e.
 310
 311 2005-03-21  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 312             Nick Clifton  <nickc@redhat.com>
 313
 314         * vax-dis.c: (entry_addr): New varible:  An array of user supplied
 315         function entry mask addresses.
 316         (entry_addr_occupied_slots): New variable: The number of occupied
 317         elements in entry_addr.
 318         (entry_addr_total_slots): New variable: The total number of
 319         elements in entry_addr.
 320         (parse_disassembler_options): New function.  Fills in the entry_addr
 321         array.
 322         (free_entry_array): New function.  Release the memory used by the
 323         entry addr array.  Suppressed because there is no way to call it.
 324         (is_function_entry): Check if a given address is a function's
 325         start address by looking at supplied entry mask addresses and
 326         symbol information, if available.
 327         (print_insn_vax): Use parse_disassembler_options and is_function_entry.
 328
 329 2005-03-23  H.J. Lu  <hongjiu.lu@intel.com>
 330
 331         * cris-dis.c (print_with_operands): Use ~31L for long instead
 332         of ~31.
 333
 334 2005-03-20  H.J. Lu  <hongjiu.lu@intel.com>
 335
 336         * mmix-opc.c (O): Revert the last change.
 337         (Z): Likewise.
 338
 339 2005-03-19  H.J. Lu  <hongjiu.lu@intel.com>
 340
 341         * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
 342         (Z): Likewise.
 343
 344 2005-03-19  Hans-Peter Nilsson  <hp@bitrange.com>
 345
 346         * mmix-opc.c (O, Z): Force expression as unsigned long.
 347
 348 2005-03-18  Nick Clifton  <nickc@redhat.com>
 349
 350         * ip2k-asm.c: Regenerate.
 351         * op/opcodes.pot: Regenerate.
 352
 353 2005-03-16  Nick Clifton  <nickc@redhat.com>
 354             Ben Elliston  <bje@au.ibm.com>
 355
 356         * configure.in (werror): New switch: Add -Werror to the
 357         compiler command line.  Enabled by default.  Disable via
 358         --disable-werror.
 359         * configure: Regenerate.
 360
 361 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
 362
 363         * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
 364         BOOKE.
 365
 366 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
 367
 368         * po/es.po: Commit new Spanish translation.
 369
 370         * po/fr.po: Commit new French translation.
 371
 372 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 373
 374         * vax-dis.c: Fix spelling error
 375         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
 376         of just "Entry mask: < r1 ... >"
 377
 378 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
 379
 380         * arm-dis.c (arm_opcodes): Document %E and %V.
 381         Add entries for v6T2 ARM instructions:
 382         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
 383         (print_insn_arm): Add support for %E and %V.
 384         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
 385
 386 2005-03-10  Jeff Baker  <jbaker@qnx.com>
 387             Alan Modra  <amodra@bigpond.net.au>
 388
 389         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
 390         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
 391         (SPRG_MASK): Delete.
 392         (XSPRG_MASK): Mask off extra bits now part of sprg field.
 393         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
 394         mfsprg4..7 after msprg and consolidate.
 395
 396 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 397
 398         * vax-dis.c (entry_mask_bit): New array.
 399         (print_insn_vax): Decode function entry mask.
 400
 401 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
 402
 403         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
 404
 405 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
 406
 407         * po/opcodes.pot: Regenerate.
 408
 409 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
 410
 411         * arc-dis.c (a4_decoding_class): New enum.
 412         (dsmOneArcInst): Use the enum values for the decoding class.
 413         Remove redundant case in the switch for decodingClass value 11.
 414
 415 2005-03-02  Jan Beulich  <jbeulich@novell.com>
 416
 417         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
 418         accesses.
 419         (OP_C): Consider lock prefix in non-64-bit modes.
 420
 421 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 422
 423         * cris-dis.c (format_hex): Remove ineffective warning fix.
 424         * crx-dis.c (make_instruction): Warning fix.
 425         * frv-asm.c: Regenerate.
 426
 427 2005-02-23  Nick Clifton  <nickc@redhat.com>
 428
 429         * cgen-dis.in: Use bfd_byte for buffers that are passed to
 430         read_memory.
 431
 432         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
 433
 434         * crx-dis.c (make_instruction): Move argument structure into inner
 435         scope and ensure that all of its fields are initialised before
 436         they are used.
 437
 438         * fr30-asm.c: Regenerate.
 439         * fr30-dis.c: Regenerate.
 440         * frv-asm.c: Regenerate.
 441         * frv-dis.c: Regenerate.
 442         * ip2k-asm.c: Regenerate.
 443         * ip2k-dis.c: Regenerate.
 444         * iq2000-asm.c: Regenerate.
 445         * iq2000-dis.c: Regenerate.
 446         * m32r-asm.c: Regenerate.
 447         * m32r-dis.c: Regenerate.
 448         * openrisc-asm.c: Regenerate.
 449         * openrisc-dis.c: Regenerate.
 450         * xstormy16-asm.c: Regenerate.
 451         * xstormy16-dis.c: Regenerate.
 452
 453 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 454
 455         * arc-ext.c: Warning fixes.
 456         * arc-ext.h: Likewise.
 457         * cgen-opc.c: Likewise.
 458         * ia64-gen.c: Likewise.
 459         * maxq-dis.c: Likewise.
 460         * ns32k-dis.c: Likewise.
 461         * w65-dis.c: Likewise.
 462         * ia64-asmtab.c: Regenerate.
 463
 464 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 465
 466         * fr30-desc.c: Regenerate.
 467         * fr30-desc.h: Regenerate.
 468         * fr30-opc.c: Regenerate.
 469         * fr30-opc.h: Regenerate.
 470         * frv-desc.c: Regenerate.
 471         * frv-desc.h: Regenerate.
 472         * frv-opc.c: Regenerate.
 473         * frv-opc.h: Regenerate.
 474         * ip2k-desc.c: Regenerate.
 475         * ip2k-desc.h: Regenerate.
 476         * ip2k-opc.c: Regenerate.
 477         * ip2k-opc.h: Regenerate.
 478         * iq2000-desc.c: Regenerate.
 479         * iq2000-desc.h: Regenerate.
 480         * iq2000-opc.c: Regenerate.
 481         * iq2000-opc.h: Regenerate.
 482         * m32r-desc.c: Regenerate.
 483         * m32r-desc.h: Regenerate.
 484         * m32r-opc.c: Regenerate.
 485         * m32r-opc.h: Regenerate.
 486         * m32r-opinst.c: Regenerate.
 487         * openrisc-desc.c: Regenerate.
 488         * openrisc-desc.h: Regenerate.
 489         * openrisc-opc.c: Regenerate.
 490         * openrisc-opc.h: Regenerate.
 491         * xstormy16-desc.c: Regenerate.
 492         * xstormy16-desc.h: Regenerate.
 493         * xstormy16-opc.c: Regenerate.
 494         * xstormy16-opc.h: Regenerate.
 495
 496 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
 497
 498         * Makefile.am: Run "make dep-am"
 499         * Makefile.in: Regenerate.
 500
 501 2005-02-15  Nick Clifton  <nickc@redhat.com>
 502
 503         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
 504         compile time warnings.
 505         (print_keyword): Likewise.
 506         (default_print_insn): Likewise.
 507
 508         * fr30-desc.c: Regenerated.
 509         * fr30-desc.h: Regenerated.
 510         * fr30-dis.c: Regenerated.
 511         * fr30-opc.c: Regenerated.
 512         * fr30-opc.h: Regenerated.
 513         * frv-desc.c: Regenerated.
 514         * frv-dis.c: Regenerated.
 515         * frv-opc.c: Regenerated.
 516         * ip2k-asm.c: Regenerated.
 517         * ip2k-desc.c: Regenerated.
 518         * ip2k-desc.h: Regenerated.
 519         * ip2k-dis.c: Regenerated.
 520         * ip2k-opc.c: Regenerated.
 521         * ip2k-opc.h: Regenerated.
 522         * iq2000-desc.c: Regenerated.
 523         * iq2000-dis.c: Regenerated.
 524         * iq2000-opc.c: Regenerated.
 525         * m32r-asm.c: Regenerated.
 526         * m32r-desc.c: Regenerated.
 527         * m32r-desc.h: Regenerated.
 528         * m32r-dis.c: Regenerated.
 529         * m32r-opc.c: Regenerated.
 530         * m32r-opc.h: Regenerated.
 531         * m32r-opinst.c: Regenerated.
 532         * openrisc-desc.c: Regenerated.
 533         * openrisc-desc.h: Regenerated.
 534         * openrisc-dis.c: Regenerated.
 535         * openrisc-opc.c: Regenerated.
 536         * openrisc-opc.h: Regenerated.
 537         * xstormy16-desc.c: Regenerated.
 538         * xstormy16-desc.h: Regenerated.
 539         * xstormy16-dis.c: Regenerated.
 540         * xstormy16-opc.c: Regenerated.
 541         * xstormy16-opc.h: Regenerated.
 542
 543 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 544
 545         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 546         address.
 547
 548 2005-02-11  Nick Clifton  <nickc@redhat.com>
 549
 550         * iq2000-asm.c: Regenerate.
 551
 552         * frv-dis.c: Regenerate.
 553
 554 2005-02-07  Jim Blandy  <jimb@redhat.com>
 555
 556         * Makefile.am (CGEN): Load guile.scm before calling the main
 557         application script.
 558         * Makefile.in: Regenerated.
 559         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 560         Simply pass the cgen-opc.scm path to ${cgen} as its first
 561         argument; ${cgen} itself now contains the '-s', or whatever is
 562         appropriate for the Scheme being used.
 563
 564 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 565
 566         * configure: Regenerate to track ../gettext.m4.
 567
 568 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 569
 570         * ia64-gen.c (NELEMS): Define.
 571         (shrink): Generate alias with missing second predicate register when
 572         opcode has two outputs and these are both predicates.
 573         * ia64-opc-i.c (FULL17): Define.
 574         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 575         here to generate output template.
 576         (TBITCM, TNATCM): Undefine after use.
 577         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 578         first input. Add ld16 aliases without ar.csd as second output. Add
 579         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 580         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 581         ar.ccv as third/fourth inputs. Consolidate through...
 582         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 583         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 584         * ia64-asmtab.c: Regenerate.
 585
 586 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 587
 588         * configure: Regenerate to track ../gettext.m4 change.
 589
 590 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 591
 592         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 593         * frv-asm.c: Rebuilt.
 594         * frv-desc.c: Rebuilt.
 595         * frv-desc.h: Rebuilt.
 596         * frv-dis.c: Rebuilt.
 597         * frv-ibld.c: Rebuilt.
 598         * frv-opc.c: Rebuilt.
 599         * frv-opc.h: Rebuilt.
 600
 601 2005-01-24  Andrew Cagney  <cagney@gnu.org>
 602
 603         * configure: Regenerate, ../gettext.m4 was updated.
 604
 605 2005-01-21  Fred Fish  <fnf@specifixinc.com>
 606
 607         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
 608         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
 609         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
 610         * mips-dis.c: Ditto.
 611
 612 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
 613
 614         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
 615
 616 2005-01-19  Fred Fish  <fnf@specifixinc.com>
 617
 618         * mips-dis.c (no_aliases): New disassembly option flag.
 619         (set_default_mips_dis_options): Init no_aliases to zero.
 620         (parse_mips_dis_option): Handle no-aliases option.
 621         (print_insn_mips): Ignore table entries that are aliases
 622         if no_aliases is set.
 623         (print_insn_mips16): Ditto.
 624         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
 625         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
 626         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
 627         * mips16-opc.c (mips16_opcodes): Ditto.
 628
 629 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
 630
 631         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
 632         (inheritance diagram): Add missing edge.
 633         (arch_sh1_up): Rename arch_sh_up to match external name to make life
 634         easier for the testsuite.
 635         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
 636         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
 637         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
 638         arch_sh2a_or_sh4_up child.
 639         (sh_table): Do renaming as above.
 640         Correct comment for ldc.l for gas testsuite to read.
 641         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
 642         Correct comments for movy.w and movy.l for gas testsuite to read.
 643         Correct comments for fmov.d and fmov.s for gas testsuite to read.
 644
 645 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 646
 647         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
 648
 649 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 650
 651         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
 652
 653 2005-01-10  Andreas Schwab  <schwab@suse.de>
 654
 655         * disassemble.c (disassemble_init_for_target) <case
 656         bfd_arch_ia64>: Set skip_zeroes to 16.
 657         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
 658
 659 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
 660
 661         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
 662
 663 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
 664
 665         * avr-dis.c: Prettyprint. Added printing of symbol names in all
 666         memory references. Convert avr_operand() to C90 formatting.
 667
 668 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
 669
 670         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
 671
 672 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
 673
 674         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
 675         (no_op_insn): Initialize array with instructions that have no
 676         operands.
 677         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
 678
 679 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
 680
 681         * arm-dis.c: Correct top-level comment.
 682
 683 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
 684
 685         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
 686         architecuture defining the insn.
 687         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
 688         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
 689         field.
 690         Also include opcode/arm.h.
 691         * Makefile.am (arm-dis.lo): Update dependency list.
 692         * Makefile.in: Regenerate.
 693
 694 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
 695
 696         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
 697         reflect the change to the short immediate syntax.
 698
 699 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
 700
 701         * or32-opc.c (debug): Warning fix.
 702         * po/POTFILES.in: Regenerate.
 703
 704         * maxq-dis.c: Formatting.
 705         (print_insn): Warning fix.
 706
 707 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
 708
 709         * arm-dis.c (WORD_ADDRESS): Define.
 710         (print_insn): Use it.  Correct big-endian end-of-section handling.
 711
 712 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
 713             Vineet Sharma      <vineets@noida.hcltech.com>
 714
 715         * maxq-dis.c: New file.
 716         * disassemble.c (ARCH_maxq): Define.
 717         (disassembler): Add 'print_insn_maxq_little' for handling maxq
 718         instructions..
 719         * configure.in: Add case for bfd_maxq_arch.
 720         * configure: Regenerate.
 721         * Makefile.am: Add support for maxq-dis.c
 722         * Makefile.in: Regenerate.
 723         * aclocal.m4: Regenerate.
 724
 725 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
 726
 727         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
 728         mode.
 729         * crx-dis.c: Likewise.
 730
 731 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
 732
 733         Generally, handle CRISv32.
 734         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
 735         (struct cris_disasm_data): New type.
 736         (format_reg, format_hex, cris_constraint, print_flags)
 737         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
 738         callers changed.
 739         (format_sup_reg, print_insn_crisv32_with_register_prefix)
 740         (print_insn_crisv32_without_register_prefix)
 741         (print_insn_crisv10_v32_with_register_prefix)
 742         (print_insn_crisv10_v32_without_register_prefix)
 743         (cris_parse_disassembler_options): New functions.
 744         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
 745         parameter.  All callers changed.
 746         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
 747         failure.
 748         (cris_constraint) <case 'Y', 'U'>: New cases.
 749         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
 750         for constraint 'n'.
 751         (print_with_operands) <case 'Y'>: New case.
 752         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
 753         <case 'N', 'Y', 'Q'>: New cases.
 754         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
 755         (print_insn_cris_with_register_prefix)
 756         (print_insn_cris_without_register_prefix): Call
 757         cris_parse_disassembler_options.
 758         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
 759         for CRISv32 and the size of immediate operands.  New v32-only
 760         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
 761         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
 762         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
 763         Change brp to be v3..v10.
 764         (cris_support_regs): New vector.
 765         (cris_opcodes): Update head comment.  New format characters '[',
 766         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
 767         Add new opcodes for v32 and adjust existing opcodes to accommodate
 768         differences to earlier variants.
 769         (cris_cond15s): New vector.
 770
 771 2004-11-04 Jan Beulich <jbeulich@novell.com>
 772
 773         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
 774         (indirEb): Remove.
 775         (Mp): Use f_mode rather than none at all.
 776         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
 777         replaces what previously was x_mode; x_mode now means 128-bit SSE
 778         operands.
 779         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
 780         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
 781         pinsrw's second operand is Edqw.
 782         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
 783         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
 784         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
 785         mode when an operand size override is present or always suffixing.
 786         More instructions will need to be added to this group.
 787         (putop): Handle new macro chars 'C' (short/long suffix selector),
 788         'I' (Intel mode override for following macro char), and 'J' (for
 789         adding the 'l' prefix to far branches in AT&T mode). When an
 790         alternative was specified in the template, honor macro character when
 791         specified for Intel mode.
 792         (OP_E): Handle new *_mode values. Correct pointer specifications for
 793         memory operands. Consolidate output of index register.
 794         (OP_G): Handle new *_mode values.
 795         (OP_I): Handle const_1_mode.
 796         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
 797         respective opcode prefix bits have been consumed.
 798         (OP_EM, OP_EX): Provide some default handling for generating pointer
 799         specifications.
 800
 801 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
 802
 803         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
 804         COP_INST macro.
 805
 806 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
 807
 808         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
 809         (getregliststring): Support HI/LO and user registers.
 810         * crx-opc.c (crx_instruction): Update data structure according to the
 811         rearrangement done in CRX opcode header file.
 812         (crx_regtab):  Likewise.
 813         (crx_optab):  Likewise.
 814         (crx_instruction): Reorder load/stor instructions, remove unsupported
 815         formats.
 816         support new Co-Processor instruction 'cpi'.
 817
 818 2004-10-27  Nick Clifton  <nickc@redhat.com>
 819
 820         * opcodes/iq2000-asm.c: Regenerate.
 821         * opcodes/iq2000-desc.c: Regenerate.
 822         * opcodes/iq2000-desc.h: Regenerate.
 823         * opcodes/iq2000-dis.c: Regenerate.
 824         * opcodes/iq2000-ibld.c: Regenerate.
 825         * opcodes/iq2000-opc.c: Regenerate.
 826         * opcodes/iq2000-opc.h: Regenerate.
 827
 828 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
 829
 830         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
 831         us4, us5 (respectively).
 832         Remove unsupported 'popa' instruction.
 833         Reverse operands order in store co-processor instructions.
 834
 835 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
 836
 837         * Makefile.am: Run "make dep-am"
 838         * Makefile.in: Regenerate.
 839
 840 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
 841
 842         * xtensa-dis.c: Use ISO C90 formatting.
 843
 844 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
 845
 846         * ppc-opc.c: Revert 2004-09-09 change.
 847
 848 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
 849
 850         * xtensa-dis.c (state_names): Delete.
 851         (fetch_data): Use xtensa_isa_maxlength.
 852         (print_xtensa_operand): Replace operand parameter with opcode/operand
 853         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
 854         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
 855         instruction bundles.  Use xmalloc instead of malloc.
 856
 857 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
 858
 859         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
 860         initializers.
 861
 862 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
 863
 864         * crx-opc.c (crx_instruction): Support Co-processor insns.
 865         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
 866         (getregliststring): Change function to use the above enum.
 867         (print_arg): Handle CO-Processor insns.
 868         (crx_cinvs): Add 'b' option to invalidate the branch-target
 869         cache.
 870
 871 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
 872
 873         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
 874         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
 875         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
 876         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
 877         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
 878
 879 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
 880
 881         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
 882         rather than add it.
 883
 884 2004-09-30  Paul Brook  <paul@codesourcery.com>
 885
 886         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
 887         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
 888
 889 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
 890
 891         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
 892         (CONFIG_STATUS_DEPENDENCIES): New.
 893         (Makefile): Removed.
 894         (config.status): Likewise.
 895         * Makefile.in: Regenerated.
 896
 897 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
 898
 899         * Makefile.am: Run "make dep-am".
 900         * Makefile.in: Regenerate.
 901         * aclocal.m4: Regenerate.
 902         * configure: Regenerate.
 903         * po/POTFILES.in: Regenerate.
 904         * po/opcodes.pot: Regenerate.
 905
 906 2004-09-11  Andreas Schwab  <schwab@suse.de>
 907
 908         * configure: Rebuild.
 909
 910 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
 911
 912         * ppc-opc.c (L): Make this field not optional.
 913
 914 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
 915
 916         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
 917         Fix parameter to 'm[t|f]csr' insns.
 918
 919 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
 920
 921         * configure.in: Autoupdate to autoconf 2.59.
 922         * aclocal.m4: Rebuild with aclocal 1.4p6.
 923         * configure: Rebuild with autoconf 2.59.
 924         * Makefile.in: Rebuild with automake 1.4p6 (picking up
 925         bfd changes for autoconf 2.59 on the way).
 926         * config.in: Rebuild with autoheader 2.59.
 927
 928 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 929
 930         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
 931
 932 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
 933
 934         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
 935         (GRPPADLCK2): New define.
 936         (twobyte_has_modrm): True for 0xA6.
 937         (grps): GRPPADLCK2 for opcode 0xA6.
 938
 939 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
 940
 941         Introduce SH2a support.
 942         * sh-opc.h (arch_sh2a_base): Renumber.
 943         (arch_sh2a_nofpu_base): Remove.
 944         (arch_sh_base_mask): Adjust.
 945         (arch_opann_mask): New.
 946         (arch_sh2a, arch_sh2a_nofpu): Adjust.
 947         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
 948         (sh_table): Adjust whitespace.
 949         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
 950         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
 951         instruction list throughout.
 952         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
 953         of arch_sh2a in instruction list throughout.
 954         (arch_sh2e_up): Accomodate above changes.
 955         (arch_sh2_up): Ditto.
 956         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
 957         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
 958         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
 959         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
 960         * sh-opc.h (arch_sh2a_nofpu): New.
 961         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
 962         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
 963         instruction.
 964         2004-01-20  DJ Delorie  <dj@redhat.com>
 965         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
 966         2003-12-29  DJ Delorie  <dj@redhat.com>
 967         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
 968         sh_opcode_info, sh_table): Add sh2a support.
 969         (arch_op32): New, to tag 32-bit opcodes.
 970         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
 971         2003-12-02  Michael Snyder  <msnyder@redhat.com>
 972         * sh-opc.h (arch_sh2a): Add.
 973         * sh-dis.c (arch_sh2a): Handle.
 974         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
 975
 976 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
 977
 978         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
 979
 980 2004-07-22  Nick Clifton  <nickc@redhat.com>
 981
 982         PR/280
 983         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
 984         insns - this is done by objdump itself.
 985         * h8500-dis.c (print_insn_h8500): Likewise.
 986
 987 2004-07-21  Jan Beulich <jbeulich@novell.com>
 988
 989         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
 990         regardless of address size prefix in effect.
 991         (ptr_reg): Size or address registers does not depend on rex64, but
 992         on the presence of an address size override.
 993         (OP_MMX): Use rex.x only for xmm registers.
 994         (OP_EM): Use rex.z only for xmm registers.
 995
 996 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 997
 998         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
 999         move/branch operations to the bottom so that VR5400 multimedia
1000         instructions take precedence in disassembly.
1001
1002 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1003
1004         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1005         ISA-specific "break" encoding.
1006
1007 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
1008
1009         * arm-opc.h: Fix typo in comment.
1010
1011 2004-07-11  Andreas Schwab  <schwab@suse.de>
1012
1013         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1014
1015 2004-07-09  Andreas Schwab  <schwab@suse.de>
1016
1017         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1018
1019 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
1020
1021         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1022         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1023         (crx-dis.lo): New target.
1024         (crx-opc.lo): Likewise.
1025         * Makefile.in: Regenerate.
1026         * configure.in: Handle bfd_crx_arch.
1027         * configure: Regenerate.
1028         * crx-dis.c: New file.
1029         * crx-opc.c: New file.
1030         * disassemble.c (ARCH_crx): Define.
1031         (disassembler): Handle ARCH_crx.
1032
1033 2004-06-29  James E Wilson  <wilson@specifixinc.com>
1034
1035         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1036         * ia64-asmtab.c: Regnerate.
1037
1038 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
1039
1040         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1041         (extract_fxm): Don't test dialect.
1042         (XFXFXM_MASK): Include the power4 bit.
1043         (XFXM): Add p4 param.
1044         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
1045
1046 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
1047
1048         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
1049         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1050
1051 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
1052
1053         * ppc-opc.c (BH, XLBH_MASK): Define.
1054         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1055
1056 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
1057
1058         * i386-dis.c (x_mode): Comment.
1059         (two_source_ops): File scope.
1060         (float_mem): Correct fisttpll and fistpll.
1061         (float_mem_mode): New table.
1062         (dofloat): Use it.
1063         (OP_E): Correct intel mode PTR output.
1064         (ptr_reg): Use open_char and close_char.
1065         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
1066         operands.  Set two_source_ops.
1067
1068 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
1069
1070         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1071         instead of _raw_size.
1072
1073 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
1074
1075         * ia64-gen.c (in_iclass): Handle more postinc st
1076         and ld variants.
1077         * ia64-asmtab.c: Rebuilt.
1078
1079 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
1080
1081         * s390-opc.txt: Correct architecture mask for some opcodes.
1082         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1083         in the esa mode as well.
1084
1085 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
1086
1087         * sh-dis.c (target_arch): Make unsigned.
1088         (print_insn_sh): Replace (most of) switch with a call to
1089         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1090         * sh-opc.h: Redefine architecture flags values.
1091         Add sh3-nommu architecture.
1092         Reorganise <arch>_up macros so they make more visual sense.
1093         (SH_MERGE_ARCH_SET): Define new macro.
1094         (SH_VALID_BASE_ARCH_SET): Likewise.
1095         (SH_VALID_MMU_ARCH_SET): Likewise.
1096         (SH_VALID_CO_ARCH_SET): Likewise.
1097         (SH_VALID_ARCH_SET): Likewise.
1098         (SH_MERGE_ARCH_SET_VALID): Likewise.
1099         (SH_ARCH_SET_HAS_FPU): Likewise.
1100         (SH_ARCH_SET_HAS_DSP): Likewise.
1101         (SH_ARCH_UNKNOWN_ARCH): Likewise.
1102         (sh_get_arch_from_bfd_mach): Add prototype.
1103         (sh_get_arch_up_from_bfd_mach): Likewise.
1104         (sh_get_bfd_mach_from_arch_set): Likewise.
1105         (sh_merge_bfd_arc): Likewise.
1106
1107 2004-05-24  Peter Barada  <peter@the-baradas.com>
1108
1109         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1110         into new match_insn_m68k function.  Loop over canidate
1111         matches and select first that completely matches.
1112         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1113         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1114         to verify addressing for MAC/EMAC.
1115         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1116         reigster halves since 'fpu' and 'spl' look misleading.
1117         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1118         * m68k-opc.c: Rearragne mac/emac cases to use longest for
1119         first, tighten up match masks.
1120         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
1121         'size' from special case code in print_insn_m68k to
1122         determine decode size of insns.
1123
1124 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
1125
1126         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1127         well as when -mpower4.
1128
1129 2004-05-13  Nick Clifton  <nickc@redhat.com>
1130
1131         * po/fr.po: Updated French translation.
1132
1133 2004-05-05  Peter Barada  <peter@the-baradas.com>
1134
1135         * m68k-dis.c(print_insn_m68k): Add new chips, use core
1136         variants in arch_mask.  Only set m68881/68851 for 68k chips.
1137         * m68k-op.c: Switch from ColdFire chips to core variants.
1138
1139 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
1140
1141         PR 147.
1142         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1143
1144 2004-04-29  Ben Elliston  <bje@au.ibm.com>
1145
1146         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1147         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1148
1149 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
1150
1151         * sh-dis.c (print_insn_sh): Print the value in constant pool
1152         as a symbol if it looks like a symbol.
1153
1154 2004-04-22  Peter Barada <peter@the-baradas.com>
1155
1156         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1157         appropriate ColdFire architectures.
1158         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1159         mask addressing.
1160         Add EMAC instructions, fix MAC instructions. Remove
1161         macmw/macml/msacmw/msacml instructions since mask addressing now
1162         supported.
1163
1164 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
1165
1166         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1167         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1168         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
1169         macro.  Adjust all users.
1170
1171 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
1172
1173         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1174         separately.
1175
1176 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1177
1178         * m32r-asm.c: Regenerate.
1179
1180 2004-03-29  Stan Shebs  <shebs@apple.com>
1181
1182         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1183         used.
1184
1185 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
1186
1187         * aclocal.m4: Regenerate.
1188         * config.in: Regenerate.
1189         * configure: Regenerate.
1190         * po/POTFILES.in: Regenerate.
1191         * po/opcodes.pot: Regenerate.
1192
1193 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
1194
1195         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
1196         PPC_OPERANDS_GPR_0.
1197         * ppc-opc.c (RA0): Define.
1198         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1199         (RAOPT): Rename from RAO.  Update all uses.
1200         (powerpc_opcodes): Use RA0 as appropriate.
1201
1202 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
1203
1204         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1205
1206 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
1207
1208         * sparc-dis.c (print_insn_sparc): Update getword prototype.
1209
1210 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1211
1212         * i386-dis.c (GRPPLOCK): Delete.
1213         (grps): Delete GRPPLOCK entry.
1214
1215 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1216
1217         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1218         (M, Mp): Use OP_M.
1219         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1220         (GRPPADLCK): Define.
1221         (dis386): Use NOP_Fixup on "nop".
1222         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1223         (twobyte_has_modrm): Set for 0xa7.
1224         (padlock_table): Delete.  Move to..
1225         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
1226         and clflush.
1227         (print_insn): Revert PADLOCK_SPECIAL code.
1228         (OP_E): Delete sfence, lfence, mfence checks.
1229
1230 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
1231
1232         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1233         (INVLPG_Fixup): New function.
1234         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1235
1236 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1237
1238         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1239         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1240         (padlock_table): New struct with PadLock instructions.
1241         (print_insn): Handle PADLOCK_SPECIAL.
1242
1243 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1244
1245         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1246         (OP_E): Twiddle clflush to sfence here.
1247
1248 2004-03-08  Nick Clifton  <nickc@redhat.com>
1249
1250         * po/de.po: Updated German translation.
1251
1252 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
1253
1254         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1255         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
1256         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1257         accordingly.
1258
1259 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1260
1261         * frv-asm.c: Regenerate.
1262         * frv-desc.c: Regenerate.
1263         * frv-desc.h: Regenerate.
1264         * frv-dis.c: Regenerate.
1265         * frv-ibld.c: Regenerate.
1266         * frv-opc.c: Regenerate.
1267         * frv-opc.h: Regenerate.
1268
1269 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1270
1271         * frv-desc.c, frv-opc.c: Regenerate.
1272
1273 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1274
1275         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1276
1277 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
1278
1279         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1280         Also correct mistake in the comment.
1281
1282 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
1283
1284         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1285         ensure that double registers have even numbers.
1286         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1287         that reserved instruction 0xfffd does not decode the same
1288         as 0xfdfd (ftrv).
1289         * sh-opc.h: Add REG_N_D nibble type and use it whereever
1290         REG_N refers to a double register.
1291         Add REG_N_B01 nibble type and use it instead of REG_NM
1292         in ftrv.
1293         Adjust the bit patterns in a few comments.
1294
1295 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
1296
1297         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1298
1299 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1300
1301         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1302
1303 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1304
1305         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1306
1307 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1308
1309         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1310         mtivor32, mtivor33, mtivor34.
1311
1312 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
1313
1314         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1315
1316 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
1317
1318         * arm-opc.h Maverick accumulator register opcode fixes.
1319
1320 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
1321
1322         * m32r-dis.c: Regenerate.
1323
1324 2004-01-27  Michael Snyder  <msnyder@redhat.com>
1325
1326         * sh-opc.h (sh_table): "fsrra", not "fssra".
1327
1328 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
1329
1330         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1331         contraints.
1332
1333 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
1334
1335         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1336
1337 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
1338
1339         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1340         1.  Don't print scale factor on AT&T mode when index missing.
1341
1342 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
1343
1344         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1345         when loaded into XR registers.
1346
1347 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1348
1349         * frv-desc.h: Regenerate.
1350         * frv-desc.c: Regenerate.
1351         * frv-opc.c: Regenerate.
1352
1353 2004-01-13  Michael Snyder  <msnyder@redhat.com>
1354
1355         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1356
1357 2004-01-09  Paul Brook  <paul@codesourcery.com>
1358
1359         * arm-opc.h (arm_opcodes): Move generic mcrr after known
1360         specific opcodes.
1361
1362 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
1363
1364         * Makefile.am (libopcodes_la_DEPENDENCIES)
1365         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1366         comment about the problem.
1367         * Makefile.in: Regenerate.
1368
1369 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1370
1371         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1372         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1373         cut&paste errors in shifting/truncating numerical operands.
1374         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1375         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1376         (parse_uslo16): Likewise.
1377         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1378         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1379         (parse_s12): Likewise.
1380         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1381         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1382         (parse_uslo16): Likewise.
1383         (parse_uhi16): Parse gothi and gotfuncdeschi.
1384         (parse_d12): Parse got12 and gotfuncdesc12.
1385         (parse_s12): Likewise.
1386
1387 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1388
1389         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1390         instruction which looks similar to an 'rla' instruction.
1391
1392 For older changes see ChangeLog-0203
1393 \f
1394 Local Variables:
1395 mode: change-log
1396 left-margin: 8
1397 fill-column: 74
1398 version-control: never
1399 End: