x86: drop {X,Y,Z}MMWORD_MNEM_SUFFIX
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2018-03-08 Jan Beulich <jbeulich@suse.com>
2
3 * i386-opc.tbl (cmpxchg8b): Add NoRex64.
4 * i386-tlb.h: Re-generate.
5
6 2018-03-08 Jan Beulich <jbeulich@suse.com>
7
8 * i386-opc.tbl (cmpxchg16b, fisttp, fisttpll, bndmov, mwaitx):
9 Drop NoAVX.
10 * i386-tlb.h: Re-generate.
11
12 2018-03-08 Jan Beulich <jbeulich@suse.com>
13
14 * i386-opc.tbl (ldmxcsr, stmxcsr): Add NoAVX.
15 * i386-tlb.h: Re-generate.
16
17 2018-03-08 Jan Beulich <jbeulich@suse.com>
18
19 * i386-gen.c (opcode_modifiers): Delete FloatD.
20 * i386-opc.h (FloatD): Delete.
21 (struct i386_opcode_modifier): Delete floatd.
22 * i386-opc.tbl (fadd, fsub, fsubr, fmul, fdiv, fdivr): Replace
23 FloatD by D.
24 * i386-tlb.h: Re-generate.
25
26 2018-03-08 Jan Beulich <jbeulich@suse.com>
27
28 * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns.
29
30 2018-03-08 Jan Beulich <jbeulich@suse.com>
31
32 * i386-opc.tbl (vmovd): Disallow Qword memory operands.
33 * i386-tlb.h: Re-generate.
34
35 2018-03-08 Jan Beulich <jbeulich@suse.com>
36
37 * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
38 forms.
39 * i386-tlb.h: Re-generate.
40
41 2018-03-07 Alan Modra <amodra@gmail.com>
42
43 * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
44 bfd_arch_rs6000.
45 * disassemble.h (print_insn_rs6000): Delete.
46 * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
47 (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
48 (print_insn_rs6000): Delete.
49
50 2018-03-03 Alan Modra <amodra@gmail.com>
51
52 * sysdep.h (opcodes_error_handler): Define.
53 (_bfd_error_handler): Declare.
54 * Makefile.am: Remove stray #.
55 * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
56 EDIT" comment.
57 * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
58 * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
59 * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
60 opcodes_error_handler to print errors. Standardize error messages.
61 * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
62 and include opintl.h.
63 * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
64 * i386-gen.c: Standardize error messages.
65 * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
66 * Makefile.in: Regenerate.
67 * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
68 * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
69 * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
70 * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
71 * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
72 * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
73 * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
74 * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
75 * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
76 * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
77 * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
78 * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
79 * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
80
81 2018-03-01 H.J. Lu <hongjiu.lu@intel.com>
82
83 * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
84 vpsub[bwdq] instructions.
85 * i386-tbl.h: Regenerated.
86
87 2018-03-01 Alan Modra <amodra@gmail.com>
88
89 * configure.ac (ALL_LINGUAS): Sort.
90 * configure: Regenerate.
91
92 2018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
93
94 * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
95 macro by assignements.
96
97 2018-02-27 H.J. Lu <hongjiu.lu@intel.com>
98
99 PR gas/22871
100 * i386-gen.c (opcode_modifiers): Add Optimize.
101 * i386-opc.h (Optimize): New enum.
102 (i386_opcode_modifier): Add optimize.
103 * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
104 "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
105 "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
106 "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
107 vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
108 vpxord and vpxorq.
109 * i386-tbl.h: Regenerated.
110
111 2018-02-26 Alan Modra <amodra@gmail.com>
112
113 * crx-dis.c (getregliststring): Allocate a large enough buffer
114 to silence false positive gcc8 warning.
115
116 2018-02-22 Shea Levy <shea@shealevy.com>
117
118 * disassemble.c (ARCH_riscv): Define if ARCH_all.
119
120 2018-02-22 H.J. Lu <hongjiu.lu@intel.com>
121
122 * i386-opc.tbl: Add {rex},
123 * i386-tbl.h: Regenerated.
124
125 2018-02-20 Maciej W. Rozycki <macro@mips.com>
126
127 * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
128 (mips16_opcodes): Replace `M' with `m' for "restore".
129
130 2018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
131
132 * arm-dis.c (thumb_opcodes): Fix BXNS mask.
133
134 2018-02-13 Maciej W. Rozycki <macro@mips.com>
135
136 * wasm32-dis.c (print_insn_wasm32): Rename `index' local
137 variable to `function_index'.
138
139 2018-02-13 Nick Clifton <nickc@redhat.com>
140
141 PR 22823
142 * metag-dis.c (print_fmmov): Double buffer size to avoid warning
143 about truncation of printing.
144
145 2018-02-12 Henry Wong <henry@stuffedcow.net>
146
147 * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
148
149 2018-02-05 Nick Clifton <nickc@redhat.com>
150
151 * po/pt_BR.po: Updated Brazilian Portuguese translation.
152
153 2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
154
155 * i386-dis.c (enum): Add pconfig.
156 * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
157 (cpu_flags): Add CpuPCONFIG.
158 * i386-opc.h (enum): Add CpuPCONFIG.
159 (i386_cpu_flags): Add cpupconfig.
160 * i386-opc.tbl: Add PCONFIG instruction.
161 * i386-init.h: Regenerate.
162 * i386-tbl.h: Likewise.
163
164 2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
165
166 * i386-dis.c (enum): Add PREFIX_0F09.
167 * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
168 (cpu_flags): Add CpuWBNOINVD.
169 * i386-opc.h (enum): Add CpuWBNOINVD.
170 (i386_cpu_flags): Add cpuwbnoinvd.
171 * i386-opc.tbl: Add WBNOINVD instruction.
172 * i386-init.h: Regenerate.
173 * i386-tbl.h: Likewise.
174
175 2018-01-17 Jim Wilson <jimw@sifive.com>
176
177 * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
178
179 2018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
180
181 * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
182 Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
183 CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
184 (cpu_flags): Add CpuIBT, CpuSHSTK.
185 * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
186 (i386_cpu_flags): Add cpuibt, cpushstk.
187 * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
188 * i386-init.h: Regenerate.
189 * i386-tbl.h: Likewise.
190
191 2018-01-16 Nick Clifton <nickc@redhat.com>
192
193 * po/pt_BR.po: Updated Brazilian Portugese translation.
194 * po/de.po: Updated German translation.
195
196 2018-01-15 Jim Wilson <jimw@sifive.com>
197
198 * riscv-opc.c (match_c_nop): New.
199 (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
200
201 2018-01-15 Nick Clifton <nickc@redhat.com>
202
203 * po/uk.po: Updated Ukranian translation.
204
205 2018-01-13 Nick Clifton <nickc@redhat.com>
206
207 * po/opcodes.pot: Regenerated.
208
209 2018-01-13 Nick Clifton <nickc@redhat.com>
210
211 * configure: Regenerate.
212
213 2018-01-13 Nick Clifton <nickc@redhat.com>
214
215 2.30 branch created.
216
217 2018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
218
219 * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
220 * i386-tbl.h: Regenerate.
221
222 2018-01-10 Jan Beulich <jbeulich@suse.com>
223
224 * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
225 * i386-tbl.h: Re-generate.
226
227 2018-01-10 Jan Beulich <jbeulich@suse.com>
228
229 * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
230 vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
231 vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
232 vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
233 vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
234 Disp8MemShift of AVX512VL forms.
235 * i386-tbl.h: Re-generate.
236
237 2018-01-09 Jim Wilson <jimw@sifive.com>
238
239 * riscv-dis.c (maybe_print_address): If base_reg is zero,
240 then the hi_addr value is zero.
241
242 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
243
244 * arm-dis.c (arm_opcodes): Add csdb.
245 (thumb32_opcodes): Add csdb.
246
247 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
248
249 * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
250 * aarch64-asm-2.c: Regenerate.
251 * aarch64-dis-2.c: Regenerate.
252 * aarch64-opc-2.c: Regenerate.
253
254 2018-01-08 H.J. Lu <hongjiu.lu@intel.com>
255
256 PR gas/22681
257 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
258 Remove AVX512 vmovd with 64-bit operands.
259 * i386-tbl.h: Regenerated.
260
261 2018-01-05 Jim Wilson <jimw@sifive.com>
262
263 * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
264 jalr.
265
266 2018-01-03 Alan Modra <amodra@gmail.com>
267
268 Update year range in copyright notice of all files.
269
270 2018-01-02 Jan Beulich <jbeulich@suse.com>
271
272 * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
273 and OPERAND_TYPE_REGZMM entries.
274
275 For older changes see ChangeLog-2017
276 \f
277 Copyright (C) 2018 Free Software Foundation, Inc.
278
279 Copying and distribution of this file, with or without modification,
280 are permitted in any medium without royalty provided the copyright
281 notice and this notice are preserved.
282
283 Local Variables:
284 mode: change-log
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288 End:
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