opcodes/ChangeLog

   1 2006-12-11  Daniel Jacobowitz  <dan@codesourcery.com>
   2
   3         * po/Make-in (.po.gmo): Put gmo files in objdir.
   4
   5 2006-12-09  H.J. Lu  <hongjiu.lu@intel.com>
   6
   7         * i386-dis.c (X86_64_1): New.
   8         (X86_64_2): Likewise.
   9         (X86_64_3): Likewise.
  10         (dis386): Replace 0x60, 0x61 and 0x62 entries with x86-64
  11         tables.
  12         (x86_64_table): Add entries for 0x60, 0x61 and 0x62.
  13
  14 2006-12-09  H.J. Lu  <hongjiu.lu@intel.com>
  15
  16         * i386-dis.c: Adjust white spaces.
  17
  18 2006-12-04  Jan Beulich  <jbeulich@novell.com>
  19
  20         * i386-dis.c (OP_J): Update used_prefixes in v_mode.
  21
  22 2006-11-30  Jan Beulich  <jbeulich@novell.com>
  23
  24         * i386-dis.c (SEG_Fixup): Delete.
  25         (Sv): Use OP_SEG.
  26         (putop): New suffix character 'D'.
  27         (dis386): Use it.
  28         (grps): Likewise.
  29         (OP_SEG): Handle bytemode other than w_mode.
  30
  31 2006-11-30  Jan Beulich  <jbeulich@novell.com>
  32
  33         * i386-dis.c (zAX): New.
  34         (Xz): New.
  35         (Yzr): New.
  36         (z_mode): New.
  37         (z_mode_ax_reg): New.
  38         (putop): New suffix character 'G'.
  39         (dis386): Use it for in, out, ins, and outs.
  40         (intel_operand_size): Handle z_mode.
  41         (OP_REG): Delete unreachable case indir_dx_reg.
  42         (OP_IMREG): Fix Intel syntax output for case indir_dx_reg. Handle
  43         z_mode_ax_reg.
  44         (OP_ESreg): Fix Intel syntax operand size handling.
  45         (OP_DSreg): Likewise.
  46
  47 2006-11-30  Jan Beulich  <jbeulich@novell.com>
  48
  49         * i386-dis.c (dis386): Use 'R' and 'O' for cbw/cwd unconditionally.
  50         (putop): For 'O' suffix, print 'q' in Intel mode, and mark data prefix
  51         used. For 'R' and 'W' suffix, simplify and fix Intel mode.
  52
  53 2006-11-29  Paul Brook  <paul@codesourcery.com>
  54
  55         * arm-dis.c (coprocessor_opcodes): Fix bitfields for fconstd/fconstd.
  56
  57 2006-11-22  Daniel Jacobowitz  <dan@codesourcery.com>
  58
  59         * arm-dis.c (last_is_thumb): Delete.
  60         (enum map_type, last_type): New.
  61         (print_insn_data): New.
  62         (get_sym_code_type): Take MAP_TYPE argument.  Check the type of
  63         the right symbol.  Handle $d.
  64         (print_insn): Check for mapping symbols even without a normal
  65         symbol.  Adjust searching.  If $d is found see how much data
  66         to print.  Handle data.
  67
  68 2006-11-16  Nathan Sidwell  <nathan@codesourcery.com>
  69
  70         * m68k-opc.c (m68k_opcodes): Place trap instructions before set
  71         conditionals.  Add tpf coldfire instruction as alias for trapf.
  72
  73 2006-11-09  H.J. Lu  <hongjiu.lu@intel.com>
  74
  75         * i386-dis.c (print_insn): Check PREFIX_REPNZ before
  76         PREFIX_DATA when prefix user table is used.
  77
  78 2006-11-09  H.J. Lu  <hongjiu.lu@intel.com>
  79
  80         * i386-dis.c (twobyte_uses_SSE_prefix): Renamed to ...
  81         (twobyte_uses_DATA_prefix): This.
  82         (twobyte_uses_REPNZ_prefix): New.
  83         (twobyte_uses_REPZ_prefix): Likewise.
  84         (threebyte_0x38_uses_DATA_prefix): Likewise.
  85         (threebyte_0x38_uses_REPNZ_prefix): Likewise.
  86         (threebyte_0x38_uses_REPZ_prefix): Likewise.
  87         (threebyte_0x3a_uses_DATA_prefix): Likewise.
  88         (threebyte_0x3a_uses_REPNZ_prefix): Likewise.
  89         (threebyte_0x3a_uses_REPZ_prefix): Likewise.
  90         (print_insn): Updated checking usages of DATA/REPNZ/REPZ
  91         prefixes.
  92
  93 2006-11-06  Troy Rollo  <troy@corvu.com.au>
  94
  95         * ppc-opc.c: Restore COM to mfcr wrongly removed 2003-07-04.
  96
  97 2006-11-01  Mei Ligang  <ligang@sunnorth.com.cn>
  98
  99         * score-opc.h (score_opcodes): Delete modifier '0x'.
 100
 101 2006-10-30  Paul Brook  <paul@codesourcery.com>
 102
 103         * arm-dis.c (last_is_thumb, last_mapping_sym, last_mapping_addr): New.
 104         (get_sym_code_type): New function.
 105         (print_insn): Search for mapping symbols.
 106
 107 2006-10-31  Mei Ligang  <ligang@sunnorth.com.cn>
 108
 109         * score-dis.c (print_insn): Correct the error code to print
 110         correct PCE instruction disassembly.
 111
 112 2006-10-26  Ben Elliston  <bje@au.ibm.com>
 113             Anton Blanchard  <anton@samba.org>
 114             Peter Bergner  <bergner@vnet.ibm.com>
 115
 116         * ppc-opc.c (A_L, DCM, DGM, TE, RMC, R, SP, S, SH16, XRT_L, EH,
 117         AFRALFRC_MASK, Z, ZRC, Z_MASK, XLRT_MASK, XEH_MASK): Define.
 118         (POWER6): Define.
 119         (powerpc_opcodes): Extend "lwarx", "ldarx", "dcbf", "fres", "fres.",
 120         "frsqrtes", "frsqrtes." "fre", "fre.", "frsqrte" and "frsqrte.".
 121         Add "doze", "nap", "sleep", "rvwinkle", "dcbfl", "prtyw", "prtyd",
 122         "mfcfar", "cmpb", "lfdpx", "stfdpx", "mtcfar", "mffgpr", "mftgpr",
 123         "lwzcix", "lhzcix", "lbzcix", "ldcix", "lfiwax", "stwcix", "sthcix",
 124         "stbcix", "stdcix", "lfdp", "dadd", "dadd.", "dqua", "dqua.", "dmul",
 125         "dmul.", "drrnd", "drrnd.", "dscli", "dscli.", "dquai", "dquai.",
 126         "dscri", "dscri.", "drintx", "drintx.", "dcmpo", "dtstex", "dtstdc",
 127         "dtstdg", "dtstsf", "drintn", "drintn.", "dctdp", "dctdp.", "dctfix",
 128         "dctfix.", "ddedpd", "ddedpd.", "dxex", "dxex.", "dsub", "dsub.",
 129         "ddiv", "ddiv.", "dcmpu", "drsp", "drsp.", "dcffix", "dcffix.",
 130         "denbcd", "denbcd.", "diex", "diex.", "stfdp", "daddq", "daddq.",
 131         "dquaq", "dquaq.", "fcpsgn", "fcpsgn.", "dmulq", "dmulq.",
 132         "drrndq", "drrndq.", "dscliq", "dscliq.", "dquaiq", "dquaiq.",
 133         "dscriq", "dscriq.", "drintxq", "drintxq.", "dcmpoq", "dtstexq",
 134         "dtstdcq", "dtstdgq", "dtstsfq", "drintnq", "drintnq.",
 135         "dctqpq", "dctqpq.", "dctfixq", "dctfixq.", "ddedpdq", "ddedpdq.",
 136         "dxexq", "dxexq.", "dsubq", "dsubq.", "ddivq", "ddivq.", "dcmpuq",
 137         "drdpq", "drdpq.", "dcffixq", "dcffixq.", "denbcdq", "denbcdq.",
 138         "diexq" and "diexq." opcodes.
 139
 140 2006-10-26  Daniel Jacobowitz  <dan@codesourcery.com>
 141
 142         * h8300-dis.c (bfd_h8_disassemble): Add missing consts.
 143
 144 2006-10-25  Trevor Smigiel  <Trevor_Smigiel@playstation.sony.com>
 145             Yukishige Shibata  <shibata@rd.scei.sony.co.jp>
 146             Nobuhisa Fujinami  <fnami@rd.scei.sony.co.jp>
 147             Takeaki Fukuoka  <fukuoka@rd.scei.sony.co.jp>
 148             Alan Modra  <amodra@bigpond.net.au>
 149
 150         * spu-dis.c: New file.
 151         * spu-opc.c: New file.
 152         * configure.in: Add SPU support.
 153         * disassemble.c: Likewise.
 154         * Makefile.am: Likewise.  Run "make dep-am".
 155         * Makefile.in: Regenerate.
 156         * configure: Regenerate.
 157         * po/POTFILES.in: Regenerate.
 158
 159 2006-10-24  Andrew Pinski  <andrew_pinski@playstation.sony.com>
 160
 161         * ppc-opc.c (CELL): New define.
 162         (powerpc_opcodes): Enable hrfid for Cell.  Add ldbrx and stdbrx,
 163         cell specific instructions.  Add {st,l}x{r,l}{,l} cell specific
 164         VMX instructions.
 165         * ppc-dis.c (powerpc_dialect): Handle cell.
 166
 167 2006-10-23  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
 168
 169         * i386-dis.c (dis386): Add support for the change in POPCNT opcode in
 170         amdfam10 architecture.
 171         (PREGRP37): NEW.
 172         (print_insn): Disallow REP prefix for POPCNT.
 173
 174 2006-10-20  Andrew Stubbs  <andrew.stubbs@st.com>
 175
 176         * sh-dis.c (print_insn_sh): Remove 0x from output to prevent GDB
 177         duplicating it.
 178
 179 2006-10-18  Dave Brolley  <brolley@redhat.com>
 180
 181         * configure.in (BFD_MACHINES): Add cgen-bitset.lo for bfd_sh_arch.
 182         * configure: Regenerated.
 183
 184 2006-09-29  Alan Modra  <amodra@bigpond.net.au>
 185
 186         * po/POTFILES.in: Regenerate.
 187
 188 2006-09-26  Mark Shinwell  <shinwell@codesourcery.com>
 189             Joseph Myers  <joseph@codesourcery.com>
 190             Ian Lance Taylor  <ian@wasabisystems.com>
 191             Ben Elliston  <bje@wasabisystems.com>
 192
 193         * arm-dis.c (coprocessor_opcodes): The X-qualifier to WMADD may
 194         only be used with the default multiply-add operation, so if N is
 195         set, don't bother printing X.  Add new iwmmxt instructions.
 196         (IWMMXT_INSN_COUNT): Update.
 197         (iwmmxt_wwssnames): Qualify "wwss" names at index 2, 6, 10 and 14
 198         with a 'c' suffix.
 199         (print_insn_coprocessor): Check for iWMMXt2.  Handle format
 200         specifiers 'r', 'i'.
 201
 202 2006-09-24  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
 203
 204         PR binutils/3100
 205         * i386-dis.c (prefix_user_table): Fix the second operand of
 206         maskmovdqu instruction to allow only %xmm register instead of
 207         both %xmm register and memory.
 208
 209 2006-09-23  H.J. Lu  <hongjiu.lu@intel.com>
 210
 211         PR binutils/3235
 212         * i386-dis.c (OP_OFF64): Get 32bit offset if there is an
 213         address size prefix.
 214
 215 2006-09-17  Mei Ligang  <ligang@sunnorth.com.cn>
 216
 217         * score-dis.c: New file.
 218         * score-opc.h: New file.
 219         * Makefile.am: Add Score files.
 220         * Makefile.in: Regenerate.
 221         * configure.in: Add support for Score target.
 222         * configure: Regenerate.
 223         * disassemble.c: Add support for Score target.
 224
 225 2006-09-16  Nick Clifton  <nickc@redhat.com>
 226             Pedro Alves  <pedro_alves@portugalmail.pt>
 227
 228         * arm-dis.c: Make use of new STRING_COMMA_LEN and CONST_STRNEQ
 229         macros defined in bfd.h.
 230         * cris-dis.c: Likewise.
 231         * h8300-dis.c: Likewise.
 232         * i386-dis.c: Likewise.
 233         * ia64-gen.c: Likewise.
 234         * mips-dis: Likewise.
 235
 236 2006-09-04  Paul Brook  <paul@codesourcery.com>
 237
 238         * arm-dis.c (neon_opcode): Fix suffix on VMOVN.
 239
 240 2006-08-23  H.J. Lu  <hongjiu.lu@intel.com>
 241
 242         * i386-dis.c (three_byte_table): Expand to 256 elements.
 243
 244 2006-08-04  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
 245
 246         PR binutils/3000
 247         * i386-dis.c (MXC,EMC): Define.
 248         (OP_MXC): New function to handle cvt* (convert instructions) between
 249         %xmm and %mm register correctly.
 250         (OP_EMC): ditto.
 251         (prefix_user_table): Modified cvtpi2pd,cvtpd2pi and cvttpd2pi
 252         instruction operands in PREGRP2,PREGRP3,PREGRP4 appropriately
 253         with EMC/MXC.
 254
 255 2006-07-29  Richard Sandiford  <richard@codesourcery.com>
 256
 257         * m68k-opc.c (m68k_opcodes): Fix operand specificer in the Coldfire
 258         "fdaddl" entry.
 259
 260 2006-07-19  Paul Brook  <paul@codesourcery.com>
 261
 262         * armd-dis.c (arm_opcodes): Fix rbit opcode.
 263
 264 2006-07-18  H.J. Lu  <hongjiu.lu@intel.com>
 265
 266         * i386-dis.c (grps): Change "sldtQ", "strQ" and "smswQ" to
 267         "sldt", "str" and "smsw".
 268
 269 2006-07-15  H.J. Lu  <hongjiu.lu@intel.com>
 270
 271         PR binutils/2829
 272         * i386-dis.c (GRP11_C6): NEW.
 273         (GRP11_C7): Likewise.
 274         (GRP12): Updated.
 275         (GRP13): Likewise.
 276         (GRP14): Likewise.
 277         (GRP15): Likewise.
 278         (GRP16): Likewise.
 279         (GRPAMD): Likewise.
 280         (GRPPADLCK1): Likewise.
 281         (GRPPADLCK2): Likewise.
 282         (dis386): Use GRP11_C6 and GRP11_C7 for entres 0xc6 and 0xc7,
 283         respectively.
 284         (grps): Add entries for GRP11_C6 and GRP11_C7.
 285
 286 2006-07-10 Dwarakanath Rajagopal        <dwarak.rajagopal@amd.com>
 287            Michael Meissner             <michael.meissner@amd.com>
 288
 289         * i386-dis.c (dis386): Add support for 4 operand instructions. Add
 290         support for amdfam10 SSE4a/ABM instructions. Modify all
 291         initializer macros to have additional arguments. Disallow REP
 292         prefix for non-string instructions.
 293         (print_insn): Ditto.
 294
 295 2006-07-05  Julian Brown  <julian@codesourcery.com>
 296
 297         * arm-dis.c (coprocessor): Alter fmsrr disassembly syntax.
 298
 299 2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>
 300
 301         * i386-dis.c (dis386_twobyte): Use "nopQ" for 0x1f.
 302         (twobyte_has_modrm): Set 1 for 0x1f.
 303
 304 2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>
 305
 306         * i386-dis.c (NOP_Fixup): Removed.
 307         (NOP_Fixup1): New.
 308         (NOP_Fixup2): Likewise.
 309         (dis386): Use NOP_Fixup1 and NOP_Fixup2 on 0x90.
 310
 311 2006-06-12  Julian Brown  <julian@codesourcery.com>
 312
 313         * arm-dis.c (print_insn_neon): Disassemble 32-bit immediates as signed
 314         on 64-bit hosts.
 315
 316 2006-06-10  H.J. Lu  <hongjiu.lu@intel.com>
 317
 318         * i386.c (GRP10): Renamed to ...
 319         (GRP12): This.
 320         (GRP11): Renamed to ...
 321         (GRP13): This.
 322         (GRP12): Renamed to ...
 323         (GRP14): This.
 324         (GRP13): Renamed to ...
 325         (GRP15): This.
 326         (GRP14): Renamed to ...
 327         (GRP16): This.
 328         (dis386_twobyte): Updated.
 329         (grps): Likewise.
 330
 331 2006-06-09  Nick Clifton  <nickc@redhat.com>
 332
 333         * po/fi.po: Updated Finnish translation.
 334
 335 2006-06-07  Joseph S. Myers  <joseph@codesourcery.com>
 336
 337         * po/Make-in (pdf, ps): New dummy targets.
 338
 339 2006-06-06  Paul Brook  <paul@codesourcery.com>
 340
 341         * arm-dis.c (coprocessor_opcodes): Add %c to unconditional arm
 342         instructions.
 343         (neon_opcodes): Add conditional execution specifiers.
 344         (thumb_opcodes): Ditto.
 345         (thumb32_opcodes): Ditto.
 346         (arm_conditional): Change 0xe to "al" and add "" to end.
 347         (ifthen_state, ifthen_next_state, ifthen_address): New.
 348         (IFTHEN_COND): Define.
 349         (print_insn_coprocessor, print_insn_neon): Print thumb conditions.
 350         (print_insn_arm): Change %c to use new values of arm_conditional.
 351         (print_insn_thumb16): Print thumb conditions.  Add %I.
 352         (print_insn_thumb32): Print thumb conditions.
 353         (find_ifthen_state): New function.
 354         (print_insn): Track IT block state.
 355
 356 2006-06-06  Ben Elliston  <bje@au.ibm.com>
 357             Anton Blanchard  <anton@samba.org>
 358             Peter Bergner  <bergner@vnet.ibm.com>
 359
 360         * ppc-dis.c (powerpc_dialect): Handle power6 option.
 361         (print_ppc_disassembler_options): Mention power6.
 362
 363 2006-06-06  Thiemo Seufer  <ths@mips.com>
 364             Chao-ying Fu  <fu@mips.com>
 365
 366         * mips-dis.c: Disassemble DSP64 instructions for MIPS64R2.
 367         * mips-opc.c: Add DSP64 instructions.
 368
 369 2006-06-06  Alan Modra  <amodra@bigpond.net.au>
 370
 371         * m68hc11-dis.c (print_insn): Warning fix.
 372
 373 2006-06-05  Daniel Jacobowitz  <dan@codesourcery.com>
 374
 375         * po/Make-in (top_builddir): Define.
 376
 377 2006-06-05  Alan Modra  <amodra@bigpond.net.au>
 378
 379         * Makefile.am: Run "make dep-am".
 380         * Makefile.in: Regenerate.
 381         * config.in: Regenerate.
 382
 383 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
 384
 385         * Makefile.am (INCLUDES): Use @INCINTL@.
 386         * acinclude.m4: Include new gettext macros.
 387         * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
 388         Remove local code for po/Makefile.
 389         * Makefile.in, aclocal.m4, configure: Regenerated.
 390
 391 2006-05-30  Nick Clifton  <nickc@redhat.com>
 392
 393         * po/es.po: Updated Spanish translation.
 394
 395 2006-05-25  Richard Sandiford  <richard@codesourcery.com>
 396
 397         * m68k-opc.c (m68k_opcodes): Fix the masks of the Coldfire fmovemd
 398         and fmovem entries.  Put register list entries before immediate
 399         mask entries.  Use "l" rather than "L" in the fmovem entries.
 400         * m68k-dis.c (match_insn_m68k): Remove the PRIV argument and work it
 401         out from INFO.
 402         (m68k_scan_mask): New function, split out from...
 403         (print_insn_m68k): ...here.  If no architecture has been set,
 404         first try printing an m680x0 instruction, then try a Coldfire one.
 405
 406 2006-05-24  Nick Clifton  <nickc@redhat.com>
 407
 408         * po/ga.po: Updated Irish translation.
 409
 410 2006-05-22  Nick Clifton  <nickc@redhat.com>
 411
 412         * crx-dis.c (EXTRACT): Make macro work on 64-bit hosts.
 413
 414 2006-05-22  Nick Clifton  <nickc@redhat.com>
 415
 416         * po/nl.po: Updated translation.
 417
 418 2006-05-18  Alan Modra  <amodra@bigpond.net.au>
 419
 420         * avr-dis.c: Formatting fix.
 421
 422 2006-05-14  Thiemo Seufer  <ths@mips.com>
 423
 424         * mips16-opc.c (I1, I32, I64): New shortcut defines.
 425         (mips16_opcodes): Change membership of instructions to their
 426         lowest baseline ISA.
 427
 428 2006-05-09  H.J. Lu  <hongjiu.lu@intel.com>
 429
 430         * i386-dis.c (grps): Update sgdt/sidt for 64bit.
 431
 432 2006-05-05  Julian Brown  <julian@codesourcery.com>
 433
 434         * arm-dis.c (coprocessor_opcodes): Don't interpret fldmx/fstmx as
 435         vldm/vstm.
 436
 437 2006-05-05  Thiemo Seufer  <ths@mips.com>
 438             David Ung  <davidu@mips.com>
 439
 440         * mips-opc.c: Add macro for cache instruction.
 441
 442 2006-05-04  Thiemo Seufer  <ths@mips.com>
 443             Nigel Stephens  <nigel@mips.com>
 444             David Ung  <davidu@mips.com>
 445
 446         * mips-dis.c (mips_arch_choices): Add smartmips instruction
 447         decoding to MIPS32 and MIPS32R2.  Limit DSP decoding to release
 448         2 ISAs.  Add MIPS3D decoding to MIPS32R2.  Add MT decoding to
 449         MIPS64R2.
 450         * mips-opc.c: fix random typos in comments.
 451         (INSN_SMARTMIPS): New defines.
 452         (mips_builtin_opcodes): Add paired single support for MIPS32R2.
 453         Move bc3f, bc3fl, bc3t, bc3tl downwards.  Move flushi, flushd,
 454         flushid, wb upwards.  Move cfc3, ctc3 downwards.  Rework the
 455         FP_S and FP_D flags to denote single and double register
 456         accesses separately.  Move dmfc3, dmtc3, mfc3, mtc3 downwards.
 457         Allow jr.hb and jalr.hb for release 1 ISAs.  Allow luxc1, suxc1
 458         for MIPS32R2.  Add SmartMIPS instructions.  Add two-argument
 459         variants of bc2f, bc2fl, bc2t, bc2tl.  Add mfhc2, mthc2 to
 460         release 2 ISAs.
 461         * mips16-opc.c (mips16_opcodes): Add sdbbp instruction.
 462
 463 2006-05-03  Thiemo Seufer  <ths@mips.com>
 464
 465         * mips-opc.c (mips_builtin_opcodes): Fix mftr argument order.
 466
 467 2006-05-02  Thiemo Seufer  <ths@mips.com>
 468             Nigel Stephens  <nigel@mips.com>
 469             David Ung  <davidu@mips.com>
 470
 471         * mips-dis.c (print_insn_args): Force mips16 to odd addresses.
 472         (print_mips16_insn_arg): Force mips16 to odd addresses.
 473
 474 2006-04-30  Thiemo Seufer  <ths@mips.com>
 475             David Ung  <davidu@mips.com>
 476
 477         * mips-opc.c (mips_builtin_opcodes): Add udi instructions
 478         "udi0" to "udi15".
 479         * mips-dis.c (print_insn_args): Adds udi argument handling.
 480
 481 2006-04-28  James E Wilson  <wilson@specifix.com>
 482
 483         * m68k-dis.c (match_insn_m68k): Restore fprintf_func before printing
 484         error message.
 485
 486 2006-04-28  Thiemo Seufer  <ths@mips.com>
 487             David Ung  <davidu@mips.com>
 488             Nigel Stephens  <nigel@mips.com>
 489
 490         * mips-dis.c (mips_cp0sel_names_mips3264r2): Add MT register
 491         names.
 492
 493 2006-04-28  Thiemo Seufer  <ths@mips.com>
 494             Nigel Stephens  <nigel@mips.com>
 495             David Ung  <davidu@mips.com>
 496
 497         * mips-dis.c (print_insn_args): Add mips_opcode argument.
 498         (print_insn_mips):  Adjust print_insn_args call.
 499
 500 2006-04-28  Thiemo Seufer  <ths@mips.com>
 501             Nigel Stephens  <nigel@mips.com>
 502
 503         * mips-dis.c (print_insn_args): Print $fcc only for FP
 504         instructions, use $cc elsewise.
 505
 506 2006-04-28  Thiemo Seufer  <ths@mips.com>
 507             Nigel Stephens  <nigel@mips.com>
 508
 509         * opcodes/mips-dis.c (mips16_to_32_reg_map, mips16_reg_names):
 510         Map MIPS16 registers to O32 names.
 511         (print_mips16_insn_arg): Use mips16_reg_names.
 512
 513 2006-04-26  Julian Brown  <julian@codesourcery.com>
 514
 515         * arm-dis.c (print_insn_neon): Disassemble floating-point constant
 516         VMOV.
 517
 518 2006-04-26  Nathan Sidwell  <nathan@codesourcery.com>
 519             Julian Brown  <julian@codesourcery.com>
 520
 521         * opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert
 522         %<code>[zy] into %[zy]<code>.  Expand meaning of %<bitfield>['`?].
 523         Add unified load/store instruction names.
 524         (neon_opcode_table): New.
 525         (arm_opcodes): Expand meaning of %<bitfield>['`?].
 526         (arm_decode_bitfield): New.
 527         (print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
 528         Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
 529         (print_insn_neon): New.
 530         (print_insn_arm): Adjust print_insn_coprocessor call. Call
 531         print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
 532         (print_insn_thumb32): Likewise.
 533
 534 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 535
 536         * Makefile.am: Run "make dep-am".
 537         * Makefile.in: Regenerate.
 538
 539 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 540
 541         * avr-dis.c (avr_operand): Warning fix.
 542
 543         * configure: Regenerate.
 544
 545 2006-04-16  Daniel Jacobowitz  <dan@codesourcery.com>
 546
 547         * po/POTFILES.in: Regenerated.
 548
 549 2006-04-12   Hochstein  <hochstein@algo.informatik.tu-darmstadt.de>
 550
 551         PR binutils/2454
 552         * avr-dis.c (avr_operand): Arrange for a comment to appear before
 553         the symolic form of an address, so that the output of objdump -d
 554         can be reassembled.
 555
 556 2006-04-10  DJ Delorie  <dj@redhat.com>
 557
 558         * m32c-asm.c: Regenerate.
 559
 560 2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>
 561
 562         * Makefile.am: Add install-html target.
 563         * Makefile.in: Regenerate.
 564
 565 2006-04-06  Nick Clifton  <nickc@redhat.com>
 566
 567         * po/vi/po: Updated Vietnamese translation.
 568
 569 2006-03-31  Paul Koning  <ni1d@arrl.net>
 570
 571         * pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.
 572
 573 2006-03-16  Bernd Schmidt  <bernd.schmidt@analog.com>
 574
 575         * bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
 576         logic to identify halfword shifts.
 577
 578 2006-03-16  Paul Brook  <paul@codesourcery.com>
 579
 580         * arm-dis.c (arm_opcodes): Rename swi to svc.
 581         (thumb_opcodes): Ditto.
 582
 583 2006-03-13  DJ Delorie  <dj@redhat.com>
 584
 585         * m32c-asm.c: Regenerate.
 586         * m32c-desc.c: Likewise.
 587         * m32c-desc.h: Likewise.
 588         * m32c-dis.c: Likewise.
 589         * m32c-ibld.c: Likewise.
 590         * m32c-opc.c: Likewise.
 591         * m32c-opc.h: Likewise.
 592
 593 2006-03-10  DJ Delorie  <dj@redhat.com>
 594
 595         * m32c-desc.c: Regenerate with mul.l, mulu.l.
 596         * m32c-opc.c: Likewise.
 597         * m32c-opc.h: Likewise.
 598
 599
 600 2006-03-09  Nick Clifton  <nickc@redhat.com>
 601
 602         * po/sv.po: Updated Swedish translation.
 603
 604 2006-03-07  H.J. Lu  <hongjiu.lu@intel.com>
 605
 606         PR binutils/2428
 607         * i386-dis.c (REP_Fixup): New function.
 608         (AL): Remove duplicate.
 609         (Xbr): New.
 610         (Xvr): Likewise.
 611         (Ybr): Likewise.
 612         (Yvr): Likewise.
 613         (indirDXr): Likewise.
 614         (ALr): Likewise.
 615         (eAXr): Likewise.
 616         (dis386): Updated entries of ins, outs, movs, lods and stos.
 617
 618 2006-03-05  Nick Clifton  <nickc@redhat.com>
 619
 620         * cgen-ibld.in (insert_normal): Cope with attempts to insert a
 621         signed 32-bit value into an unsigned 32-bit field when the host is
 622         a 64-bit machine.
 623         * fr30-ibld.c: Regenerate.
 624         * frv-ibld.c: Regenerate.
 625         * ip2k-ibld.c: Regenerate.
 626         * iq2000-asm.c: Regenerate.
 627         * iq2000-ibld.c: Regenerate.
 628         * m32c-ibld.c: Regenerate.
 629         * m32r-ibld.c: Regenerate.
 630         * openrisc-ibld.c: Regenerate.
 631         * xc16x-ibld.c: Regenerate.
 632         * xstormy16-ibld.c: Regenerate.
 633
 634 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
 635
 636         * xc16x-asm.c: Regenerate.
 637         * xc16x-dis.c: Regenerate.
 638
 639 2006-02-27  Carlos O'Donell  <carlos@codesourcery.com>
 640
 641         * po/Make-in: Add html target.
 642
 643 2006-02-27  H.J. Lu <hongjiu.lu@intel.com>
 644
 645         * i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
 646         Intel Merom New Instructions.
 647         (THREE_BYTE_0): Likewise.
 648         (THREE_BYTE_1): Likewise.
 649         (three_byte_table): Likewise.
 650         (dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
 651         THREE_BYTE_1 for entry 0x3a.
 652         (twobyte_has_modrm): Updated.
 653         (twobyte_uses_SSE_prefix): Likewise.
 654         (print_insn): Handle 3-byte opcodes used by Intel Merom New
 655         Instructions.
 656
 657 2006-02-24  David S. Miller  <davem@sunset.davemloft.net>
 658
 659         * sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
 660         (v9_hpriv_reg_names): New table.
 661         (print_insn_sparc): Allow values up to 16 for '?' and '!'.
 662         New cases '$' and '%' for read/write hyperprivileged register.
 663         * sparc-opc.c (sparc_opcodes): Add new entries for UA2005
 664         window handling and rdhpr/wrhpr instructions.
 665
 666 2006-02-24  DJ Delorie  <dj@redhat.com>
 667
 668         * m32c-desc.c: Regenerate with linker relaxation attributes.
 669         * m32c-desc.h: Likewise.
 670         * m32c-dis.c: Likewise.
 671         * m32c-opc.c: Likewise.
 672
 673 2006-02-24  Paul Brook  <paul@codesourcery.com>
 674
 675         * arm-dis.c (arm_opcodes): Add V7 instructions.
 676         (thumb32_opcodes): Ditto.  Handle V7M MSR/MRS variants.
 677         (print_arm_address): New function.
 678         (print_insn_arm): Use it.  Add 'P' and 'U' cases.
 679         (psr_name): New function.
 680         (print_insn_thumb32): Add 'U', 'C' and 'D' cases.
 681
 682 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 683
 684         * ia64-opc-i.c (bXc): New.
 685         (mXc): Likewise.
 686         (OpX2TaTbYaXcC): Likewise.
 687         (TF). Likewise.
 688         (TFCM). Likewise.
 689         (ia64_opcodes_i): Add instructions for tf.
 690
 691         * ia64-opc.h (IMMU5b): New.
 692
 693         * ia64-asmtab.c: Regenerated.
 694
 695 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 696
 697         * ia64-gen.c: Update copyright years.
 698         * ia64-opc-b.c: Likewise.
 699
 700 2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>
 701
 702         * ia64-gen.c (lookup_regindex): Handle ".vm".
 703         (print_dependency_table): Handle '\"'.
 704
 705         * ia64-ic.tbl: Updated from SDM 2.2.
 706         * ia64-raw.tbl: Likewise.
 707         * ia64-waw.tbl: Likewise.
 708         * ia64-asmtab.c: Regenerated.
 709
 710         * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
 711
 712 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 713             Anil Paranjape   <anilp1@kpitcummins.com>
 714             Shilin Shakti    <shilins@kpitcummins.com>
 715
 716         * xc16x-desc.h: New file
 717         * xc16x-desc.c: New file
 718         * xc16x-opc.h: New file
 719         * xc16x-opc.c: New file
 720         * xc16x-ibld.c: New file
 721         * xc16x-asm.c: New file
 722         * xc16x-dis.c: New file
 723         * Makefile.am: Entries for xc16x
 724         * Makefile.in: Regenerate
 725         * cofigure.in: Add xc16x target information.
 726         * configure: Regenerate.
 727         * disassemble.c: Add xc16x target information.
 728
 729 2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 730
 731         * i386-dis.c (dis386_twobyte): Use "movZ" for debug register
 732         moves.
 733
 734 2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 735
 736         * i386-dis.c ('Z'): Add a new macro.
 737         (dis386_twobyte): Use "movZ" for control register moves.
 738
 739 2006-02-10  Nick Clifton  <nickc@redhat.com>
 740
 741         * iq2000-asm.c: Regenerate.
 742
 743 2006-02-07  Nathan Sidwell  <nathan@codesourcery.com>
 744
 745         * m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
 746
 747 2006-01-26  David Ung  <davidu@mips.com>
 748
 749         * mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
 750         ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
 751         floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
 752         nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
 753         rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
 754
 755 2006-01-18  Arnold Metselaar  <arnoldm@sourceware.org>
 756
 757         * z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
 758         ld_d_r, pref_xd_cb): Use signed char to hold data to be
 759         disassembled.
 760         * z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
 761         buffer overflows when disassembling instructions like
 762         ld (ix+123),0x23
 763         * z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
 764         operand, if the offset is negative.
 765
 766 2006-01-17  Arnold Metselaar  <arnoldm@sourceware.org>
 767
 768         * z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
 769         unsigned char to hold data to be disassembled.
 770
 771 2006-01-17  Andreas Schwab  <schwab@suse.de>
 772
 773         PR binutils/1486
 774         * disassemble.c (disassemble_init_for_target): Set
 775         disassembler_needs_relocs for bfd_arch_arm.
 776
 777 2006-01-16  Paul Brook  <paul@codesourcery.com>
 778
 779         * m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
 780         f?add?, and f?sub? instructions.
 781
 782 2006-01-16  Nick Clifton  <nickc@redhat.com>
 783
 784         * po/zh_CN.po: New Chinese (simplified) translation.
 785         * configure.in (ALL_LINGUAS): Add "zh_CH".
 786         * configure: Regenerate.
 787
 788 2006-01-05  Paul Brook  <paul@codesourcery.com>
 789
 790         * m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
 791
 792 2006-01-06  DJ Delorie  <dj@redhat.com>
 793
 794         * m32c-desc.c: Regenerate.
 795         * m32c-opc.c: Regenerate.
 796         * m32c-opc.h: Regenerate.
 797
 798 2006-01-03  DJ Delorie  <dj@redhat.com>
 799
 800         * cgen-ibld.in (extract_normal): Avoid memory range errors.
 801         * m32c-ibld.c: Regenerated.
 802
 803 For older changes see ChangeLog-2005
 804 \f
 805 Local Variables:
 806 mode: change-log
 807 left-margin: 8
 808 fill-column: 74
 809 version-control: never
 810 End: