[BINUTILS, AArch64, 1/2] Add new LDGM/STGM instruction
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2019-04-11 Sudakshina Das <sudi.das@arm.com>
2
3 * aarch64-asm-2.c: Regenerated.
4 * aarch64-dis-2.c: Likewise.
5 * aarch64-opc-2.c: Likewise.
6 * aarch64-tbl.h (aarch64_opcode): Add new ldgm and stgm.
7
8 2019-04-09 Robert Suchanek <robert.suchanek@mips.com>
9
10 * mips-opc.c (mips_builtin_opcodes): Add RDHWR rt rd sel.
11
12 2019-04-08 H.J. Lu <hongjiu.lu@intel.com>
13
14 * i386-opc.tbl: Consolidate AVX512 BF16 entries.
15 * i386-init.h: Regenerated.
16
17 2019-04-07 Alan Modra <amodra@gmail.com>
18
19 * ppc-dis.c (print_insn_powerpc): Use a tiny state machine
20 op_separator to control printing of spaces, comma and parens
21 rather than need_comma, need_paren and spaces vars.
22
23 2019-04-07 Alan Modra <amodra@gmail.com>
24
25 PR 24421
26 * arm-dis.c (print_insn_coprocessor): Correct bracket placement.
27 (print_insn_neon, print_insn_arm): Likewise.
28
29 2019-04-05 Xuepeng Guo <xuepeng.guo@intel.com>
30
31 * i386-dis-evex.h (evex_table): Updated to support BF16
32 instructions.
33 * i386-dis.c (enum): Add EVEX_W_0F3852_P_1, EVEX_W_0F3872_P_1
34 and EVEX_W_0F3872_P_3.
35 * i386-gen.c (cpu_flag_init): Add CPU_AVX512_BF16_FLAGS.
36 (cpu_flags): Add bitfield for CpuAVX512_BF16.
37 * i386-opc.h (enum): Add CpuAVX512_BF16.
38 (i386_cpu_flags): Add bitfield for cpuavx512_bf16.
39 * i386-opc.tbl: Add AVX512 BF16 instructions.
40 * i386-init.h: Regenerated.
41 * i386-tbl.h: Likewise.
42
43 2019-04-05 Alan Modra <amodra@gmail.com>
44
45 * ppc-opc.c (XLBH_MASK): Subtract off BH field from BB_MASK.
46 (powerpc_opcodes): Reorder bcctr and bclr extended mnemonics
47 to favour printing of "-" branch hint when using the "y" bit.
48 Allow BH field on bc{ctr,lr,tar}{,l}{-,+}.
49
50 2019-04-05 Alan Modra <amodra@gmail.com>
51
52 * ppc-dis.c (print_insn_powerpc): Delay printing spaces after
53 opcode until first operand is output.
54
55 2019-04-04 Peter Bergner <bergner@linux.ibm.com>
56
57 PR gas/24349
58 * ppc-opc.c (valid_bo_pre_v2): Add comments.
59 (valid_bo_post_v2): Add support for 'at' branch hints.
60 (insert_bo): Only error on branch on ctr.
61 (get_bo_hint_mask): New function.
62 (insert_boe): Add new 'branch_taken' formal argument. Add support
63 for inserting 'at' branch hints.
64 (extract_boe): Add new 'branch_taken' formal argument. Add support
65 for extracting 'at' branch hints.
66 (insert_bom, extract_bom, insert_bop, extract_bop): New functions.
67 (BOE): Delete operand.
68 (BOM, BOP): New operands.
69 (RM): Update value.
70 (XLYLK, XLYLK_MASK, XLYBB_MASK): Delete.
71 (powerpc_opcodes) <bc-, bcl-, bca-, bcla-, bclr-, bclrl-, bcctr-,
72 bcctrl-, bctar-, bctarl->: Replace BOE with BOM.
73 (powerpc_opcodes) <bc+, bcl+, bca+, bcla+, bclr+, bclrl+, bcctr+,
74 bcctrl+, bctar+, bctarl+>: Replace BOE with BOP.
75 <bdnztar, bdnztarl, bdztar, bdztarl, btar, btarl, bdnztar-, bdnztarl-,
76 bdnztar+, bdnztarl+, bdztar-, bdztarl-, bdztar+, bdztarl+, bgetar,
77 bnltar, bgetarl, bnltarl, bletar, bngtar, bletarl, bngtarl, bnetar,
78 bnetarl, bnstar, bnutar, bnstarl, bnutarl, bgetar-, bnltar-, bgetarl-,
79 bnltarl-, bletar-, bngtar-, bletarl-, bngtarl-, bnetar-, bnetarl-,
80 bnstar-, bnutar-, bnstarl-, bnutarl-, bgetar+, bnltar+, bgetarl+,
81 bnltarl+, bletar+, bngtar+, bletarl+, bngtarl+, bnetar+, bnetarl+,
82 bnstar+, bnutar+, bnstarl+, bnutarl+, blttar, blttarl, bgttar, bgttarl,
83 beqtar, beqtarl, bsotar, buntar, bsotarl, buntarl, blttar-, blttarl-,
84 bgttar-, bgttarl-, beqtar-, beqtarl-, bsotar-, buntar-, bsotarl-,
85 buntarl-, blttar+, blttarl+, bgttar+, bgttarl+, beqtar+, beqtarl+,
86 bsotar+, buntar+, bsotarl+, buntarl+, bdnzftar, bdnzftarl, bdzftar,
87 bdzftarl, bftar, bftarl, bftar-, bftarl-, bftar+, bftarl+, bdnzttar,
88 bdnzttarl, bdzttar, bdzttarl, bttar, bttarl, bttar-, bttarl-, bttar+,
89 bttarl+>: New extended mnemonics.
90
91 2019-03-28 Alan Modra <amodra@gmail.com>
92
93 PR 24390
94 * ppc-opc.c (BTF): Define.
95 (powerpc_opcodes): Use for mtfsb*.
96 * ppc-dis.c (print_insn_powerpc): Print fields with both
97 PPC_OPERAND_CR_REG and PPC_OPERAND_CR_BIT as a plain number.
98
99 2019-03-25 Tamar Christina <tamar.christina@arm.com>
100
101 * arm-dis.c (struct arm_private_data): Remove has_mapping_symbols.
102 (mapping_symbol_for_insn): Implement new algorithm.
103 (print_insn): Remove duplicate code.
104
105 2019-03-25 Tamar Christina <tamar.christina@arm.com>
106
107 * aarch64-dis.c (print_insn_aarch64):
108 Implement override.
109
110 2019-03-25 Tamar Christina <tamar.christina@arm.com>
111
112 * aarch64-dis.c (print_insn_aarch64): Update the mapping symbol search
113 order.
114
115 2019-03-25 Tamar Christina <tamar.christina@arm.com>
116
117 * aarch64-dis.c (last_stop_offset): New.
118 (print_insn_aarch64): Use stop_offset.
119
120 2019-03-19 H.J. Lu <hongjiu.lu@intel.com>
121
122 PR gas/24359
123 * i386-gen.c (cpu_flag_init): Add CPU_ANY_AVX512F_FLAGS to
124 CPU_ANY_AVX2_FLAGS.
125 * i386-init.h: Regenerated.
126
127 2019-03-18 H.J. Lu <hongjiu.lu@intel.com>
128
129 PR gas/24348
130 * i386-opc.tbl: Add Optimize to vmovdqa32, vmovdqa64, vmovdqu8,
131 vmovdqu16, vmovdqu32 and vmovdqu64.
132 * i386-tbl.h: Regenerated.
133
134 2019-03-12 Andreas Krebbel <krebbel@linux.ibm.com>
135
136 * s390-opc.txt: Rename selhhhr to selfhr. Remove optional operand
137 from vstrszb, vstrszh, and vstrszf.
138
139 2019-03-12 Andreas Krebbel <krebbel@linux.ibm.com>
140
141 * s390-opc.txt: Add instruction descriptions.
142
143 2019-02-08 Jim Wilson <jimw@sifive.com>
144
145 * riscv-opc.c (riscv_opcodes) <beq>: Use Cz to compress 3 operand form.
146 <bne>: Likewise.
147
148 2019-02-07 Tamar Christina <tamar.christina@arm.com>
149
150 * arm-dis.c (arm_opcodes): Redefine hlt to armv1.
151
152 2019-02-07 Tamar Christina <tamar.christina@arm.com>
153
154 PR binutils/23212
155 * aarch64-opc.h (enum aarch64_field_kind): Add FLD_sz.
156 * aarch64-opc.c (verify_elem_sd): New.
157 (fields): Add FLD_sz entr.
158 * aarch64-tbl.h (_SIMD_INSN): New.
159 (aarch64_opcode_table): Add elem_sd verifier to fmla, fmls, fmul and
160 fmulx scalar and vector by element isns.
161
162 2019-02-07 Nick Clifton <nickc@redhat.com>
163
164 * po/sv.po: Updated Swedish translation.
165
166 2019-01-31 Andreas Krebbel <krebbel@linux.ibm.com>
167
168 * s390-mkopc.c (main): Accept arch13 as cpu string.
169 * s390-opc.c: Add new instruction formats and instruction opcode
170 masks.
171 * s390-opc.txt: Add new arch13 instructions.
172
173 2019-01-25 Sudakshina Das <sudi.das@arm.com>
174
175 * aarch64-tbl.h (QL_LDST_AT): Update macro.
176 (aarch64_opcode): Change encoding for stg, stzg
177 st2g and st2zg.
178 * aarch64-asm-2.c: Regenerated.
179 * aarch64-dis-2.c: Regenerated.
180 * aarch64-opc-2.c: Regenerated.
181
182 2019-01-25 Sudakshina Das <sudi.das@arm.com>
183
184 * aarch64-asm-2.c: Regenerated.
185 * aarch64-dis-2.c: Likewise.
186 * aarch64-opc-2.c: Likewise.
187 * aarch64-tbl.h (aarch64_opcode): Add new stzgm.
188
189 2019-01-25 Sudakshina Das <sudi.das@arm.com>
190 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
191
192 * aarch64-asm.c (aarch64_ins_addr_simple_2): Remove.
193 * aarch64-asm.h (ins_addr_simple_2): Likeiwse.
194 * aarch64-dis.c (aarch64_ext_addr_simple_2): Likewise.
195 * aarch64-dis.h (ext_addr_simple_2): Likewise.
196 * aarch64-opc.c (operand_general_constraint_met_p): Remove
197 case for ldstgv_indexed.
198 (aarch64_print_operand): Remove case for AARCH64_OPND_ADDR_SIMPLE_2.
199 * aarch64-tbl.h (struct aarch64_opcode): Remove ldgv and stgv.
200 (AARCH64_OPERANDS): Remove ADDR_SIMPLE_2.
201 * aarch64-asm-2.c: Regenerated.
202 * aarch64-dis-2.c: Regenerated.
203 * aarch64-opc-2.c: Regenerated.
204
205 2019-01-23 Nick Clifton <nickc@redhat.com>
206
207 * po/pt_BR.po: Updated Brazilian Portuguese translation.
208
209 2019-01-21 Nick Clifton <nickc@redhat.com>
210
211 * po/de.po: Updated German translation.
212 * po/uk.po: Updated Ukranian translation.
213
214 2019-01-20 Chenghua Xu <paul.hua.gm@gmail.com>
215 * mips-dis.c (mips_arch_choices): Fix typo in
216 gs464, gs464e and gs264e descriptors.
217
218 2019-01-19 Nick Clifton <nickc@redhat.com>
219
220 * configure: Regenerate.
221 * po/opcodes.pot: Regenerate.
222
223 2018-06-24 Nick Clifton <nickc@redhat.com>
224
225 2.32 branch created.
226
227 2019-01-09 John Darrington <john@darrington.wattle.id.au>
228
229 * s12z-dis.c (print_insn_s12z): Do not dereference an operand
230 if it is null.
231 -dis.c (opr_emit_disassembly): Do not omit an index if it is
232 zero.
233
234 2019-01-09 Andrew Paprocki <andrew@ishiboo.com>
235
236 * configure: Regenerate.
237
238 2019-01-07 Alan Modra <amodra@gmail.com>
239
240 * configure: Regenerate.
241 * po/POTFILES.in: Regenerate.
242
243 2019-01-03 John Darrington <john@darrington.wattle.id.au>
244
245 * s12z-opc.c: New file.
246 * s12z-opc.h: New file.
247 * s12z-dis.c: Removed all code not directly related to display
248 of instructions. Used the interface provided by the new files
249 instead.
250 * Makefile.am (TARGET_LIBOPCODES_CFILES) Add s12z-opc.c.
251 * Makefile.in: Regenerate.
252 * configure.ac (bfd_s12z_arch): Correct the dependencies.
253 * configure: Regenerate.
254
255 2019-01-01 Alan Modra <amodra@gmail.com>
256
257 Update year range in copyright notice of all files.
258
259 For older changes see ChangeLog-2018
260 \f
261 Copyright (C) 2019 Free Software Foundation, Inc.
262
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