opcodes/ChangeLog

   1 2005-10-18  Nick Clifton  <nickc@redhat.com>
   2
   3         * m32r-asm.c: Regenerate after updating m32r.opc.
   4
   5 2005-10-18  Jie Zhang  <jie.zhang@analog.com>
   6
   7         * bfin-dis.c (print_insn_bfin): Do proper endian transform when
   8         reading instruction from memory.
   9
  10 2005-10-18  Nick Clifton  <nickc@redhat.com>
  11
  12         * m32r-asm.c: Regenerate after updating m32r.opc.
  13
  14 2005-10-14  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
  15
  16         * m32r-asm.c: Regenerate after updating m32r.opc.
  17
  18 2005-10-08  James Lemke  <jim@wasabisystems.com>
  19
  20         * arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
  21         operations.
  22
  23 2005-10-06  Daniel Jacobowitz  <dan@codesourcery.com>
  24
  25         * ppc-dis.c (struct dis_private): Remove.
  26         (powerpc_dialect): Avoid aliasing warnings.
  27         (print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
  28
  29 2005-09-30  Nick Clifton  <nickc@redhat.com>
  30
  31         * po/ga.po: New Irish translation.
  32         * configure.in (ALL_LINGUAS): Add "ga".
  33         * configure: Regenerate.
  34
  35 2005-09-30  H.J. Lu  <hongjiu.lu@intel.com>
  36
  37         * Makefile.am: Run "make dep-am".
  38         * Makefile.in: Regenerated.
  39         * aclocal.m4: Likewise.
  40         * configure: Likewise.
  41
  42 2005-09-30  Catherine Moore  <clm@cm00re.com>
  43
  44         * Makefile.am: Bfin support.
  45         * Makefile.in: Regenerated.
  46         * aclocal.m4: Regenerated.
  47         * bfin-dis.c: New file.
  48         * configure.in: Bfin support.
  49         * configure: Regenerated.
  50         * disassemble.c (ARCH_bfin): Define.
  51         (disassembler): Add case for bfd_arch_bfin.
  52
  53 2005-09-28  Jan Beulich  <jbeulich@novell.com>
  54
  55         * i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
  56         (indirEv): Use it.
  57         (stackEv): New.
  58         (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
  59         (dis386): Document and use new 'V' meta character. Use it for
  60         single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
  61         opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
  62         (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
  63         data prefix as used whenever DFLAG was examined. Handle 'V'.
  64         (intel_operand_size): Use stack_v_mode.
  65         (OP_E): Use stack_v_mode, but handle only the special case of
  66         64-bit mode without operand size override here; fall through to
  67         v_mode case otherwise.
  68         (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
  69         and no operand size override is present.
  70         (OP_J): Use get32s for obtaining the displacement also when rex64
  71         is present.
  72
  73 2005-09-08  Paul Brook  <paul@codesourcery.com>
  74
  75         * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
  76
  77 2005-09-06  Chao-ying Fu  <fu@mips.com>
  78
  79         * mips-opc.c (MT32): New define.
  80         (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
  81         bottom to avoid opcode collision with "mftr" and "mttr".
  82         Add MT instructions.
  83         * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
  84         (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
  85         formats.
  86
  87 2005-09-02  Paul Brook  <paul@codesourcery.com>
  88
  89         * arm-dis.c (coprocessor_opcodes): Add null terminator.
  90
  91 2005-09-02  Paul Brook  <paul@codesourcery.com>
  92
  93         * arm-dis.c (coprocessor_opcodes): New.
  94         (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
  95         (print_insn_coprocessor): New function.
  96         (print_insn_arm): Use print_insn_coprocessor.  Remove coprocessor
  97         format characters.
  98         (print_insn_thumb32): Use print_insn_coprocessor.
  99
 100 2005-08-30  Paul Brook  <paul@codesourcery.com>
 101
 102         * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
 103
 104 2005-08-26  Jan Beulich  <jbeulich@novell.com>
 105
 106         * i386-dis.c (intel_operand_size): New, broken out from OP_E for
 107         re-use.
 108         (OP_E): Call intel_operand_size, move call site out of mode
 109         dependent code.
 110         (OP_OFF): Call intel_operand_size if suffix_always. Remove
 111         ATTRIBUTE_UNUSED from parameters.
 112         (OP_OFF64): Likewise.
 113         (OP_ESreg): Call intel_operand_size.
 114         (OP_DSreg): Likewise.
 115         (OP_DIR): Use colon rather than semicolon as separator of far
 116         jump/call operands.
 117
 118 2005-08-25  Chao-ying Fu  <fu@mips.com>
 119
 120         * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
 121         (mips_builtin_opcodes): Add DSP instructions.
 122         * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
 123         mips64, mips64r2.
 124         (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
 125         operand formats.
 126
 127 2005-08-23  David Ung  <davidu@mips.com>
 128
 129         * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
 130         instructions to the table.
 131
 132 2005-08-18  Alan Modra  <amodra@bigpond.net.au>
 133
 134         * a29k-dis.c: Delete.
 135         * Makefile.am: Remove a29k support.
 136         * configure.in: Likewise.
 137         * disassemble.c: Likewise.
 138         * Makefile.in: Regenerate.
 139         * configure: Regenerate.
 140         * po/POTFILES.in: Regenerate.
 141
 142 2005-08-15  Daniel Jacobowitz  <dan@codesourcery.com>
 143
 144         * ppc-dis.c (powerpc_dialect): Handle e300.
 145         (print_ppc_disassembler_options): Likewise.
 146         * ppc-opc.c (PPCE300): Define.
 147         (powerpc_opcodes): Mark icbt as available for the e300.
 148
 149 2005-08-13  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
 150
 151         * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
 152         Use "rp" instead of "%r2" in "b,l" insns.
 153
 154 2005-08-12 Martin Schwidefsky  <schwidefsky@de.ibm.com>
 155
 156         * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
 157         * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
 158         (main): Likewise.
 159         * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
 160         and 4 bit optional masks.
 161         (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
 162         INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
 163         (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
 164         MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
 165         (s390_opformats): Likewise.
 166         * s390-opc.txt: Add new instructions for cpu type z9-109.
 167
 168 2005-08-05  John David Anglin  <dave.anglin@nrc-crnc.gc.ca>
 169
 170         * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
 171
 172 2005-07-29  Paul Brook  <paul@codesourcery.com>
 173
 174         * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
 175
 176 2005-07-29  Paul Brook  <paul@codesourcery.com>
 177
 178         * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
 179         (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
 180
 181 2005-07-25  DJ Delorie  <dj@redhat.com>
 182
 183         * m32c-asm.c Regenerate.
 184         * m32c-dis.c Regenerate.
 185
 186 2005-07-20  DJ Delorie  <dj@redhat.com>
 187
 188         * disassemble.c (disassemble_init_for_target): M32C ISAs are
 189         enums, so convert them to bit masks, which attributes are.
 190
 191 2005-07-18  Nick Clifton  <nickc@redhat.com>
 192
 193         * configure.in: Restore alpha ordering to list of arches.
 194         * configure: Regenerate.
 195         * disassemble.c: Restore alpha ordering to list of arches.
 196
 197 2005-07-18  Nick Clifton  <nickc@redhat.com>
 198
 199         * m32c-asm.c: Regenerate.
 200         * m32c-desc.c: Regenerate.
 201         * m32c-desc.h: Regenerate.
 202         * m32c-dis.c: Regenerate.
 203         * m32c-ibld.h: Regenerate.
 204         * m32c-opc.c: Regenerate.
 205         * m32c-opc.h: Regenerate.
 206
 207 2005-07-18  H.J. Lu  <hongjiu.lu@intel.com>
 208
 209         * i386-dis.c (PNI_Fixup): Update comment.
 210         (VMX_Fixup): Properly handle the suffix check.
 211
 212 2005-07-16  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
 213
 214         * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
 215         mfctl disassembly.
 216
 217 2005-07-16  Alan Modra  <amodra@bigpond.net.au>
 218
 219         * Makefile.am: Run "make dep-am".
 220         (stamp-m32c): Fix cpu dependencies.
 221         * Makefile.in: Regenerate.
 222         * ip2k-dis.c: Regenerate.
 223
 224 2007-07-15  H.J. Lu <hongjiu.lu@intel.com>
 225
 226         * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
 227         (VMX_Fixup): New. Fix up Intel VMX Instructions.
 228         (Em): New.
 229         (Gm): New.
 230         (VM): New.
 231         (dis386_twobyte): Updated entries 0x78 and 0x79.
 232         (twobyte_has_modrm): Likewise.
 233         (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
 234         (OP_G): Handle m_mode.
 235
 236 2005-07-14  Jim Blandy  <jimb@redhat.com>
 237
 238         Add support for the Renesas M32C and M16C.
 239         * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
 240         * m32c-desc.h, m32c-opc.h: New.
 241         * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
 242         (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
 243         m32c-opc.c.
 244         (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
 245         m32c-ibld.lo, m32c-opc.lo.
 246         (CLEANFILES): List stamp-m32c.
 247         (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
 248         (CGEN_CPUS): Add m32c.
 249         (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
 250         (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
 251         (m32c_opc_h): New variable.
 252         (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
 253         (m32c-opc.lo): New rules.
 254         * Makefile.in: Regenerated.
 255         * configure.in: Add case for bfd_m32c_arch.
 256         * configure: Regenerated.
 257         * disassemble.c (ARCH_m32c): New.
 258         [ARCH_m32c]: #include "m32c-desc.h".
 259         (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
 260         (disassemble_init_for_target) [ARCH_m32c]: Same.
 261
 262         * cgen-ops.h, cgen-types.h: New files.
 263         * Makefile.am (HFILES): List them.
 264         * Makefile.in: Regenerated.
 265
 266 2005-07-07  Kaveh R. Ghazi  <ghazi@caip.rutgers.edu>
 267
 268         * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
 269         d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
 270         ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
 271         m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
 272         ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
 273         v850-dis.c: Fix format bugs.
 274         * ia64-gen.c (fail, warn): Add format attribute.
 275         * or32-opc.c (debug): Likewise.
 276
 277 2005-07-07  Khem Raj  <kraj@mvista.com>
 278
 279         * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
 280         disassembly pattern.
 281
 282 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 283
 284         * Makefile.am (stamp-m32r): Fix path to cpu files.
 285         (stamp-m32r, stamp-iq2000): Likewise.
 286         * Makefile.in: Regenerate.
 287         * m32r-asm.c: Regenerate.
 288         * po/POTFILES.in: Remove arm-opc.h.  Add ms1-asm.c, ms1-desc.c,
 289         ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
 290
 291 2005-07-05  Nick Clifton  <nickc@redhat.com>
 292
 293         * iq2000-asm.c: Regenerate.
 294         * ms1-asm.c: Regenerate.
 295
 296 2005-07-05  Jan Beulich  <jbeulich@novell.com>
 297
 298         * i386-dis.c (SVME_Fixup): New.
 299         (grps): Use it for the lidt entry.
 300         (PNI_Fixup): Call OP_M rather than OP_E.
 301         (INVLPG_Fixup): Likewise.
 302
 303 2005-07-04  H.J. Lu  <hongjiu.lu@intel.com>
 304
 305         * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
 306
 307 2005-07-01  Nick Clifton  <nickc@redhat.com>
 308
 309         * a29k-dis.c: Update to ISO C90 style function declarations and
 310         fix formatting.
 311         * alpha-opc.c: Likewise.
 312         * arc-dis.c: Likewise.
 313         * arc-opc.c: Likewise.
 314         * avr-dis.c: Likewise.
 315         * cgen-asm.in: Likewise.
 316         * cgen-dis.in: Likewise.
 317         * cgen-ibld.in: Likewise.
 318         * cgen-opc.c: Likewise.
 319         * cris-dis.c: Likewise.
 320         * d10v-dis.c: Likewise.
 321         * d30v-dis.c: Likewise.
 322         * d30v-opc.c: Likewise.
 323         * dis-buf.c: Likewise.
 324         * dlx-dis.c: Likewise.
 325         * h8300-dis.c: Likewise.
 326         * h8500-dis.c: Likewise.
 327         * hppa-dis.c: Likewise.
 328         * i370-dis.c: Likewise.
 329         * i370-opc.c: Likewise.
 330         * m10200-dis.c: Likewise.
 331         * m10300-dis.c: Likewise.
 332         * m68k-dis.c: Likewise.
 333         * m88k-dis.c: Likewise.
 334         * mips-dis.c: Likewise.
 335         * mmix-dis.c: Likewise.
 336         * msp430-dis.c: Likewise.
 337         * ns32k-dis.c: Likewise.
 338         * or32-dis.c: Likewise.
 339         * or32-opc.c: Likewise.
 340         * pdp11-dis.c: Likewise.
 341         * pj-dis.c: Likewise.
 342         * s390-dis.c: Likewise.
 343         * sh-dis.c: Likewise.
 344         * sh64-dis.c: Likewise.
 345         * sparc-dis.c: Likewise.
 346         * sparc-opc.c: Likewise.
 347         * sysdep.h: Likewise.
 348         * tic30-dis.c: Likewise.
 349         * tic4x-dis.c: Likewise.
 350         * tic80-dis.c: Likewise.
 351         * v850-dis.c: Likewise.
 352         * v850-opc.c: Likewise.
 353         * vax-dis.c: Likewise.
 354         * w65-dis.c: Likewise.
 355         * z8kgen.c: Likewise.
 356
 357         * fr30-*: Regenerate.
 358         * frv-*: Regenerate.
 359         * ip2k-*: Regenerate.
 360         * iq2000-*: Regenerate.
 361         * m32r-*: Regenerate.
 362         * ms1-*: Regenerate.
 363         * openrisc-*: Regenerate.
 364         * xstormy16-*: Regenerate.
 365
 366 2005-06-23  Ben Elliston  <bje@gnu.org>
 367
 368         * m68k-dis.c: Use ISC C90.
 369         * m68k-opc.c: Formatting fixes.
 370
 371 2005-06-16  David Ung  <davidu@mips.com>
 372
 373         * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
 374         instructions to the table; seb/seh/sew/zeb/zeh/zew.
 375
 376 2005-06-15  Dave Brolley  <brolley@redhat.com>
 377
 378         Contribute Morpho ms1 on behalf of Red Hat
 379         * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
 380         ms1-opc.h: New files, Morpho ms1 target.
 381
 382         2004-05-14  Stan Cox  <scox@redhat.com>
 383
 384         * disassemble.c (ARCH_ms1): Define.
 385         (disassembler): Handle bfd_arch_ms1
 386
 387         2004-05-13  Michael Snyder  <msnyder@redhat.com>
 388
 389         * Makefile.am, Makefile.in: Add ms1 target.
 390         * configure.in: Ditto.
 391
 392 2005-06-08  Zack Weinberg  <zack@codesourcery.com>
 393
 394         * arm-opc.h: Delete; fold contents into ...
 395         * arm-dis.c: ... here.  Move includes of internal COFF headers
 396         next to includes of internal ELF headers.
 397         (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
 398         (struct arm_opcode): Rename struct opcode32.  Make 'assembler' const.
 399         (struct thumb_opcode): Rename struct opcode16.  Make 'assembler' const.
 400         (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
 401         (iwmmxt_wwnames, iwmmxt_wwssnames):
 402         Make const.
 403         (regnames): Remove iWMMXt coprocessor register sets.
 404         (iwmmxt_regnames, iwmmxt_cregnames): New statics.
 405         (get_arm_regnames): Adjust fourth argument to match above changes.
 406         (set_iwmmxt_regnames): Delete.
 407         (print_insn_arm): Constify 'c'.  Use ISO syntax for function
 408         pointer calls.  Expand sole use of BDISP.  Use iwmmxt_regnames
 409         and iwmmxt_cregnames, not set_iwmmxt_regnames.
 410         (print_insn_thumb16, print_insn_thumb32): Constify 'c'.  Use
 411         ISO syntax for function pointer calls.
 412
 413 2005-06-07  Zack Weinberg  <zack@codesourcery.com>
 414
 415         * arm-dis.c: Split up the comments describing the format codes, so
 416         that the ARM and 16-bit Thumb opcode tables each have comments
 417         preceding them that describe all the codes, and only the codes,
 418         valid in those tables.  (32-bit Thumb table is already like this.)
 419         Reorder the lists in all three comments to match the order in
 420         which the codes are implemented.
 421         Remove all forward declarations of static functions.  Convert all
 422         function definitions to ISO C format.
 423         (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
 424         Return nothing.
 425         (print_insn_thumb16): Remove unused case 'I'.
 426         (print_insn): Update for changed calling convention of subroutines.
 427
 428 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 429
 430         * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
 431         hex (but retain it being displayed as signed). Remove redundant
 432         checks. Add handling of displacements for 16-bit addressing in Intel
 433         mode.
 434
 435 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 436
 437         * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
 438         (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
 439         masking of 'rm' in 16-bit memory address handling.
 440
 441 2005-05-19  Anton Blanchard  <anton@samba.org>
 442
 443         * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
 444         (print_ppc_disassembler_options): Document it.
 445         * ppc-opc.c (SVC_LEV): Define.
 446         (LEV): Allow optional operand.
 447         (POWER5): Define.
 448         (powerpc_opcodes): Extend "sc".  Adjust "svc" and "svcl".  Add
 449         "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
 450
 451 2005-05-19  Kelley Cook  <kcook@gcc.gnu.org>
 452
 453         * Makefile.in:  Regenerate.
 454
 455 2005-05-17  Zack Weinberg  <zack@codesourcery.com>
 456
 457         * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
 458         instructions.  Adjust disassembly of some opcodes to match
 459         unified syntax.
 460         (thumb32_opcodes): New table.
 461         (print_insn_thumb): Rename print_insn_thumb16; don't handle
 462         two-halfword branches here.
 463         (print_insn_thumb32): New function.
 464         (print_insn): Choose among print_insn_arm, print_insn_thumb16,
 465         and print_insn_thumb32.  Be consistent about order of
 466         halfwords when printing 32-bit instructions.
 467
 468 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 469
 470         PR 843
 471         * i386-dis.c (branch_v_mode): New.
 472         (indirEv): Use branch_v_mode instead of v_mode.
 473         (OP_E): Handle branch_v_mode.
 474
 475 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 476
 477         * d10v-dis.c (dis_2_short): Support 64bit host.
 478
 479 2005-05-07  Nick Clifton  <nickc@redhat.com>
 480
 481         * po/nl.po: Updated translation.
 482
 483 2005-05-07  Nick Clifton  <nickc@redhat.com>
 484
 485         * Update the address and phone number of the FSF organization in
 486         the GPL notices in the following files:
 487         a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
 488         arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
 489         avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
 490         cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
 491         crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
 492         d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
 493         fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
 494         fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
 495         frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
 496         h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
 497         i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
 498         ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
 499         ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
 500         ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
 501         ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
 502         iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
 503         iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
 504         m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
 505         m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
 506         m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
 507         maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
 508         mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
 509         openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
 510         openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
 511         or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
 512         pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
 513         s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
 514         sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
 515         tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
 516         v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
 517         xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
 518         xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
 519         xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
 520
 521 2005-05-05  James E Wilson  <wilson@specifixinc.com>
 522
 523         * ia64-opc.c: Include sysdep.h before libiberty.h.
 524
 525 2005-05-05  Nick Clifton  <nickc@redhat.com>
 526
 527         * configure.in (ALL_LINGUAS): Add vi.
 528         * configure: Regenerate.
 529         * po/vi.po: New.
 530
 531 2005-04-26  Jerome Guitton  <guitton@gnat.com>
 532
 533         * configure.in: Fix the check for basename declaration.
 534         * configure: Regenerate.
 535
 536 2005-04-19  Alan Modra  <amodra@bigpond.net.au>
 537
 538         * ppc-opc.c (RTO): Define.
 539         (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
 540         entries to suit PPC440.
 541
 542 2005-04-18  Mark Kettenis  <kettenis@gnu.org>
 543
 544         * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
 545         Add xcrypt-ctr.
 546
 547 2005-04-14  Nick Clifton  <nickc@redhat.com>
 548
 549         * po/fi.po: New translation: Finnish.
 550         * configure.in (ALL_LINGUAS): Add fi.
 551         * configure: Regenerate.
 552
 553 2005-04-14  Alan Modra  <amodra@bigpond.net.au>
 554
 555         * Makefile.am (NO_WERROR): Define.
 556         * configure.in: Invoke AM_BINUTILS_WARNINGS.
 557         * Makefile.in: Regenerate.
 558         * aclocal.m4: Regenerate.
 559         * configure: Regenerate.
 560
 561 2005-04-04  Nick Clifton  <nickc@redhat.com>
 562
 563         * fr30-asm.c: Regenerate.
 564         * frv-asm.c: Regenerate.
 565         * iq2000-asm.c: Regenerate.
 566         * m32r-asm.c: Regenerate.
 567         * openrisc-asm.c: Regenerate.
 568
 569 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 570
 571         * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
 572         visible operands in Intel mode. The first operand of monitor is
 573         %rax in 64-bit mode.
 574
 575 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 576
 577         * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
 578         easier future additions.
 579
 580 2005-03-31  Jerome Guitton  <guitton@gnat.com>
 581
 582         * configure.in: Check for basename.
 583         * configure: Regenerate.
 584         * config.in: Ditto.
 585
 586 2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>
 587
 588         * i386-dis.c (SEG_Fixup): New.
 589         (Sv): New.
 590         (dis386): Use "Sv" for 0x8c and 0x8e.
 591
 592 2005-03-21  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 593             Nick Clifton  <nickc@redhat.com>
 594
 595         * vax-dis.c: (entry_addr): New varible:  An array of user supplied
 596         function entry mask addresses.
 597         (entry_addr_occupied_slots): New variable: The number of occupied
 598         elements in entry_addr.
 599         (entry_addr_total_slots): New variable: The total number of
 600         elements in entry_addr.
 601         (parse_disassembler_options): New function.  Fills in the entry_addr
 602         array.
 603         (free_entry_array): New function.  Release the memory used by the
 604         entry addr array.  Suppressed because there is no way to call it.
 605         (is_function_entry): Check if a given address is a function's
 606         start address by looking at supplied entry mask addresses and
 607         symbol information, if available.
 608         (print_insn_vax): Use parse_disassembler_options and is_function_entry.
 609
 610 2005-03-23  H.J. Lu  <hongjiu.lu@intel.com>
 611
 612         * cris-dis.c (print_with_operands): Use ~31L for long instead
 613         of ~31.
 614
 615 2005-03-20  H.J. Lu  <hongjiu.lu@intel.com>
 616
 617         * mmix-opc.c (O): Revert the last change.
 618         (Z): Likewise.
 619
 620 2005-03-19  H.J. Lu  <hongjiu.lu@intel.com>
 621
 622         * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
 623         (Z): Likewise.
 624
 625 2005-03-19  Hans-Peter Nilsson  <hp@bitrange.com>
 626
 627         * mmix-opc.c (O, Z): Force expression as unsigned long.
 628
 629 2005-03-18  Nick Clifton  <nickc@redhat.com>
 630
 631         * ip2k-asm.c: Regenerate.
 632         * op/opcodes.pot: Regenerate.
 633
 634 2005-03-16  Nick Clifton  <nickc@redhat.com>
 635             Ben Elliston  <bje@au.ibm.com>
 636
 637         * configure.in (werror): New switch: Add -Werror to the
 638         compiler command line.  Enabled by default.  Disable via
 639         --disable-werror.
 640         * configure: Regenerate.
 641
 642 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
 643
 644         * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
 645         BOOKE.
 646
 647 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
 648
 649         * po/es.po: Commit new Spanish translation.
 650
 651         * po/fr.po: Commit new French translation.
 652
 653 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 654
 655         * vax-dis.c: Fix spelling error
 656         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
 657         of just "Entry mask: < r1 ... >"
 658
 659 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
 660
 661         * arm-dis.c (arm_opcodes): Document %E and %V.
 662         Add entries for v6T2 ARM instructions:
 663         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
 664         (print_insn_arm): Add support for %E and %V.
 665         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
 666
 667 2005-03-10  Jeff Baker  <jbaker@qnx.com>
 668             Alan Modra  <amodra@bigpond.net.au>
 669
 670         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
 671         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
 672         (SPRG_MASK): Delete.
 673         (XSPRG_MASK): Mask off extra bits now part of sprg field.
 674         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
 675         mfsprg4..7 after msprg and consolidate.
 676
 677 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 678
 679         * vax-dis.c (entry_mask_bit): New array.
 680         (print_insn_vax): Decode function entry mask.
 681
 682 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
 683
 684         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
 685
 686 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
 687
 688         * po/opcodes.pot: Regenerate.
 689
 690 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
 691
 692         * arc-dis.c (a4_decoding_class): New enum.
 693         (dsmOneArcInst): Use the enum values for the decoding class.
 694         Remove redundant case in the switch for decodingClass value 11.
 695
 696 2005-03-02  Jan Beulich  <jbeulich@novell.com>
 697
 698         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
 699         accesses.
 700         (OP_C): Consider lock prefix in non-64-bit modes.
 701
 702 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 703
 704         * cris-dis.c (format_hex): Remove ineffective warning fix.
 705         * crx-dis.c (make_instruction): Warning fix.
 706         * frv-asm.c: Regenerate.
 707
 708 2005-02-23  Nick Clifton  <nickc@redhat.com>
 709
 710         * cgen-dis.in: Use bfd_byte for buffers that are passed to
 711         read_memory.
 712
 713         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
 714
 715         * crx-dis.c (make_instruction): Move argument structure into inner
 716         scope and ensure that all of its fields are initialised before
 717         they are used.
 718
 719         * fr30-asm.c: Regenerate.
 720         * fr30-dis.c: Regenerate.
 721         * frv-asm.c: Regenerate.
 722         * frv-dis.c: Regenerate.
 723         * ip2k-asm.c: Regenerate.
 724         * ip2k-dis.c: Regenerate.
 725         * iq2000-asm.c: Regenerate.
 726         * iq2000-dis.c: Regenerate.
 727         * m32r-asm.c: Regenerate.
 728         * m32r-dis.c: Regenerate.
 729         * openrisc-asm.c: Regenerate.
 730         * openrisc-dis.c: Regenerate.
 731         * xstormy16-asm.c: Regenerate.
 732         * xstormy16-dis.c: Regenerate.
 733
 734 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 735
 736         * arc-ext.c: Warning fixes.
 737         * arc-ext.h: Likewise.
 738         * cgen-opc.c: Likewise.
 739         * ia64-gen.c: Likewise.
 740         * maxq-dis.c: Likewise.
 741         * ns32k-dis.c: Likewise.
 742         * w65-dis.c: Likewise.
 743         * ia64-asmtab.c: Regenerate.
 744
 745 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 746
 747         * fr30-desc.c: Regenerate.
 748         * fr30-desc.h: Regenerate.
 749         * fr30-opc.c: Regenerate.
 750         * fr30-opc.h: Regenerate.
 751         * frv-desc.c: Regenerate.
 752         * frv-desc.h: Regenerate.
 753         * frv-opc.c: Regenerate.
 754         * frv-opc.h: Regenerate.
 755         * ip2k-desc.c: Regenerate.
 756         * ip2k-desc.h: Regenerate.
 757         * ip2k-opc.c: Regenerate.
 758         * ip2k-opc.h: Regenerate.
 759         * iq2000-desc.c: Regenerate.
 760         * iq2000-desc.h: Regenerate.
 761         * iq2000-opc.c: Regenerate.
 762         * iq2000-opc.h: Regenerate.
 763         * m32r-desc.c: Regenerate.
 764         * m32r-desc.h: Regenerate.
 765         * m32r-opc.c: Regenerate.
 766         * m32r-opc.h: Regenerate.
 767         * m32r-opinst.c: Regenerate.
 768         * openrisc-desc.c: Regenerate.
 769         * openrisc-desc.h: Regenerate.
 770         * openrisc-opc.c: Regenerate.
 771         * openrisc-opc.h: Regenerate.
 772         * xstormy16-desc.c: Regenerate.
 773         * xstormy16-desc.h: Regenerate.
 774         * xstormy16-opc.c: Regenerate.
 775         * xstormy16-opc.h: Regenerate.
 776
 777 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
 778
 779         * Makefile.am: Run "make dep-am"
 780         * Makefile.in: Regenerate.
 781
 782 2005-02-15  Nick Clifton  <nickc@redhat.com>
 783
 784         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
 785         compile time warnings.
 786         (print_keyword): Likewise.
 787         (default_print_insn): Likewise.
 788
 789         * fr30-desc.c: Regenerated.
 790         * fr30-desc.h: Regenerated.
 791         * fr30-dis.c: Regenerated.
 792         * fr30-opc.c: Regenerated.
 793         * fr30-opc.h: Regenerated.
 794         * frv-desc.c: Regenerated.
 795         * frv-dis.c: Regenerated.
 796         * frv-opc.c: Regenerated.
 797         * ip2k-asm.c: Regenerated.
 798         * ip2k-desc.c: Regenerated.
 799         * ip2k-desc.h: Regenerated.
 800         * ip2k-dis.c: Regenerated.
 801         * ip2k-opc.c: Regenerated.
 802         * ip2k-opc.h: Regenerated.
 803         * iq2000-desc.c: Regenerated.
 804         * iq2000-dis.c: Regenerated.
 805         * iq2000-opc.c: Regenerated.
 806         * m32r-asm.c: Regenerated.
 807         * m32r-desc.c: Regenerated.
 808         * m32r-desc.h: Regenerated.
 809         * m32r-dis.c: Regenerated.
 810         * m32r-opc.c: Regenerated.
 811         * m32r-opc.h: Regenerated.
 812         * m32r-opinst.c: Regenerated.
 813         * openrisc-desc.c: Regenerated.
 814         * openrisc-desc.h: Regenerated.
 815         * openrisc-dis.c: Regenerated.
 816         * openrisc-opc.c: Regenerated.
 817         * openrisc-opc.h: Regenerated.
 818         * xstormy16-desc.c: Regenerated.
 819         * xstormy16-desc.h: Regenerated.
 820         * xstormy16-dis.c: Regenerated.
 821         * xstormy16-opc.c: Regenerated.
 822         * xstormy16-opc.h: Regenerated.
 823
 824 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 825
 826         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 827         address.
 828
 829 2005-02-11  Nick Clifton  <nickc@redhat.com>
 830
 831         * iq2000-asm.c: Regenerate.
 832
 833         * frv-dis.c: Regenerate.
 834
 835 2005-02-07  Jim Blandy  <jimb@redhat.com>
 836
 837         * Makefile.am (CGEN): Load guile.scm before calling the main
 838         application script.
 839         * Makefile.in: Regenerated.
 840         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 841         Simply pass the cgen-opc.scm path to ${cgen} as its first
 842         argument; ${cgen} itself now contains the '-s', or whatever is
 843         appropriate for the Scheme being used.
 844
 845 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 846
 847         * configure: Regenerate to track ../gettext.m4.
 848
 849 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 850
 851         * ia64-gen.c (NELEMS): Define.
 852         (shrink): Generate alias with missing second predicate register when
 853         opcode has two outputs and these are both predicates.
 854         * ia64-opc-i.c (FULL17): Define.
 855         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 856         here to generate output template.
 857         (TBITCM, TNATCM): Undefine after use.
 858         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 859         first input. Add ld16 aliases without ar.csd as second output. Add
 860         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 861         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 862         ar.ccv as third/fourth inputs. Consolidate through...
 863         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 864         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 865         * ia64-asmtab.c: Regenerate.
 866
 867 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 868
 869         * configure: Regenerate to track ../gettext.m4 change.
 870
 871 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 872
 873         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 874         * frv-asm.c: Rebuilt.
 875         * frv-desc.c: Rebuilt.
 876         * frv-desc.h: Rebuilt.
 877         * frv-dis.c: Rebuilt.
 878         * frv-ibld.c: Rebuilt.
 879         * frv-opc.c: Rebuilt.
 880         * frv-opc.h: Rebuilt.
 881
 882 2005-01-24  Andrew Cagney  <cagney@gnu.org>
 883
 884         * configure: Regenerate, ../gettext.m4 was updated.
 885
 886 2005-01-21  Fred Fish  <fnf@specifixinc.com>
 887
 888         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
 889         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
 890         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
 891         * mips-dis.c: Ditto.
 892
 893 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
 894
 895         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
 896
 897 2005-01-19  Fred Fish  <fnf@specifixinc.com>
 898
 899         * mips-dis.c (no_aliases): New disassembly option flag.
 900         (set_default_mips_dis_options): Init no_aliases to zero.
 901         (parse_mips_dis_option): Handle no-aliases option.
 902         (print_insn_mips): Ignore table entries that are aliases
 903         if no_aliases is set.
 904         (print_insn_mips16): Ditto.
 905         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
 906         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
 907         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
 908         * mips16-opc.c (mips16_opcodes): Ditto.
 909
 910 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
 911
 912         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
 913         (inheritance diagram): Add missing edge.
 914         (arch_sh1_up): Rename arch_sh_up to match external name to make life
 915         easier for the testsuite.
 916         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
 917         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
 918         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
 919         arch_sh2a_or_sh4_up child.
 920         (sh_table): Do renaming as above.
 921         Correct comment for ldc.l for gas testsuite to read.
 922         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
 923         Correct comments for movy.w and movy.l for gas testsuite to read.
 924         Correct comments for fmov.d and fmov.s for gas testsuite to read.
 925
 926 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 927
 928         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
 929
 930 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 931
 932         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
 933
 934 2005-01-10  Andreas Schwab  <schwab@suse.de>
 935
 936         * disassemble.c (disassemble_init_for_target) <case
 937         bfd_arch_ia64>: Set skip_zeroes to 16.
 938         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
 939
 940 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
 941
 942         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
 943
 944 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
 945
 946         * avr-dis.c: Prettyprint. Added printing of symbol names in all
 947         memory references. Convert avr_operand() to C90 formatting.
 948
 949 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
 950
 951         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
 952
 953 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
 954
 955         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
 956         (no_op_insn): Initialize array with instructions that have no
 957         operands.
 958         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
 959
 960 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
 961
 962         * arm-dis.c: Correct top-level comment.
 963
 964 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
 965
 966         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
 967         architecuture defining the insn.
 968         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
 969         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
 970         field.
 971         Also include opcode/arm.h.
 972         * Makefile.am (arm-dis.lo): Update dependency list.
 973         * Makefile.in: Regenerate.
 974
 975 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
 976
 977         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
 978         reflect the change to the short immediate syntax.
 979
 980 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
 981
 982         * or32-opc.c (debug): Warning fix.
 983         * po/POTFILES.in: Regenerate.
 984
 985         * maxq-dis.c: Formatting.
 986         (print_insn): Warning fix.
 987
 988 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
 989
 990         * arm-dis.c (WORD_ADDRESS): Define.
 991         (print_insn): Use it.  Correct big-endian end-of-section handling.
 992
 993 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
 994             Vineet Sharma      <vineets@noida.hcltech.com>
 995
 996         * maxq-dis.c: New file.
 997         * disassemble.c (ARCH_maxq): Define.
 998         (disassembler): Add 'print_insn_maxq_little' for handling maxq
 999         instructions..
1000         * configure.in: Add case for bfd_maxq_arch.
1001         * configure: Regenerate.
1002         * Makefile.am: Add support for maxq-dis.c
1003         * Makefile.in: Regenerate.
1004         * aclocal.m4: Regenerate.
1005
1006 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
1007
1008         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
1009         mode.
1010         * crx-dis.c: Likewise.
1011
1012 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
1013
1014         Generally, handle CRISv32.
1015         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
1016         (struct cris_disasm_data): New type.
1017         (format_reg, format_hex, cris_constraint, print_flags)
1018         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
1019         callers changed.
1020         (format_sup_reg, print_insn_crisv32_with_register_prefix)
1021         (print_insn_crisv32_without_register_prefix)
1022         (print_insn_crisv10_v32_with_register_prefix)
1023         (print_insn_crisv10_v32_without_register_prefix)
1024         (cris_parse_disassembler_options): New functions.
1025         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
1026         parameter.  All callers changed.
1027         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
1028         failure.
1029         (cris_constraint) <case 'Y', 'U'>: New cases.
1030         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
1031         for constraint 'n'.
1032         (print_with_operands) <case 'Y'>: New case.
1033         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
1034         <case 'N', 'Y', 'Q'>: New cases.
1035         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
1036         (print_insn_cris_with_register_prefix)
1037         (print_insn_cris_without_register_prefix): Call
1038         cris_parse_disassembler_options.
1039         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
1040         for CRISv32 and the size of immediate operands.  New v32-only
1041         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
1042         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
1043         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
1044         Change brp to be v3..v10.
1045         (cris_support_regs): New vector.
1046         (cris_opcodes): Update head comment.  New format characters '[',
1047         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
1048         Add new opcodes for v32 and adjust existing opcodes to accommodate
1049         differences to earlier variants.
1050         (cris_cond15s): New vector.
1051
1052 2004-11-04 Jan Beulich <jbeulich@novell.com>
1053
1054         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
1055         (indirEb): Remove.
1056         (Mp): Use f_mode rather than none at all.
1057         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
1058         replaces what previously was x_mode; x_mode now means 128-bit SSE
1059         operands.
1060         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
1061         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
1062         pinsrw's second operand is Edqw.
1063         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
1064         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
1065         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
1066         mode when an operand size override is present or always suffixing.
1067         More instructions will need to be added to this group.
1068         (putop): Handle new macro chars 'C' (short/long suffix selector),
1069         'I' (Intel mode override for following macro char), and 'J' (for
1070         adding the 'l' prefix to far branches in AT&T mode). When an
1071         alternative was specified in the template, honor macro character when
1072         specified for Intel mode.
1073         (OP_E): Handle new *_mode values. Correct pointer specifications for
1074         memory operands. Consolidate output of index register.
1075         (OP_G): Handle new *_mode values.
1076         (OP_I): Handle const_1_mode.
1077         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
1078         respective opcode prefix bits have been consumed.
1079         (OP_EM, OP_EX): Provide some default handling for generating pointer
1080         specifications.
1081
1082 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
1083
1084         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
1085         COP_INST macro.
1086
1087 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
1088
1089         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
1090         (getregliststring): Support HI/LO and user registers.
1091         * crx-opc.c (crx_instruction): Update data structure according to the
1092         rearrangement done in CRX opcode header file.
1093         (crx_regtab):  Likewise.
1094         (crx_optab):  Likewise.
1095         (crx_instruction): Reorder load/stor instructions, remove unsupported
1096         formats.
1097         support new Co-Processor instruction 'cpi'.
1098
1099 2004-10-27  Nick Clifton  <nickc@redhat.com>
1100
1101         * opcodes/iq2000-asm.c: Regenerate.
1102         * opcodes/iq2000-desc.c: Regenerate.
1103         * opcodes/iq2000-desc.h: Regenerate.
1104         * opcodes/iq2000-dis.c: Regenerate.
1105         * opcodes/iq2000-ibld.c: Regenerate.
1106         * opcodes/iq2000-opc.c: Regenerate.
1107         * opcodes/iq2000-opc.h: Regenerate.
1108
1109 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
1110
1111         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1112         us4, us5 (respectively).
1113         Remove unsupported 'popa' instruction.
1114         Reverse operands order in store co-processor instructions.
1115
1116 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
1117
1118         * Makefile.am: Run "make dep-am"
1119         * Makefile.in: Regenerate.
1120
1121 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
1122
1123         * xtensa-dis.c: Use ISO C90 formatting.
1124
1125 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
1126
1127         * ppc-opc.c: Revert 2004-09-09 change.
1128
1129 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
1130
1131         * xtensa-dis.c (state_names): Delete.
1132         (fetch_data): Use xtensa_isa_maxlength.
1133         (print_xtensa_operand): Replace operand parameter with opcode/operand
1134         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
1135         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
1136         instruction bundles.  Use xmalloc instead of malloc.
1137
1138 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
1139
1140         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1141         initializers.
1142
1143 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
1144
1145         * crx-opc.c (crx_instruction): Support Co-processor insns.
1146         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1147         (getregliststring): Change function to use the above enum.
1148         (print_arg): Handle CO-Processor insns.
1149         (crx_cinvs): Add 'b' option to invalidate the branch-target
1150         cache.
1151
1152 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
1153
1154         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1155         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1156         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1157         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1158         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1159
1160 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
1161
1162         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1163         rather than add it.
1164
1165 2004-09-30  Paul Brook  <paul@codesourcery.com>
1166
1167         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1168         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
1169
1170 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
1171
1172         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1173         (CONFIG_STATUS_DEPENDENCIES): New.
1174         (Makefile): Removed.
1175         (config.status): Likewise.
1176         * Makefile.in: Regenerated.
1177
1178 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
1179
1180         * Makefile.am: Run "make dep-am".
1181         * Makefile.in: Regenerate.
1182         * aclocal.m4: Regenerate.
1183         * configure: Regenerate.
1184         * po/POTFILES.in: Regenerate.
1185         * po/opcodes.pot: Regenerate.
1186
1187 2004-09-11  Andreas Schwab  <schwab@suse.de>
1188
1189         * configure: Rebuild.
1190
1191 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
1192
1193         * ppc-opc.c (L): Make this field not optional.
1194
1195 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
1196
1197         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1198         Fix parameter to 'm[t|f]csr' insns.
1199
1200 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
1201
1202         * configure.in: Autoupdate to autoconf 2.59.
1203         * aclocal.m4: Rebuild with aclocal 1.4p6.
1204         * configure: Rebuild with autoconf 2.59.
1205         * Makefile.in: Rebuild with automake 1.4p6 (picking up
1206         bfd changes for autoconf 2.59 on the way).
1207         * config.in: Rebuild with autoheader 2.59.
1208
1209 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
1210
1211         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1212
1213 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
1214
1215         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1216         (GRPPADLCK2): New define.
1217         (twobyte_has_modrm): True for 0xA6.
1218         (grps): GRPPADLCK2 for opcode 0xA6.
1219
1220 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
1221
1222         Introduce SH2a support.
1223         * sh-opc.h (arch_sh2a_base): Renumber.
1224         (arch_sh2a_nofpu_base): Remove.
1225         (arch_sh_base_mask): Adjust.
1226         (arch_opann_mask): New.
1227         (arch_sh2a, arch_sh2a_nofpu): Adjust.
1228         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1229         (sh_table): Adjust whitespace.
1230         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
1231         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
1232         instruction list throughout.
1233         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
1234         of arch_sh2a in instruction list throughout.
1235         (arch_sh2e_up): Accomodate above changes.
1236         (arch_sh2_up): Ditto.
1237         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
1238         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1239         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
1240         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1241         * sh-opc.h (arch_sh2a_nofpu): New.
1242         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1243         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1244         instruction.
1245         2004-01-20  DJ Delorie  <dj@redhat.com>
1246         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1247         2003-12-29  DJ Delorie  <dj@redhat.com>
1248         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1249         sh_opcode_info, sh_table): Add sh2a support.
1250         (arch_op32): New, to tag 32-bit opcodes.
1251         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1252         2003-12-02  Michael Snyder  <msnyder@redhat.com>
1253         * sh-opc.h (arch_sh2a): Add.
1254         * sh-dis.c (arch_sh2a): Handle.
1255         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1256
1257 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
1258
1259         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1260
1261 2004-07-22  Nick Clifton  <nickc@redhat.com>
1262
1263         PR/280
1264         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1265         insns - this is done by objdump itself.
1266         * h8500-dis.c (print_insn_h8500): Likewise.
1267
1268 2004-07-21  Jan Beulich <jbeulich@novell.com>
1269
1270         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1271         regardless of address size prefix in effect.
1272         (ptr_reg): Size or address registers does not depend on rex64, but
1273         on the presence of an address size override.
1274         (OP_MMX): Use rex.x only for xmm registers.
1275         (OP_EM): Use rex.z only for xmm registers.
1276
1277 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1278
1279         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1280         move/branch operations to the bottom so that VR5400 multimedia
1281         instructions take precedence in disassembly.
1282
1283 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1284
1285         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1286         ISA-specific "break" encoding.
1287
1288 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
1289
1290         * arm-opc.h: Fix typo in comment.
1291
1292 2004-07-11  Andreas Schwab  <schwab@suse.de>
1293
1294         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1295
1296 2004-07-09  Andreas Schwab  <schwab@suse.de>
1297
1298         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1299
1300 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
1301
1302         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1303         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1304         (crx-dis.lo): New target.
1305         (crx-opc.lo): Likewise.
1306         * Makefile.in: Regenerate.
1307         * configure.in: Handle bfd_crx_arch.
1308         * configure: Regenerate.
1309         * crx-dis.c: New file.
1310         * crx-opc.c: New file.
1311         * disassemble.c (ARCH_crx): Define.
1312         (disassembler): Handle ARCH_crx.
1313
1314 2004-06-29  James E Wilson  <wilson@specifixinc.com>
1315
1316         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1317         * ia64-asmtab.c: Regnerate.
1318
1319 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
1320
1321         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1322         (extract_fxm): Don't test dialect.
1323         (XFXFXM_MASK): Include the power4 bit.
1324         (XFXM): Add p4 param.
1325         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
1326
1327 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
1328
1329         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
1330         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1331
1332 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
1333
1334         * ppc-opc.c (BH, XLBH_MASK): Define.
1335         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1336
1337 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
1338
1339         * i386-dis.c (x_mode): Comment.
1340         (two_source_ops): File scope.
1341         (float_mem): Correct fisttpll and fistpll.
1342         (float_mem_mode): New table.
1343         (dofloat): Use it.
1344         (OP_E): Correct intel mode PTR output.
1345         (ptr_reg): Use open_char and close_char.
1346         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
1347         operands.  Set two_source_ops.
1348
1349 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
1350
1351         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1352         instead of _raw_size.
1353
1354 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
1355
1356         * ia64-gen.c (in_iclass): Handle more postinc st
1357         and ld variants.
1358         * ia64-asmtab.c: Rebuilt.
1359
1360 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
1361
1362         * s390-opc.txt: Correct architecture mask for some opcodes.
1363         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1364         in the esa mode as well.
1365
1366 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
1367
1368         * sh-dis.c (target_arch): Make unsigned.
1369         (print_insn_sh): Replace (most of) switch with a call to
1370         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1371         * sh-opc.h: Redefine architecture flags values.
1372         Add sh3-nommu architecture.
1373         Reorganise <arch>_up macros so they make more visual sense.
1374         (SH_MERGE_ARCH_SET): Define new macro.
1375         (SH_VALID_BASE_ARCH_SET): Likewise.
1376         (SH_VALID_MMU_ARCH_SET): Likewise.
1377         (SH_VALID_CO_ARCH_SET): Likewise.
1378         (SH_VALID_ARCH_SET): Likewise.
1379         (SH_MERGE_ARCH_SET_VALID): Likewise.
1380         (SH_ARCH_SET_HAS_FPU): Likewise.
1381         (SH_ARCH_SET_HAS_DSP): Likewise.
1382         (SH_ARCH_UNKNOWN_ARCH): Likewise.
1383         (sh_get_arch_from_bfd_mach): Add prototype.
1384         (sh_get_arch_up_from_bfd_mach): Likewise.
1385         (sh_get_bfd_mach_from_arch_set): Likewise.
1386         (sh_merge_bfd_arc): Likewise.
1387
1388 2004-05-24  Peter Barada  <peter@the-baradas.com>
1389
1390         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1391         into new match_insn_m68k function.  Loop over canidate
1392         matches and select first that completely matches.
1393         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1394         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1395         to verify addressing for MAC/EMAC.
1396         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1397         reigster halves since 'fpu' and 'spl' look misleading.
1398         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1399         * m68k-opc.c: Rearragne mac/emac cases to use longest for
1400         first, tighten up match masks.
1401         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
1402         'size' from special case code in print_insn_m68k to
1403         determine decode size of insns.
1404
1405 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
1406
1407         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1408         well as when -mpower4.
1409
1410 2004-05-13  Nick Clifton  <nickc@redhat.com>
1411
1412         * po/fr.po: Updated French translation.
1413
1414 2004-05-05  Peter Barada  <peter@the-baradas.com>
1415
1416         * m68k-dis.c(print_insn_m68k): Add new chips, use core
1417         variants in arch_mask.  Only set m68881/68851 for 68k chips.
1418         * m68k-op.c: Switch from ColdFire chips to core variants.
1419
1420 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
1421
1422         PR 147.
1423         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1424
1425 2004-04-29  Ben Elliston  <bje@au.ibm.com>
1426
1427         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1428         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1429
1430 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
1431
1432         * sh-dis.c (print_insn_sh): Print the value in constant pool
1433         as a symbol if it looks like a symbol.
1434
1435 2004-04-22  Peter Barada <peter@the-baradas.com>
1436
1437         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1438         appropriate ColdFire architectures.
1439         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1440         mask addressing.
1441         Add EMAC instructions, fix MAC instructions. Remove
1442         macmw/macml/msacmw/msacml instructions since mask addressing now
1443         supported.
1444
1445 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
1446
1447         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1448         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1449         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
1450         macro.  Adjust all users.
1451
1452 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
1453
1454         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1455         separately.
1456
1457 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1458
1459         * m32r-asm.c: Regenerate.
1460
1461 2004-03-29  Stan Shebs  <shebs@apple.com>
1462
1463         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1464         used.
1465
1466 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
1467
1468         * aclocal.m4: Regenerate.
1469         * config.in: Regenerate.
1470         * configure: Regenerate.
1471         * po/POTFILES.in: Regenerate.
1472         * po/opcodes.pot: Regenerate.
1473
1474 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
1475
1476         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
1477         PPC_OPERANDS_GPR_0.
1478         * ppc-opc.c (RA0): Define.
1479         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1480         (RAOPT): Rename from RAO.  Update all uses.
1481         (powerpc_opcodes): Use RA0 as appropriate.
1482
1483 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
1484
1485         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1486
1487 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
1488
1489         * sparc-dis.c (print_insn_sparc): Update getword prototype.
1490
1491 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1492
1493         * i386-dis.c (GRPPLOCK): Delete.
1494         (grps): Delete GRPPLOCK entry.
1495
1496 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1497
1498         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1499         (M, Mp): Use OP_M.
1500         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1501         (GRPPADLCK): Define.
1502         (dis386): Use NOP_Fixup on "nop".
1503         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1504         (twobyte_has_modrm): Set for 0xa7.
1505         (padlock_table): Delete.  Move to..
1506         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
1507         and clflush.
1508         (print_insn): Revert PADLOCK_SPECIAL code.
1509         (OP_E): Delete sfence, lfence, mfence checks.
1510
1511 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
1512
1513         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1514         (INVLPG_Fixup): New function.
1515         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1516
1517 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1518
1519         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1520         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1521         (padlock_table): New struct with PadLock instructions.
1522         (print_insn): Handle PADLOCK_SPECIAL.
1523
1524 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1525
1526         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1527         (OP_E): Twiddle clflush to sfence here.
1528
1529 2004-03-08  Nick Clifton  <nickc@redhat.com>
1530
1531         * po/de.po: Updated German translation.
1532
1533 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
1534
1535         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1536         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
1537         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1538         accordingly.
1539
1540 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1541
1542         * frv-asm.c: Regenerate.
1543         * frv-desc.c: Regenerate.
1544         * frv-desc.h: Regenerate.
1545         * frv-dis.c: Regenerate.
1546         * frv-ibld.c: Regenerate.
1547         * frv-opc.c: Regenerate.
1548         * frv-opc.h: Regenerate.
1549
1550 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1551
1552         * frv-desc.c, frv-opc.c: Regenerate.
1553
1554 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1555
1556         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1557
1558 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
1559
1560         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1561         Also correct mistake in the comment.
1562
1563 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
1564
1565         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1566         ensure that double registers have even numbers.
1567         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1568         that reserved instruction 0xfffd does not decode the same
1569         as 0xfdfd (ftrv).
1570         * sh-opc.h: Add REG_N_D nibble type and use it whereever
1571         REG_N refers to a double register.
1572         Add REG_N_B01 nibble type and use it instead of REG_NM
1573         in ftrv.
1574         Adjust the bit patterns in a few comments.
1575
1576 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
1577
1578         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1579
1580 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1581
1582         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1583
1584 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1585
1586         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1587
1588 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1589
1590         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1591         mtivor32, mtivor33, mtivor34.
1592
1593 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
1594
1595         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1596
1597 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
1598
1599         * arm-opc.h Maverick accumulator register opcode fixes.
1600
1601 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
1602
1603         * m32r-dis.c: Regenerate.
1604
1605 2004-01-27  Michael Snyder  <msnyder@redhat.com>
1606
1607         * sh-opc.h (sh_table): "fsrra", not "fssra".
1608
1609 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
1610
1611         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1612         contraints.
1613
1614 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
1615
1616         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1617
1618 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
1619
1620         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1621         1.  Don't print scale factor on AT&T mode when index missing.
1622
1623 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
1624
1625         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1626         when loaded into XR registers.
1627
1628 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1629
1630         * frv-desc.h: Regenerate.
1631         * frv-desc.c: Regenerate.
1632         * frv-opc.c: Regenerate.
1633
1634 2004-01-13  Michael Snyder  <msnyder@redhat.com>
1635
1636         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1637
1638 2004-01-09  Paul Brook  <paul@codesourcery.com>
1639
1640         * arm-opc.h (arm_opcodes): Move generic mcrr after known
1641         specific opcodes.
1642
1643 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
1644
1645         * Makefile.am (libopcodes_la_DEPENDENCIES)
1646         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1647         comment about the problem.
1648         * Makefile.in: Regenerate.
1649
1650 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1651
1652         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1653         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1654         cut&paste errors in shifting/truncating numerical operands.
1655         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1656         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1657         (parse_uslo16): Likewise.
1658         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1659         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1660         (parse_s12): Likewise.
1661         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1662         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1663         (parse_uslo16): Likewise.
1664         (parse_uhi16): Parse gothi and gotfuncdeschi.
1665         (parse_d12): Parse got12 and gotfuncdesc12.
1666         (parse_s12): Likewise.
1667
1668 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1669
1670         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1671         instruction which looks similar to an 'rla' instruction.
1672
1673 For older changes see ChangeLog-0203
1674 \f
1675 Local Variables:
1676 mode: change-log
1677 left-margin: 8
1678 fill-column: 74
1679 version-control: never
1680 End: