1 2018-03-08 Jan Beulich <jbeulich@suse.com>
3 * i386-opc.tbl (llwpcb, slwpcb, lwpval, lwpins): Fold 32- and
4 64-bit templates. Drop Disp<N>.
5 * i386-tlb.h: Re-generate.
7 2018-03-08 Jan Beulich <jbeulich@suse.com>
9 * i386-opc.tbl (vfmadd*, vfmsub*, vfnmadd*, vfnmsub*): Fold 128-
10 and 256-bit templates.
11 * i386-tlb.h: Re-generate.
13 2018-03-08 Jan Beulich <jbeulich@suse.com>
15 * i386-opc.tbl (cmpxchg8b): Add NoRex64.
16 * i386-tlb.h: Re-generate.
18 2018-03-08 Jan Beulich <jbeulich@suse.com>
20 * i386-opc.tbl (cmpxchg16b, fisttp, fisttpll, bndmov, mwaitx):
22 * i386-tlb.h: Re-generate.
24 2018-03-08 Jan Beulich <jbeulich@suse.com>
26 * i386-opc.tbl (ldmxcsr, stmxcsr): Add NoAVX.
27 * i386-tlb.h: Re-generate.
29 2018-03-08 Jan Beulich <jbeulich@suse.com>
31 * i386-gen.c (opcode_modifiers): Delete FloatD.
32 * i386-opc.h (FloatD): Delete.
33 (struct i386_opcode_modifier): Delete floatd.
34 * i386-opc.tbl (fadd, fsub, fsubr, fmul, fdiv, fdivr): Replace
36 * i386-tlb.h: Re-generate.
38 2018-03-08 Jan Beulich <jbeulich@suse.com>
40 * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns.
42 2018-03-08 Jan Beulich <jbeulich@suse.com>
44 * i386-opc.tbl (vmovd): Disallow Qword memory operands.
45 * i386-tlb.h: Re-generate.
47 2018-03-08 Jan Beulich <jbeulich@suse.com>
49 * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
51 * i386-tlb.h: Re-generate.
53 2018-03-07 Alan Modra <amodra@gmail.com>
55 * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
57 * disassemble.h (print_insn_rs6000): Delete.
58 * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
59 (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
60 (print_insn_rs6000): Delete.
62 2018-03-03 Alan Modra <amodra@gmail.com>
64 * sysdep.h (opcodes_error_handler): Define.
65 (_bfd_error_handler): Declare.
66 * Makefile.am: Remove stray #.
67 * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
69 * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
70 * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
71 * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
72 opcodes_error_handler to print errors. Standardize error messages.
73 * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
75 * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
76 * i386-gen.c: Standardize error messages.
77 * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
78 * Makefile.in: Regenerate.
79 * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
80 * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
81 * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
82 * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
83 * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
84 * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
85 * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
86 * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
87 * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
88 * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
89 * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
90 * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
91 * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
93 2018-03-01 H.J. Lu <hongjiu.lu@intel.com>
95 * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
96 vpsub[bwdq] instructions.
97 * i386-tbl.h: Regenerated.
99 2018-03-01 Alan Modra <amodra@gmail.com>
101 * configure.ac (ALL_LINGUAS): Sort.
102 * configure: Regenerate.
104 2018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
106 * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
107 macro by assignements.
109 2018-02-27 H.J. Lu <hongjiu.lu@intel.com>
112 * i386-gen.c (opcode_modifiers): Add Optimize.
113 * i386-opc.h (Optimize): New enum.
114 (i386_opcode_modifier): Add optimize.
115 * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
116 "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
117 "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
118 "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
119 vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
121 * i386-tbl.h: Regenerated.
123 2018-02-26 Alan Modra <amodra@gmail.com>
125 * crx-dis.c (getregliststring): Allocate a large enough buffer
126 to silence false positive gcc8 warning.
128 2018-02-22 Shea Levy <shea@shealevy.com>
130 * disassemble.c (ARCH_riscv): Define if ARCH_all.
132 2018-02-22 H.J. Lu <hongjiu.lu@intel.com>
134 * i386-opc.tbl: Add {rex},
135 * i386-tbl.h: Regenerated.
137 2018-02-20 Maciej W. Rozycki <macro@mips.com>
139 * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
140 (mips16_opcodes): Replace `M' with `m' for "restore".
142 2018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
144 * arm-dis.c (thumb_opcodes): Fix BXNS mask.
146 2018-02-13 Maciej W. Rozycki <macro@mips.com>
148 * wasm32-dis.c (print_insn_wasm32): Rename `index' local
149 variable to `function_index'.
151 2018-02-13 Nick Clifton <nickc@redhat.com>
154 * metag-dis.c (print_fmmov): Double buffer size to avoid warning
155 about truncation of printing.
157 2018-02-12 Henry Wong <henry@stuffedcow.net>
159 * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
161 2018-02-05 Nick Clifton <nickc@redhat.com>
163 * po/pt_BR.po: Updated Brazilian Portuguese translation.
165 2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
167 * i386-dis.c (enum): Add pconfig.
168 * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
169 (cpu_flags): Add CpuPCONFIG.
170 * i386-opc.h (enum): Add CpuPCONFIG.
171 (i386_cpu_flags): Add cpupconfig.
172 * i386-opc.tbl: Add PCONFIG instruction.
173 * i386-init.h: Regenerate.
174 * i386-tbl.h: Likewise.
176 2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
178 * i386-dis.c (enum): Add PREFIX_0F09.
179 * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
180 (cpu_flags): Add CpuWBNOINVD.
181 * i386-opc.h (enum): Add CpuWBNOINVD.
182 (i386_cpu_flags): Add cpuwbnoinvd.
183 * i386-opc.tbl: Add WBNOINVD instruction.
184 * i386-init.h: Regenerate.
185 * i386-tbl.h: Likewise.
187 2018-01-17 Jim Wilson <jimw@sifive.com>
189 * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
191 2018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
193 * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
194 Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
195 CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
196 (cpu_flags): Add CpuIBT, CpuSHSTK.
197 * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
198 (i386_cpu_flags): Add cpuibt, cpushstk.
199 * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
200 * i386-init.h: Regenerate.
201 * i386-tbl.h: Likewise.
203 2018-01-16 Nick Clifton <nickc@redhat.com>
205 * po/pt_BR.po: Updated Brazilian Portugese translation.
206 * po/de.po: Updated German translation.
208 2018-01-15 Jim Wilson <jimw@sifive.com>
210 * riscv-opc.c (match_c_nop): New.
211 (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
213 2018-01-15 Nick Clifton <nickc@redhat.com>
215 * po/uk.po: Updated Ukranian translation.
217 2018-01-13 Nick Clifton <nickc@redhat.com>
219 * po/opcodes.pot: Regenerated.
221 2018-01-13 Nick Clifton <nickc@redhat.com>
223 * configure: Regenerate.
225 2018-01-13 Nick Clifton <nickc@redhat.com>
229 2018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
231 * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
232 * i386-tbl.h: Regenerate.
234 2018-01-10 Jan Beulich <jbeulich@suse.com>
236 * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
237 * i386-tbl.h: Re-generate.
239 2018-01-10 Jan Beulich <jbeulich@suse.com>
241 * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
242 vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
243 vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
244 vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
245 vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
246 Disp8MemShift of AVX512VL forms.
247 * i386-tbl.h: Re-generate.
249 2018-01-09 Jim Wilson <jimw@sifive.com>
251 * riscv-dis.c (maybe_print_address): If base_reg is zero,
252 then the hi_addr value is zero.
254 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
256 * arm-dis.c (arm_opcodes): Add csdb.
257 (thumb32_opcodes): Add csdb.
259 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
261 * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
262 * aarch64-asm-2.c: Regenerate.
263 * aarch64-dis-2.c: Regenerate.
264 * aarch64-opc-2.c: Regenerate.
266 2018-01-08 H.J. Lu <hongjiu.lu@intel.com>
269 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
270 Remove AVX512 vmovd with 64-bit operands.
271 * i386-tbl.h: Regenerated.
273 2018-01-05 Jim Wilson <jimw@sifive.com>
275 * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
278 2018-01-03 Alan Modra <amodra@gmail.com>
280 Update year range in copyright notice of all files.
282 2018-01-02 Jan Beulich <jbeulich@suse.com>
284 * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
285 and OPERAND_TYPE_REGZMM entries.
287 For older changes see ChangeLog-2017
289 Copyright (C) 2018 Free Software Foundation, Inc.
291 Copying and distribution of this file, with or without modification,
292 are permitted in any medium without royalty provided the copyright
293 notice and this notice are preserved.
299 version-control: never