1 2006-07-05 Julian Brown <julian@codesourcery.com>
3 * arm-dis.c (coprocessor): Alter fmsrr disassembly syntax.
5 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
7 * i386-dis.c (dis386_twobyte): Use "nopQ" for 0x1f.
8 (twobyte_has_modrm): Set 1 for 0x1f.
10 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
12 * i386-dis.c (NOP_Fixup): Removed.
14 (NOP_Fixup2): Likewise.
15 (dis386): Use NOP_Fixup1 and NOP_Fixup2 on 0x90.
17 2006-06-12 Julian Brown <julian@codesourcery.com>
19 * arm-dis.c (print_insn_neon): Disassemble 32-bit immediates as signed
22 2006-06-10 H.J. Lu <hongjiu.lu@intel.com>
24 * i386.c (GRP10): Renamed to ...
26 (GRP11): Renamed to ...
28 (GRP12): Renamed to ...
30 (GRP13): Renamed to ...
32 (GRP14): Renamed to ...
34 (dis386_twobyte): Updated.
37 2006-06-09 Nick Clifton <nickc@redhat.com>
39 * po/fi.po: Updated Finnish translation.
41 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
43 * po/Make-in (pdf, ps): New dummy targets.
45 2006-06-06 Paul Brook <paul@codesourcery.com>
47 * arm-dis.c (coprocessor_opcodes): Add %c to unconditional arm
49 (neon_opcodes): Add conditional execution specifiers.
50 (thumb_opcodes): Ditto.
51 (thumb32_opcodes): Ditto.
52 (arm_conditional): Change 0xe to "al" and add "" to end.
53 (ifthen_state, ifthen_next_state, ifthen_address): New.
54 (IFTHEN_COND): Define.
55 (print_insn_coprocessor, print_insn_neon): Print thumb conditions.
56 (print_insn_arm): Change %c to use new values of arm_conditional.
57 (print_insn_thumb16): Print thumb conditions. Add %I.
58 (print_insn_thumb32): Print thumb conditions.
59 (find_ifthen_state): New function.
60 (print_insn): Track IT block state.
62 2006-06-06 Ben Elliston <bje@au.ibm.com>
63 Anton Blanchard <anton@samba.org>
64 Peter Bergner <bergner@vnet.ibm.com>
66 * ppc-dis.c (powerpc_dialect): Handle power6 option.
67 (print_ppc_disassembler_options): Mention power6.
69 2006-06-06 Thiemo Seufer <ths@mips.com>
70 Chao-ying Fu <fu@mips.com>
72 * mips-dis.c: Disassemble DSP64 instructions for MIPS64R2.
73 * mips-opc.c: Add DSP64 instructions.
75 2006-06-06 Alan Modra <amodra@bigpond.net.au>
77 * m68hc11-dis.c (print_insn): Warning fix.
79 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
81 * po/Make-in (top_builddir): Define.
83 2006-06-05 Alan Modra <amodra@bigpond.net.au>
85 * Makefile.am: Run "make dep-am".
86 * Makefile.in: Regenerate.
87 * config.in: Regenerate.
89 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
91 * Makefile.am (INCLUDES): Use @INCINTL@.
92 * acinclude.m4: Include new gettext macros.
93 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
94 Remove local code for po/Makefile.
95 * Makefile.in, aclocal.m4, configure: Regenerated.
97 2006-05-30 Nick Clifton <nickc@redhat.com>
99 * po/es.po: Updated Spanish translation.
101 2006-05-25 Richard Sandiford <richard@codesourcery.com>
103 * m68k-opc.c (m68k_opcodes): Fix the masks of the Coldfire fmovemd
104 and fmovem entries. Put register list entries before immediate
105 mask entries. Use "l" rather than "L" in the fmovem entries.
106 * m68k-dis.c (match_insn_m68k): Remove the PRIV argument and work it
108 (m68k_scan_mask): New function, split out from...
109 (print_insn_m68k): ...here. If no architecture has been set,
110 first try printing an m680x0 instruction, then try a Coldfire one.
112 2006-05-24 Nick Clifton <nickc@redhat.com>
114 * po/ga.po: Updated Irish translation.
116 2006-05-22 Nick Clifton <nickc@redhat.com>
118 * crx-dis.c (EXTRACT): Make macro work on 64-bit hosts.
120 2006-05-22 Nick Clifton <nickc@redhat.com>
122 * po/nl.po: Updated translation.
124 2006-05-18 Alan Modra <amodra@bigpond.net.au>
126 * avr-dis.c: Formatting fix.
128 2006-05-14 Thiemo Seufer <ths@mips.com>
130 * mips16-opc.c (I1, I32, I64): New shortcut defines.
131 (mips16_opcodes): Change membership of instructions to their
134 2006-05-09 H.J. Lu <hongjiu.lu@intel.com>
136 * i386-dis.c (grps): Update sgdt/sidt for 64bit.
138 2006-05-05 Julian Brown <julian@codesourcery.com>
140 * arm-dis.c (coprocessor_opcodes): Don't interpret fldmx/fstmx as
143 2006-05-05 Thiemo Seufer <ths@mips.com>
144 David Ung <davidu@mips.com>
146 * mips-opc.c: Add macro for cache instruction.
148 2006-05-04 Thiemo Seufer <ths@mips.com>
149 Nigel Stephens <nigel@mips.com>
150 David Ung <davidu@mips.com>
152 * mips-dis.c (mips_arch_choices): Add smartmips instruction
153 decoding to MIPS32 and MIPS32R2. Limit DSP decoding to release
154 2 ISAs. Add MIPS3D decoding to MIPS32R2. Add MT decoding to
156 * mips-opc.c: fix random typos in comments.
157 (INSN_SMARTMIPS): New defines.
158 (mips_builtin_opcodes): Add paired single support for MIPS32R2.
159 Move bc3f, bc3fl, bc3t, bc3tl downwards. Move flushi, flushd,
160 flushid, wb upwards. Move cfc3, ctc3 downwards. Rework the
161 FP_S and FP_D flags to denote single and double register
162 accesses separately. Move dmfc3, dmtc3, mfc3, mtc3 downwards.
163 Allow jr.hb and jalr.hb for release 1 ISAs. Allow luxc1, suxc1
164 for MIPS32R2. Add SmartMIPS instructions. Add two-argument
165 variants of bc2f, bc2fl, bc2t, bc2tl. Add mfhc2, mthc2 to
167 * mips16-opc.c (mips16_opcodes): Add sdbbp instruction.
169 2006-05-03 Thiemo Seufer <ths@mips.com>
171 * mips-opc.c (mips_builtin_opcodes): Fix mftr argument order.
173 2006-05-02 Thiemo Seufer <ths@mips.com>
174 Nigel Stephens <nigel@mips.com>
175 David Ung <davidu@mips.com>
177 * mips-dis.c (print_insn_args): Force mips16 to odd addresses.
178 (print_mips16_insn_arg): Force mips16 to odd addresses.
180 2006-04-30 Thiemo Seufer <ths@mips.com>
181 David Ung <davidu@mips.com>
183 * mips-opc.c (mips_builtin_opcodes): Add udi instructions
185 * mips-dis.c (print_insn_args): Adds udi argument handling.
187 2006-04-28 James E Wilson <wilson@specifix.com>
189 * m68k-dis.c (match_insn_m68k): Restore fprintf_func before printing
192 2006-04-28 Thiemo Seufer <ths@mips.com>
193 David Ung <davidu@mips.com>
194 Nigel Stephens <nigel@mips.com>
196 * mips-dis.c (mips_cp0sel_names_mips3264r2): Add MT register
199 2006-04-28 Thiemo Seufer <ths@mips.com>
200 Nigel Stephens <nigel@mips.com>
201 David Ung <davidu@mips.com>
203 * mips-dis.c (print_insn_args): Add mips_opcode argument.
204 (print_insn_mips): Adjust print_insn_args call.
206 2006-04-28 Thiemo Seufer <ths@mips.com>
207 Nigel Stephens <nigel@mips.com>
209 * mips-dis.c (print_insn_args): Print $fcc only for FP
210 instructions, use $cc elsewise.
212 2006-04-28 Thiemo Seufer <ths@mips.com>
213 Nigel Stephens <nigel@mips.com>
215 * opcodes/mips-dis.c (mips16_to_32_reg_map, mips16_reg_names):
216 Map MIPS16 registers to O32 names.
217 (print_mips16_insn_arg): Use mips16_reg_names.
219 2006-04-26 Julian Brown <julian@codesourcery.com>
221 * arm-dis.c (print_insn_neon): Disassemble floating-point constant
224 2006-04-26 Nathan Sidwell <nathan@codesourcery.com>
225 Julian Brown <julian@codesourcery.com>
227 * opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert
228 %<code>[zy] into %[zy]<code>. Expand meaning of %<bitfield>['`?].
229 Add unified load/store instruction names.
230 (neon_opcode_table): New.
231 (arm_opcodes): Expand meaning of %<bitfield>['`?].
232 (arm_decode_bitfield): New.
233 (print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
234 Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
235 (print_insn_neon): New.
236 (print_insn_arm): Adjust print_insn_coprocessor call. Call
237 print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
238 (print_insn_thumb32): Likewise.
240 2006-04-19 Alan Modra <amodra@bigpond.net.au>
242 * Makefile.am: Run "make dep-am".
243 * Makefile.in: Regenerate.
245 2006-04-19 Alan Modra <amodra@bigpond.net.au>
247 * avr-dis.c (avr_operand): Warning fix.
249 * configure: Regenerate.
251 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
253 * po/POTFILES.in: Regenerated.
255 2006-04-12 Hochstein <hochstein@algo.informatik.tu-darmstadt.de>
258 * avr-dis.c (avr_operand): Arrange for a comment to appear before
259 the symolic form of an address, so that the output of objdump -d
262 2006-04-10 DJ Delorie <dj@redhat.com>
264 * m32c-asm.c: Regenerate.
266 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
268 * Makefile.am: Add install-html target.
269 * Makefile.in: Regenerate.
271 2006-04-06 Nick Clifton <nickc@redhat.com>
273 * po/vi/po: Updated Vietnamese translation.
275 2006-03-31 Paul Koning <ni1d@arrl.net>
277 * pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.
279 2006-03-16 Bernd Schmidt <bernd.schmidt@analog.com>
281 * bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
282 logic to identify halfword shifts.
284 2006-03-16 Paul Brook <paul@codesourcery.com>
286 * arm-dis.c (arm_opcodes): Rename swi to svc.
287 (thumb_opcodes): Ditto.
289 2006-03-13 DJ Delorie <dj@redhat.com>
291 * m32c-asm.c: Regenerate.
292 * m32c-desc.c: Likewise.
293 * m32c-desc.h: Likewise.
294 * m32c-dis.c: Likewise.
295 * m32c-ibld.c: Likewise.
296 * m32c-opc.c: Likewise.
297 * m32c-opc.h: Likewise.
299 2006-03-10 DJ Delorie <dj@redhat.com>
301 * m32c-desc.c: Regenerate with mul.l, mulu.l.
302 * m32c-opc.c: Likewise.
303 * m32c-opc.h: Likewise.
306 2006-03-09 Nick Clifton <nickc@redhat.com>
308 * po/sv.po: Updated Swedish translation.
310 2006-03-07 H.J. Lu <hongjiu.lu@intel.com>
313 * i386-dis.c (REP_Fixup): New function.
314 (AL): Remove duplicate.
319 (indirDXr): Likewise.
322 (dis386): Updated entries of ins, outs, movs, lods and stos.
324 2006-03-05 Nick Clifton <nickc@redhat.com>
326 * cgen-ibld.in (insert_normal): Cope with attempts to insert a
327 signed 32-bit value into an unsigned 32-bit field when the host is
329 * fr30-ibld.c: Regenerate.
330 * frv-ibld.c: Regenerate.
331 * ip2k-ibld.c: Regenerate.
332 * iq2000-asm.c: Regenerate.
333 * iq2000-ibld.c: Regenerate.
334 * m32c-ibld.c: Regenerate.
335 * m32r-ibld.c: Regenerate.
336 * openrisc-ibld.c: Regenerate.
337 * xc16x-ibld.c: Regenerate.
338 * xstormy16-ibld.c: Regenerate.
340 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
342 * xc16x-asm.c: Regenerate.
343 * xc16x-dis.c: Regenerate.
345 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
347 * po/Make-in: Add html target.
349 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
351 * i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
352 Intel Merom New Instructions.
353 (THREE_BYTE_0): Likewise.
354 (THREE_BYTE_1): Likewise.
355 (three_byte_table): Likewise.
356 (dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
357 THREE_BYTE_1 for entry 0x3a.
358 (twobyte_has_modrm): Updated.
359 (twobyte_uses_SSE_prefix): Likewise.
360 (print_insn): Handle 3-byte opcodes used by Intel Merom New
363 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
365 * sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
366 (v9_hpriv_reg_names): New table.
367 (print_insn_sparc): Allow values up to 16 for '?' and '!'.
368 New cases '$' and '%' for read/write hyperprivileged register.
369 * sparc-opc.c (sparc_opcodes): Add new entries for UA2005
370 window handling and rdhpr/wrhpr instructions.
372 2006-02-24 DJ Delorie <dj@redhat.com>
374 * m32c-desc.c: Regenerate with linker relaxation attributes.
375 * m32c-desc.h: Likewise.
376 * m32c-dis.c: Likewise.
377 * m32c-opc.c: Likewise.
379 2006-02-24 Paul Brook <paul@codesourcery.com>
381 * arm-dis.c (arm_opcodes): Add V7 instructions.
382 (thumb32_opcodes): Ditto. Handle V7M MSR/MRS variants.
383 (print_arm_address): New function.
384 (print_insn_arm): Use it. Add 'P' and 'U' cases.
385 (psr_name): New function.
386 (print_insn_thumb32): Add 'U', 'C' and 'D' cases.
388 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
390 * ia64-opc-i.c (bXc): New.
392 (OpX2TaTbYaXcC): Likewise.
395 (ia64_opcodes_i): Add instructions for tf.
397 * ia64-opc.h (IMMU5b): New.
399 * ia64-asmtab.c: Regenerated.
401 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
403 * ia64-gen.c: Update copyright years.
404 * ia64-opc-b.c: Likewise.
406 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
408 * ia64-gen.c (lookup_regindex): Handle ".vm".
409 (print_dependency_table): Handle '\"'.
411 * ia64-ic.tbl: Updated from SDM 2.2.
412 * ia64-raw.tbl: Likewise.
413 * ia64-waw.tbl: Likewise.
414 * ia64-asmtab.c: Regenerated.
416 * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
418 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
419 Anil Paranjape <anilp1@kpitcummins.com>
420 Shilin Shakti <shilins@kpitcummins.com>
422 * xc16x-desc.h: New file
423 * xc16x-desc.c: New file
424 * xc16x-opc.h: New file
425 * xc16x-opc.c: New file
426 * xc16x-ibld.c: New file
427 * xc16x-asm.c: New file
428 * xc16x-dis.c: New file
429 * Makefile.am: Entries for xc16x
430 * Makefile.in: Regenerate
431 * cofigure.in: Add xc16x target information.
432 * configure: Regenerate.
433 * disassemble.c: Add xc16x target information.
435 2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
437 * i386-dis.c (dis386_twobyte): Use "movZ" for debug register
440 2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
442 * i386-dis.c ('Z'): Add a new macro.
443 (dis386_twobyte): Use "movZ" for control register moves.
445 2006-02-10 Nick Clifton <nickc@redhat.com>
447 * iq2000-asm.c: Regenerate.
449 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
451 * m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
453 2006-01-26 David Ung <davidu@mips.com>
455 * mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
456 ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
457 floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
458 nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
459 rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
461 2006-01-18 Arnold Metselaar <arnoldm@sourceware.org>
463 * z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
464 ld_d_r, pref_xd_cb): Use signed char to hold data to be
466 * z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
467 buffer overflows when disassembling instructions like
469 * z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
470 operand, if the offset is negative.
472 2006-01-17 Arnold Metselaar <arnoldm@sourceware.org>
474 * z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
475 unsigned char to hold data to be disassembled.
477 2006-01-17 Andreas Schwab <schwab@suse.de>
480 * disassemble.c (disassemble_init_for_target): Set
481 disassembler_needs_relocs for bfd_arch_arm.
483 2006-01-16 Paul Brook <paul@codesourcery.com>
485 * m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
486 f?add?, and f?sub? instructions.
488 2006-01-16 Nick Clifton <nickc@redhat.com>
490 * po/zh_CN.po: New Chinese (simplified) translation.
491 * configure.in (ALL_LINGUAS): Add "zh_CH".
492 * configure: Regenerate.
494 2006-01-05 Paul Brook <paul@codesourcery.com>
496 * m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
498 2006-01-06 DJ Delorie <dj@redhat.com>
500 * m32c-desc.c: Regenerate.
501 * m32c-opc.c: Regenerate.
502 * m32c-opc.h: Regenerate.
504 2006-01-03 DJ Delorie <dj@redhat.com>
506 * cgen-ibld.in (extract_normal): Avoid memory range errors.
507 * m32c-ibld.c: Regenerated.
509 For older changes see ChangeLog-2005
515 version-control: never