[binutils, ARM, 7/16] New BFX and BFLX instruction for Armv8.1-M Mainline
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2019-04-15 Sudakshina Das <sudi.das@arm.com>
2
3 * arm-dis.c (print_insn_thumb32): Add '%<bitfield>S' to print an
4 Arm register with r13 and r15 unpredictable.
5 (thumb32_opcodes): New instructions for bfx and bflx.
6
7 2019-04-15 Sudakshina Das <sudi.das@arm.com>
8
9 * arm-dis.c (thumb32_opcodes): New instructions for bf.
10
11 2019-04-15 Sudakshina Das <sudi.das@arm.com>
12
13 * arm-dis.c (print_insn_thumb32): Updated to accept new %W pattern.
14
15 2019-04-15 Sudakshina Das <sudi.das@arm.com>
16
17 * arm-dis.c (print_insn_thumb32): Updated to accept new %G pattern.
18
19 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
20
21 * arm-dis.c (select_arm_features): Add logic for Armv8.1-M Mainline.
22
23 2019-04-12 John Darrington <john@darrington.wattle.id.au>
24
25 s12z-dis.c, s12z-opc.c, s12z-opc.h: Replace "operator" with
26 "optr". ("operator" is a reserved word in c++).
27
28 2019-04-11 Sudakshina Das <sudi.das@arm.com>
29
30 * aarch64-opc.c (aarch64_print_operand): Add case for
31 AARCH64_OPND_Rt_SP.
32 (verify_constraints): Likewise.
33 * aarch64-tbl.h (QL_LDST_AT): Update to add SP qualifier.
34 (struct aarch64_opcode): Update stg, stzg, st2g, stz2g instructions
35 to accept Rt|SP as first operand.
36 (AARCH64_OPERANDS): Add new Rt_SP.
37 * aarch64-asm-2.c: Regenerated.
38 * aarch64-dis-2.c: Regenerated.
39 * aarch64-opc-2.c: Regenerated.
40
41 2019-04-11 Sudakshina Das <sudi.das@arm.com>
42
43 * aarch64-asm-2.c: Regenerated.
44 * aarch64-dis-2.c: Likewise.
45 * aarch64-opc-2.c: Likewise.
46 * aarch64-tbl.h (aarch64_opcode): Add new ldgm and stgm.
47
48 2019-04-09 Robert Suchanek <robert.suchanek@mips.com>
49
50 * mips-opc.c (mips_builtin_opcodes): Add RDHWR rt rd sel.
51
52 2019-04-08 H.J. Lu <hongjiu.lu@intel.com>
53
54 * i386-opc.tbl: Consolidate AVX512 BF16 entries.
55 * i386-init.h: Regenerated.
56
57 2019-04-07 Alan Modra <amodra@gmail.com>
58
59 * ppc-dis.c (print_insn_powerpc): Use a tiny state machine
60 op_separator to control printing of spaces, comma and parens
61 rather than need_comma, need_paren and spaces vars.
62
63 2019-04-07 Alan Modra <amodra@gmail.com>
64
65 PR 24421
66 * arm-dis.c (print_insn_coprocessor): Correct bracket placement.
67 (print_insn_neon, print_insn_arm): Likewise.
68
69 2019-04-05 Xuepeng Guo <xuepeng.guo@intel.com>
70
71 * i386-dis-evex.h (evex_table): Updated to support BF16
72 instructions.
73 * i386-dis.c (enum): Add EVEX_W_0F3852_P_1, EVEX_W_0F3872_P_1
74 and EVEX_W_0F3872_P_3.
75 * i386-gen.c (cpu_flag_init): Add CPU_AVX512_BF16_FLAGS.
76 (cpu_flags): Add bitfield for CpuAVX512_BF16.
77 * i386-opc.h (enum): Add CpuAVX512_BF16.
78 (i386_cpu_flags): Add bitfield for cpuavx512_bf16.
79 * i386-opc.tbl: Add AVX512 BF16 instructions.
80 * i386-init.h: Regenerated.
81 * i386-tbl.h: Likewise.
82
83 2019-04-05 Alan Modra <amodra@gmail.com>
84
85 * ppc-opc.c (XLBH_MASK): Subtract off BH field from BB_MASK.
86 (powerpc_opcodes): Reorder bcctr and bclr extended mnemonics
87 to favour printing of "-" branch hint when using the "y" bit.
88 Allow BH field on bc{ctr,lr,tar}{,l}{-,+}.
89
90 2019-04-05 Alan Modra <amodra@gmail.com>
91
92 * ppc-dis.c (print_insn_powerpc): Delay printing spaces after
93 opcode until first operand is output.
94
95 2019-04-04 Peter Bergner <bergner@linux.ibm.com>
96
97 PR gas/24349
98 * ppc-opc.c (valid_bo_pre_v2): Add comments.
99 (valid_bo_post_v2): Add support for 'at' branch hints.
100 (insert_bo): Only error on branch on ctr.
101 (get_bo_hint_mask): New function.
102 (insert_boe): Add new 'branch_taken' formal argument. Add support
103 for inserting 'at' branch hints.
104 (extract_boe): Add new 'branch_taken' formal argument. Add support
105 for extracting 'at' branch hints.
106 (insert_bom, extract_bom, insert_bop, extract_bop): New functions.
107 (BOE): Delete operand.
108 (BOM, BOP): New operands.
109 (RM): Update value.
110 (XLYLK, XLYLK_MASK, XLYBB_MASK): Delete.
111 (powerpc_opcodes) <bc-, bcl-, bca-, bcla-, bclr-, bclrl-, bcctr-,
112 bcctrl-, bctar-, bctarl->: Replace BOE with BOM.
113 (powerpc_opcodes) <bc+, bcl+, bca+, bcla+, bclr+, bclrl+, bcctr+,
114 bcctrl+, bctar+, bctarl+>: Replace BOE with BOP.
115 <bdnztar, bdnztarl, bdztar, bdztarl, btar, btarl, bdnztar-, bdnztarl-,
116 bdnztar+, bdnztarl+, bdztar-, bdztarl-, bdztar+, bdztarl+, bgetar,
117 bnltar, bgetarl, bnltarl, bletar, bngtar, bletarl, bngtarl, bnetar,
118 bnetarl, bnstar, bnutar, bnstarl, bnutarl, bgetar-, bnltar-, bgetarl-,
119 bnltarl-, bletar-, bngtar-, bletarl-, bngtarl-, bnetar-, bnetarl-,
120 bnstar-, bnutar-, bnstarl-, bnutarl-, bgetar+, bnltar+, bgetarl+,
121 bnltarl+, bletar+, bngtar+, bletarl+, bngtarl+, bnetar+, bnetarl+,
122 bnstar+, bnutar+, bnstarl+, bnutarl+, blttar, blttarl, bgttar, bgttarl,
123 beqtar, beqtarl, bsotar, buntar, bsotarl, buntarl, blttar-, blttarl-,
124 bgttar-, bgttarl-, beqtar-, beqtarl-, bsotar-, buntar-, bsotarl-,
125 buntarl-, blttar+, blttarl+, bgttar+, bgttarl+, beqtar+, beqtarl+,
126 bsotar+, buntar+, bsotarl+, buntarl+, bdnzftar, bdnzftarl, bdzftar,
127 bdzftarl, bftar, bftarl, bftar-, bftarl-, bftar+, bftarl+, bdnzttar,
128 bdnzttarl, bdzttar, bdzttarl, bttar, bttarl, bttar-, bttarl-, bttar+,
129 bttarl+>: New extended mnemonics.
130
131 2019-03-28 Alan Modra <amodra@gmail.com>
132
133 PR 24390
134 * ppc-opc.c (BTF): Define.
135 (powerpc_opcodes): Use for mtfsb*.
136 * ppc-dis.c (print_insn_powerpc): Print fields with both
137 PPC_OPERAND_CR_REG and PPC_OPERAND_CR_BIT as a plain number.
138
139 2019-03-25 Tamar Christina <tamar.christina@arm.com>
140
141 * arm-dis.c (struct arm_private_data): Remove has_mapping_symbols.
142 (mapping_symbol_for_insn): Implement new algorithm.
143 (print_insn): Remove duplicate code.
144
145 2019-03-25 Tamar Christina <tamar.christina@arm.com>
146
147 * aarch64-dis.c (print_insn_aarch64):
148 Implement override.
149
150 2019-03-25 Tamar Christina <tamar.christina@arm.com>
151
152 * aarch64-dis.c (print_insn_aarch64): Update the mapping symbol search
153 order.
154
155 2019-03-25 Tamar Christina <tamar.christina@arm.com>
156
157 * aarch64-dis.c (last_stop_offset): New.
158 (print_insn_aarch64): Use stop_offset.
159
160 2019-03-19 H.J. Lu <hongjiu.lu@intel.com>
161
162 PR gas/24359
163 * i386-gen.c (cpu_flag_init): Add CPU_ANY_AVX512F_FLAGS to
164 CPU_ANY_AVX2_FLAGS.
165 * i386-init.h: Regenerated.
166
167 2019-03-18 H.J. Lu <hongjiu.lu@intel.com>
168
169 PR gas/24348
170 * i386-opc.tbl: Add Optimize to vmovdqa32, vmovdqa64, vmovdqu8,
171 vmovdqu16, vmovdqu32 and vmovdqu64.
172 * i386-tbl.h: Regenerated.
173
174 2019-03-12 Andreas Krebbel <krebbel@linux.ibm.com>
175
176 * s390-opc.txt: Rename selhhhr to selfhr. Remove optional operand
177 from vstrszb, vstrszh, and vstrszf.
178
179 2019-03-12 Andreas Krebbel <krebbel@linux.ibm.com>
180
181 * s390-opc.txt: Add instruction descriptions.
182
183 2019-02-08 Jim Wilson <jimw@sifive.com>
184
185 * riscv-opc.c (riscv_opcodes) <beq>: Use Cz to compress 3 operand form.
186 <bne>: Likewise.
187
188 2019-02-07 Tamar Christina <tamar.christina@arm.com>
189
190 * arm-dis.c (arm_opcodes): Redefine hlt to armv1.
191
192 2019-02-07 Tamar Christina <tamar.christina@arm.com>
193
194 PR binutils/23212
195 * aarch64-opc.h (enum aarch64_field_kind): Add FLD_sz.
196 * aarch64-opc.c (verify_elem_sd): New.
197 (fields): Add FLD_sz entr.
198 * aarch64-tbl.h (_SIMD_INSN): New.
199 (aarch64_opcode_table): Add elem_sd verifier to fmla, fmls, fmul and
200 fmulx scalar and vector by element isns.
201
202 2019-02-07 Nick Clifton <nickc@redhat.com>
203
204 * po/sv.po: Updated Swedish translation.
205
206 2019-01-31 Andreas Krebbel <krebbel@linux.ibm.com>
207
208 * s390-mkopc.c (main): Accept arch13 as cpu string.
209 * s390-opc.c: Add new instruction formats and instruction opcode
210 masks.
211 * s390-opc.txt: Add new arch13 instructions.
212
213 2019-01-25 Sudakshina Das <sudi.das@arm.com>
214
215 * aarch64-tbl.h (QL_LDST_AT): Update macro.
216 (aarch64_opcode): Change encoding for stg, stzg
217 st2g and st2zg.
218 * aarch64-asm-2.c: Regenerated.
219 * aarch64-dis-2.c: Regenerated.
220 * aarch64-opc-2.c: Regenerated.
221
222 2019-01-25 Sudakshina Das <sudi.das@arm.com>
223
224 * aarch64-asm-2.c: Regenerated.
225 * aarch64-dis-2.c: Likewise.
226 * aarch64-opc-2.c: Likewise.
227 * aarch64-tbl.h (aarch64_opcode): Add new stzgm.
228
229 2019-01-25 Sudakshina Das <sudi.das@arm.com>
230 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
231
232 * aarch64-asm.c (aarch64_ins_addr_simple_2): Remove.
233 * aarch64-asm.h (ins_addr_simple_2): Likeiwse.
234 * aarch64-dis.c (aarch64_ext_addr_simple_2): Likewise.
235 * aarch64-dis.h (ext_addr_simple_2): Likewise.
236 * aarch64-opc.c (operand_general_constraint_met_p): Remove
237 case for ldstgv_indexed.
238 (aarch64_print_operand): Remove case for AARCH64_OPND_ADDR_SIMPLE_2.
239 * aarch64-tbl.h (struct aarch64_opcode): Remove ldgv and stgv.
240 (AARCH64_OPERANDS): Remove ADDR_SIMPLE_2.
241 * aarch64-asm-2.c: Regenerated.
242 * aarch64-dis-2.c: Regenerated.
243 * aarch64-opc-2.c: Regenerated.
244
245 2019-01-23 Nick Clifton <nickc@redhat.com>
246
247 * po/pt_BR.po: Updated Brazilian Portuguese translation.
248
249 2019-01-21 Nick Clifton <nickc@redhat.com>
250
251 * po/de.po: Updated German translation.
252 * po/uk.po: Updated Ukranian translation.
253
254 2019-01-20 Chenghua Xu <paul.hua.gm@gmail.com>
255 * mips-dis.c (mips_arch_choices): Fix typo in
256 gs464, gs464e and gs264e descriptors.
257
258 2019-01-19 Nick Clifton <nickc@redhat.com>
259
260 * configure: Regenerate.
261 * po/opcodes.pot: Regenerate.
262
263 2018-06-24 Nick Clifton <nickc@redhat.com>
264
265 2.32 branch created.
266
267 2019-01-09 John Darrington <john@darrington.wattle.id.au>
268
269 * s12z-dis.c (print_insn_s12z): Do not dereference an operand
270 if it is null.
271 -dis.c (opr_emit_disassembly): Do not omit an index if it is
272 zero.
273
274 2019-01-09 Andrew Paprocki <andrew@ishiboo.com>
275
276 * configure: Regenerate.
277
278 2019-01-07 Alan Modra <amodra@gmail.com>
279
280 * configure: Regenerate.
281 * po/POTFILES.in: Regenerate.
282
283 2019-01-03 John Darrington <john@darrington.wattle.id.au>
284
285 * s12z-opc.c: New file.
286 * s12z-opc.h: New file.
287 * s12z-dis.c: Removed all code not directly related to display
288 of instructions. Used the interface provided by the new files
289 instead.
290 * Makefile.am (TARGET_LIBOPCODES_CFILES) Add s12z-opc.c.
291 * Makefile.in: Regenerate.
292 * configure.ac (bfd_s12z_arch): Correct the dependencies.
293 * configure: Regenerate.
294
295 2019-01-01 Alan Modra <amodra@gmail.com>
296
297 Update year range in copyright notice of all files.
298
299 For older changes see ChangeLog-2018
300 \f
301 Copyright (C) 2019 Free Software Foundation, Inc.
302
303 Copying and distribution of this file, with or without modification,
304 are permitted in any medium without royalty provided the copyright
305 notice and this notice are preserved.
306
307 Local Variables:
308 mode: change-log
309 left-margin: 8
310 fill-column: 74
311 version-control: never
312 End:
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