opcodes/ChangeLog

   1 2011-06-03  Nick Clifton  <nickc@redhat.com>
   2
   3         PR binutils/12752
   4         * arm-dis.c (print_insn_coprocessor): Use bfd_vma type for
   5         computing address offsets.
   6         (print_arm_address): Likewise.
   7         (print_insn_arm): Likewise.
   8         (print_insn_thumb16): Likewise.
   9         (print_insn_thumb32): Likewise.
  10
  11 2011-06-02  Jie Zhang <jie@codesourcery.com>
  12             Nathan Sidwell <nathan@codesourcery.com>
  13             Maciej Rozycki <macro@codesourcery.com>
  14
  15         * arm-dis.c (print_insn_coprocessor): Explicitly print #-0
  16         as address offset.
  17         (print_arm_address): Likewise. Elide positive #0 appropriately.
  18         (print_insn_arm): Likewise.
  19
  20 2011-06-02  Nick Clifton  <nickc@redhat.com>
  21
  22         PR gas/12752
  23         * arm-dis.c (print_insn_thumb32): Do not sign extend  addresses
  24         passed to print_address_func.
  25
  26 2011-06-02  Nick Clifton  <nickc@redhat.com>
  27
  28         * arm-dis.c: Fix spelling mistakes.
  29         * op/opcodes.pot: Regenerate.
  30
  31 2011-05-24  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
  32
  33         * s390-opc.c: Replace S390_OPERAND_REG_EVEN with
  34         S390_OPERAND_REG_PAIR.  Fix INSTR_RRF_0UFEF instruction type.
  35         * s390-opc.txt: Fix cxr instruction type.
  36
  37 2011-05-24  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
  38
  39         * s390-opc.c: Add new instruction types marking register pair
  40         operands.
  41         * s390-opc.txt: Match instructions having register pair operands
  42         to the new instruction types.
  43
  44 2011-05-19  Nick Clifton  <nickc@redhat.com>
  45
  46         * v850-opc.c (cmpf.[sd]): Reverse the order of the reg1 and reg2
  47         operands.
  48
  49 2011-05-10  Quentin Neill  <quentin.neill@amd.com>
  50
  51         * i386-gen.c (cpu_flag_init): Add new CPU_BDVER2_FLAGS.
  52         * i386-init.h: Regenerated.
  53
  54 2011-04-27  Nick Clifton  <nickc@redhat.com>
  55
  56         * po/da.po: Updated Danish translation.
  57
  58 2011-04-26  Anton Blanchard  <anton@samba.org>
  59
  60         * ppc-opc.c: (powerpc_opcodes): Enable icswx for POWER7.
  61
  62 2011-04-21  DJ Delorie  <dj@redhat.com>
  63
  64         * rx-decode.opc (rx_decode_opcode): Set the syntax for multi-byte NOPs.
  65         * rx-decode.c: Regenerate.
  66
  67 2011-04-20  H.J. Lu  <hongjiu.lu@intel.com>
  68
  69         * i386-init.h: Regenerated.
  70
  71 2011-04-19  Quentin Neill  <quentin.neill@amd.com>
  72
  73         * i386-gen.c (cpu_flag_init): Remove 3dnow and 3dnowa bits
  74         from bdver1 flags.
  75
  76 2011-04-13  Nick Clifton  <nickc@redhat.com>
  77
  78         * v850-dis.c (disassemble): Always print a closing square brace if
  79         an opening square brace was printed.
  80
  81 2011-04-12  Nick Clifton  <nickc@redhat.com>
  82
  83         PR binutils/12534
  84         * arm-dis.c (thumb32_opcodes): Add %L suffix to LDRD and STRD insn
  85         patterns.
  86         (print_insn_thumb32): Handle %L.
  87
  88 2011-04-11  Julian Brown  <julian@codesourcery.com>
  89
  90         * arm-dis.c (psr_name): Fix typo for BASEPRI_MAX.
  91         (print_insn_thumb32): Add APSR bitmask support.
  92
  93 2011-04-07  Paul Carroll<pcarroll@codesourcery.com>
  94
  95         * arm-dis.c (print_insn): init vars moved into private_data structure.
  96
  97 2011-03-24  Mike Frysinger  <vapier@gentoo.org>
  98
  99         * bfin-dis.c (decode_dsp32mac_0): Move MM zeroing down to MAC0 logic.
 100
 101 2011-03-22  Eric B. Weddington  <eric.weddington@atmel.com>
 102
 103         * avr-dis.c (avr_operand): Add opcode_str parameter. Check for
 104         post-increment to support LPM Z+ instruction. Add support for 'E'
 105         constraint for DES instruction.
 106         (print_insn_avr): Adjust calls to avr_operand. Rename variable.
 107
 108 2011-03-14  Richard Sandiford  <richard.sandiford@linaro.org>
 109
 110         * arm-dis.c (get_sym_code_type): Treat STT_GNU_IFUNCs as code.
 111
 112 2011-03-14  Richard Sandiford  <richard.sandiford@linaro.org>
 113
 114         * arm-dis.c (get_sym_code_type): Don't check for STT_ARM_TFUNC.
 115         Use branch types instead.
 116         (print_insn): Likewise.
 117
 118 2011-02-28  Maciej W. Rozycki  <macro@codesourcery.com>
 119
 120         * mips-opc.c (mips_builtin_opcodes): Correct register use
 121         annotation of "alnv.ps".
 122
 123 2011-02-28  Maciej W. Rozycki  <macro@codesourcery.com>
 124
 125         * mips-opc.c (mips_builtin_opcodes): Add "pref" macro.
 126
 127 2011-02-22  Mike Frysinger  <vapier@gentoo.org>
 128
 129         * bfin-dis.c (OUTS): Remove p NULL check and txt NUL check.
 130
 131 2011-02-22  Mike Frysinger  <vapier@gentoo.org>
 132
 133         * bfin-dis.c (print_insn_bfin): Change outf->fprintf_func to OUTS.
 134
 135 2011-02-19  Mike Frysinger  <vapier@gentoo.org>
 136
 137         * bfin-dis.c (saved_state): Mark static.  Change a[01]x to ax[] and
 138         a[01]w to aw[].  Delete ac0, ac0_copy, ac1, an, aq, av0, av0s, av1,
 139         av1s, az, cc, v, v_copy, vs, rnd_mod, v_internal, pc, ticks, insts,
 140         exception, end_of_registers, msize, memory, bfd_mach.
 141         (CCREG, PCREG, A0XREG, A0WREG, A1XREG, A1WREG, LC0REG, LT0REG,
 142         LB0REG, LC1REG, LT1REG, LB1REG): Delete
 143         (AXREG, AWREG, LCREG, LTREG, LBREG): Define.
 144         (get_allreg): Change to new defines.  Fallback to abort().
 145
 146 2011-02-14  Mike Frysinger  <vapier@gentoo.org>
 147
 148         * bfin-dis.c: Add whitespace/parenthesis where needed.
 149
 150 2011-02-14  Mike Frysinger  <vapier@gentoo.org>
 151
 152         * bfin-dis.c (decode_LoopSetup_0): Return when reg is greater
 153         than 7.
 154
 155 2011-02-13  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 156
 157         * configure: Regenerate.
 158
 159 2011-02-13  Mike Frysinger  <vapier@gentoo.org>
 160
 161         * bfin-dis.c (decode_dsp32alu_0): Fix typo with A1 reg.
 162
 163 2011-02-13  Mike Frysinger  <vapier@gentoo.org>
 164
 165         * bfin-dis.c (decode_dsp32mult_0): Add 1 to dst for mac1.  Output
 166         dregs only when P is set, and dregs_lo otherwise.
 167
 168 2011-02-13  Mike Frysinger  <vapier@gentoo.org>
 169
 170         * bfin-dis.c (decode_dsp32alu_0): Delete BYTEOP2M code.
 171
 172 2011-02-12  Mike Frysinger  <vapier@gentoo.org>
 173
 174         * bfin-dis.c (decode_pseudoDEBUG_0): Add space after PRNT.
 175
 176 2011-02-12  Mike Frysinger  <vapier@gentoo.org>
 177
 178         * bfin-dis.c (machine_registers): Delete REG_GP.
 179         (reg_names): Delete "GP".
 180         (decode_allregs): Change REG_GP to REG_LASTREG.
 181
 182 2011-02-12  Mike Frysinger  <vapier@gentoo.org>
 183
 184         * bfin-dis.c (M_S2RND, M_T, M_W32, M_FU, M_TFU, M_IS, M_ISS2,
 185         M_IH, M_IU): Delete.
 186
 187 2011-02-11  Mike Frysinger  <vapier@gentoo.org>
 188
 189         * bfin-dis.c (reg_names): Add const.
 190         (decode_dregs_lo, decode_dregs_hi, decode_dregs, decode_dregs_byte,
 191         decode_pregs, decode_iregs, decode_mregs, decode_dpregs, decode_gregs,
 192         decode_regs, decode_regs_lo, decode_regs_hi, decode_statbits,
 193         decode_counters, decode_allregs): Likewise.
 194
 195 2011-02-09  Michael Snyder  <msnyder@vmware.com>
 196
 197         * i386-dis.c (OP_J): Parenthesize expression to prevent
 198         truncated addresses.
 199         (print_insn): Fix indentation off-by-one.
 200
 201 2011-02-01  Nick Clifton  <nickc@redhat.com>
 202
 203         * po/da.po: Updated Danish translation.
 204
 205 2011-01-21  Dave Murphy  <davem@devkitpro.org>
 206
 207         * ppc-opc.c (NON32, NO371): Remove PPC_OPCODE_PPCPS.
 208
 209 2011-01-18  H.J. Lu  <hongjiu.lu@intel.com>
 210
 211         * i386-dis.c (sIbT): New.
 212         (b_T_mode): Likewise.
 213         (dis386): Replace sIb with sIbT on "pushT".
 214         (x86_64_table): Replace sIb with Ib on "aam" and "aad".
 215         (OP_sI): Handle b_T_mode.  Properly sign-extend byte.
 216
 217 2011-01-18  Jan Kratochvil  <jan.kratochvil@redhat.com>
 218
 219         * i386-init.h: Regenerated.
 220         * i386-tbl.h: Regenerated
 221
 222 2011-01-17  Quentin Neill  <quentin.neill@amd.com>
 223
 224         * i386-dis.c (REG_XOP_TBM_01): New.
 225         (REG_XOP_TBM_02): New.
 226         (reg_table): Add REG_XOP_TBM_01 and REG_XOP_TBM_02 tables.
 227         (xop_table): Redirect to REG_XOP_TBM_01 and REG_XOP_TBM_02
 228         entries, and add bextr instruction.
 229
 230         * i386-gen.c (cpu_flag_init): Add CPU_TBM_FLAGS, CpuTBM.
 231         (cpu_flags): Add CpuTBM.
 232
 233         * i386-opc.h (CpuTBM) New.
 234         (i386_cpu_flags): Add bit cputbm.
 235
 236         * i386-opc.tbl: Add bextr, blcfill, blci, blcic, blcmsk,
 237         blcs, blsfill, blsic, t1mskc, and tzmsk.
 238
 239 2011-01-12  DJ Delorie  <dj@redhat.com>
 240
 241         * rx-dis.c (print_insn_rx): Support RX_Operand_TwoReg.
 242
 243 2011-01-11  Mingjie Xing  <mingjie.xing@gmail.com>
 244
 245         * mips-dis.c (print_insn_args): Adjust the value to print the real
 246         offset for "+c" argument.
 247
 248 2011-01-10  Nick Clifton  <nickc@redhat.com>
 249
 250         * po/da.po: Updated Danish translation.
 251
 252 2011-01-05  Nathan Sidwell  <nathan@codesourcery.com>
 253
 254         * arm-dis.c (thumb32_opcodes): BLX must have bit zero clear.
 255
 256 2011-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 257
 258         * i386-dis.c (REG_VEX_38F3): New.
 259         (PREFIX_0FBC): Likewise.
 260         (PREFIX_VEX_38F2): Likewise.
 261         (PREFIX_VEX_38F3_REG_1): Likewise.
 262         (PREFIX_VEX_38F3_REG_2): Likewise.
 263         (PREFIX_VEX_38F3_REG_3): Likewise.
 264         (PREFIX_VEX_38F7): Likewise.
 265         (VEX_LEN_38F2_P_0): Likewise.
 266         (VEX_LEN_38F3_R_1_P_0): Likewise.
 267         (VEX_LEN_38F3_R_2_P_0): Likewise.
 268         (VEX_LEN_38F3_R_3_P_0): Likewise.
 269         (VEX_LEN_38F7_P_0): Likewise.
 270         (dis386_twobyte): Use PREFIX_0FBC.
 271         (reg_table): Add REG_VEX_38F3.
 272         (prefix_table): Add PREFIX_0FBC, PREFIX_VEX_38F2,
 273         PREFIX_VEX_38F3_REG_1, PREFIX_VEX_38F3_REG_2,
 274         PREFIX_VEX_38F3_REG_3 and PREFIX_VEX_38F7.
 275         (vex_table): Use PREFIX_VEX_38F2, REG_VEX_38F3 and
 276         PREFIX_VEX_38F7.
 277         (vex_len_table): Add VEX_LEN_38F2_P_0, VEX_LEN_38F3_R_1_P_0,
 278         VEX_LEN_38F3_R_2_P_0, VEX_LEN_38F3_R_3_P_0 and
 279         VEX_LEN_38F7_P_0.
 280
 281         * i386-gen.c (cpu_flag_init): Add CPU_BMI_FLAGS.
 282         (cpu_flags): Add CpuBMI.
 283
 284         * i386-opc.h (CpuBMI): New.
 285         (i386_cpu_flags): Add cpubmi.
 286
 287         * i386-opc.tbl: Add andn, bextr, blsi, blsmsk, blsr and tzcnt.
 288         * i386-init.h: Regenerated.
 289         * i386-tbl.h: Likewise.
 290
 291 2011-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 292
 293         * i386-dis.c (VexGdq): New.
 294         (OP_VEX): Handle dq_mode.
 295
 296 2011-01-01  H.J. Lu  <hongjiu.lu@intel.com>
 297
 298         * i386-gen.c (process_copyright): Update copyright to 2011.
 299
 300 For older changes see ChangeLog-2010
 301 \f
 302 Local Variables:
 303 mode: change-log
 304 left-margin: 8
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 306 version-control: never
 307 End: