1 2012-10-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
3 * arm-dis.c: Use preferred form of vrint instruction variants
6 2012-10-09 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
8 * i386-gen.c (cpu_flag_init): Add CPU_BDVER3_FLAGS.
9 * i386-init.h: Regenerated.
11 2012-10-05 Peter Bergner <bergner@vnet.ibm.com>
13 * ppc-dis.c (ppc_opts) <altivec>: Use PPC_OPCODE_ALTIVEC2;
14 * ppc-opc.c (VBA): New define.
15 (powerpc_opcodes) <vcuxwfp, vcsxwfp, vcfpuxws, vcfpsxsw, vmr, vnot,
16 mfppr, mfppr32, mtppr, mtppr32>: New extended mnemonics.
18 2012-10-04 Nick Clifton <nickc@redhat.com>
20 * v850-dis.c (disassemble): Place square parentheses around second
21 register operand of clr1, not1, set1 and tst1 instructions.
23 2012-10-04 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
25 * s390-mkopc.c: Support new option zEC12.
26 * s390-opc.c: Add new instruction formats.
27 * s390-opc.txt: Add new instructions for zEC12.
29 2012-09-27 Anthony Green <green@moxielogic.com>
31 * moxie-dis.c (print_insn_moxie): Print 'bad' instructions.
32 * moxie-opc.c: All 'bad' instructions have the itype MOXIE_BAD.
34 2012-09-25 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
36 * i386-gen.c (cpu_flag_init): Add missing Cpu flags in
37 CPU_BDVER1_FLAGS, CPU_BDVER2_FLAGS, CPU_BTVER1_FLAGS
39 * i386-init.h: Regenerated.
41 2012-09-20 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
43 * i386-gen.c (cpu_flag_init): Add CpuCX16 to CPU_NOCONA_FLAGS,
44 CPU_CORE_FLAGS, CPU_CORE2_FLAGS, CPU_COREI7_FLAGS,
45 CPU_BDVER1_FLAGS, CPU_BDVER2_FLAGS, CPU_BTVER1_FLAGS,
46 CPU_BTVER2_FLAGS. Add CPU_CX16_FLAGS.
47 (cpu_flags): Add CpuCX16.
48 * i386-opc.h (CpuCX16): New.
49 (i386_cpu_flags): Add cpucx16.
50 * i386-opc.tbl: Replace CpuSSE3 with CpuCX16 for cmpxchg16b.
51 * i386-tbl.h: Regenerate.
52 * i386-init.h: Likewise.
54 2012-09-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
56 * arm-dis.c: Changed ldra and strl-form mnemonics
59 2012-09-18 Chao-ying Fu <fu@mips.com>
61 * micromips-opc.c (micromips_opcodes): Correct the encoding of
62 the "swxc1" instruction.
64 2012-09-17 Yufeng Zhang <yufeng.zhang@arm.com>
66 * aarch64-asm.c (aarch64_ins_imm_half): Remove ATTRIBUTE_UNUSED from
68 (aarch64_ins_addr_simm): Add ATTRIBUTE_UNUSED to the parameter 'inst'.
69 (convert_mov_to_movewide): Change to assert (0) when
70 aarch64_wide_constant_p returns FALSE.
72 2012-09-14 David Edelsohn <dje.gcc@gmail.com>
74 * configure: Regenerate.
76 2012-09-14 Anthony Green <green@moxielogic.com>
78 * moxie-dis.c (print_insn_moxie): Branch targets are relative to
79 the address after the branch instruction.
81 2012-09-13 Anthony Green <green@moxielogic.com>
83 * moxie-dis.c (print_insn_moxie): Handle bi-endian encodings.
85 2012-09-10 Matthias Klose <doko@ubuntu.com>
87 * config.in: Disable sanity check for kfreebsd.
89 2012-09-10 H.J. Lu <hongjiu.lu@intel.com>
91 * configure: Regenerated.
93 2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
95 * ia64-asmtab.h (completer_index): Extend bitfield to full uint.
96 * ia64-gen.c: Promote completer index type to longlong.
97 (irf_operand): Add new register recognition.
98 (in_iclass_mov_x): Add an entry for the new mov_* instruction type.
99 (lookup_specifier): Add new resource recognition.
100 (insert_bit_table_ent): Relax abort condition according to the
101 changed completer index type.
102 (print_dis_table): Fix printf format for completer index.
103 * ia64-ic.tbl: Add a new instruction class.
104 * ia64-opc-i.c (ia64_opcodes_i): Define new I-instructions.
105 * ia64-opc-m.c (ia64_opcodes_m): Define new M-instructions.
106 * ia64-opc.h: Define short names for new operand types.
107 * ia64-raw.tbl: Add new RAW resource for DAHR register.
108 * ia64-waw.tbl: Add new WAW resource for DAHR register.
109 * ia64-asmtab.c: Regenerate.
111 2012-08-29 Peter Bergner <bergner@vnet.ibm.com>
113 * ppc-opc.c (VXASHB_MASK): New define.
114 (powerpc_opcodes) <vsldoi>: Use VXASHB_MASK.
116 2012-08-28 Peter Bergner <bergner@vnet.ibm.com>
118 * ppc-opc.c (UIMM4, UIMM3, UIMM2, VXVA_MASK, VXVB_MASK, VXVAVB_MASK,
119 VXVDVA_MASK, VXUIMM4_MASK, VXUIMM3_MASK, VXUIMM2_MASK): New defines.
120 (powerpc_opcodes) <vexptefp, vlogefp, vrefp, vrfim, vrfin, vrfip,
121 vrfiz, vrsqrtefp, vupkhpx, vupkhsb, vupkhsh, vupklpx, vupklsb,
122 vupklsh>: Use VXVA_MASK.
123 <vspltisb, vspltish, vspltisw>: Use VXVB_MASK.
124 <mfvscr>: Use VXVAVB_MASK.
125 <mtvscr>: Use VXVDVA_MASK.
126 <vspltb>: Use VXUIMM4_MASK.
127 <vsplth>: Use VXUIMM3_MASK.
128 <vspltw>: Use VXUIMM2_MASK.
130 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
132 * arm-dis.c (neon_opcodes): Add 2 operand sha instructions.
134 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
136 * arm-dis.c (neon_opcodes): Add SHA 3-operand instructions.
138 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
140 * arm-dis.c (neon_opcodes): Handle VMULL.P64.
142 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
144 * arm-dis.c (neon_opcodes): Add support for AES instructions.
146 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
148 * arm-dis.c (coprocessor_opcodes): Add support for HP/DP
151 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
153 * arm-dis.c (coprocessor_opcodes): Add VRINT.
154 (neon_opcodes): Likewise.
156 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
158 * arm-dis.c (coprocessor_opcodes): Add support for new VCVT
160 (neon_opcodes): Likewise.
162 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
164 * arm-dis.c (coprocessor_opcodes): Add VMAXNM/VMINNM.
165 (neon_opcodes): Likewise.
167 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
169 * arm-dis.c (coprocessor_opcodes): Add VSEL.
170 (print_insn_coprocessor): Add new %<>c bitfield format
173 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
175 * arm-dis.c (arm_opcodes): Add LDRA/STRL instructions.
176 (thumb32_opcodes): Likewise.
177 (print_arm_insn): Add support for %<>T formatter.
179 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
181 * arm-dis.c (arm_opcodes): Add HLT.
182 (thumb_opcodes): Likewise.
184 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
186 * arm-dis.c (thumb32_opcodes): Add DCPS instruction.
188 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
190 * arm-dis.c (arm_opcodes): Add SEVL.
191 (thumb_opcodes): Likewise.
192 (thumb32_opcodes): Likewise.
194 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
196 * arm-dis.c (data_barrier_option): New function.
197 (print_insn_arm): Use data_barrier_option.
198 (print_insn_thumb32): Use data_barrier_option.
200 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com
202 * arm-dis.c (COND_UNCOND): New constant.
203 (print_insn_coprocessor): Add support for %u format specifier.
204 (print_insn_neon): Likewise.
206 2012-08-21 David S. Miller <davem@davemloft.net>
208 * sparc-opc.c (4-argument crypto instructions): Fix encoding using
211 2012-08-20 Edmar Wienskoski <edmar@freescale.com>
213 * ppc-opc.c (powerpc_opcodes): Changed opcode for vabsdub,
214 vabsduh, vabsduw, mviwsplt.
216 2012-08-17 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
218 * i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and
221 * i386-opc.h: Update CpuPRFCHW comment.
223 * i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW.
224 * i386-init.h: Regenerated.
225 * i386-tbl.h: Likewise.
227 2012-08-17 Nick Clifton <nickc@redhat.com>
229 * po/uk.po: New Ukranian translation.
230 * configure.in (ALL_LINGUAS): Add uk.
231 * configure: Regenerate.
233 2012-08-16 Peter Bergner <bergner@vnet.ibm.com>
235 * ppc-opc.c (powerpc_opcodes) <"lswx">: Use RAX for the second and
236 RBX for the third operand.
237 <"lswi">: Use RAX for second and NBI for the third operand.
239 2012-08-15 DJ Delorie <dj@redhat.com>
241 * rl78-decode.opc (rl78_decode_opcode): Merge %e and %[01]
242 operands, so that data addresses can be corrected when not
244 * rl78-decode.c: Regenerate.
245 * rl78-dis.c (print_insn_rl78): Make order of modifiers
246 irrelevent. When the 'e' specifier is used on an operand and no
247 ES prefix is provided, adjust address to make it absolute.
249 2012-08-15 Peter Bergner <bergner@vnet.ibm.com>
251 * ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR.
253 2012-08-15 Peter Bergner <bergner@vnet.ibm.com>
255 * ppc-opc.c <xnop, yield, mdoio, mdoom>: New extended mnemonics.
257 2012-08-14 Maciej W. Rozycki <macro@codesourcery.com>
259 * mips-dis.c (print_insn_args): Add GET_OP and GET_OP_S local
260 macros, use local variables for info struct member accesses,
261 update the type of the variable used to hold the instruction
263 (print_insn_mips, print_mips16_insn_arg): Likewise.
264 (print_insn_mips16): Add GET_OP and GET_OP_S local macros, use
265 local variables for info struct member accesses.
266 (print_insn_micromips): Add GET_OP_S local macro.
267 (_print_insn_mips): Update the type of the variable used to hold
268 the instruction word.
270 2012-08-13 Ian Bolton <ian.bolton@arm.com>
271 Laurent Desnogues <laurent.desnogues@arm.com>
272 Jim MacArthur <jim.macarthur@arm.com>
273 Marcus Shawcroft <marcus.shawcroft@arm.com>
274 Nigel Stephens <nigel.stephens@arm.com>
275 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
276 Richard Earnshaw <rearnsha@arm.com>
277 Sofiane Naci <sofiane.naci@arm.com>
278 Tejas Belagod <tejas.belagod@arm.com>
279 Yufeng Zhang <yufeng.zhang@arm.com>
281 * Makefile.am: Add AArch64.
282 * Makefile.in: Regenerate.
283 * aarch64-asm.c: New file.
284 * aarch64-asm.h: New file.
285 * aarch64-dis.c: New file.
286 * aarch64-dis.h: New file.
287 * aarch64-gen.c: New file.
288 * aarch64-opc.c: New file.
289 * aarch64-opc.h: New file.
290 * aarch64-tbl.h: New file.
291 * configure.in: Add AArch64.
292 * configure: Regenerate.
293 * disassemble.c: Add AArch64.
294 * aarch64-asm-2.c: New file (automatically generated).
295 * aarch64-dis-2.c: New file (automatically generated).
296 * aarch64-opc-2.c: New file (automatically generated).
297 * po/POTFILES.in: Regenerate.
299 2012-08-13 Maciej W. Rozycki <macro@codesourcery.com>
301 * micromips-opc.c (micromips_opcodes): Update comment.
302 * mips-opc.c (mips_builtin_opcodes): Likewise. Mark coprocessor
303 instructions for IOCT as appropriate.
304 * mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with
306 * configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with
307 the result of a check for the -Wno-missing-field-initializers
309 * Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable.
310 (mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to
312 (mips16-opc.lo): Likewise.
313 (micromips-opc.lo): Likewise.
314 * aclocal.m4: Regenerate.
315 * configure: Regenerate.
316 * Makefile.in: Regenerate.
318 2012-08-11 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
321 * i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS.
322 * i386-init.h: Regenerated.
324 2012-08-09 Nick Clifton <nickc@redhat.com>
326 * po/vi.po: Updated Vietnamese translation.
328 2012-08-07 Roland McGrath <mcgrathr@google.com>
330 * i386-dis.c (reg_table): Fill out REG_0F0D table with
331 AMD-reserved cases as "prefetch".
332 (MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants.
333 (MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise.
334 (reg_table): Use those under REG_0F18.
335 (mod_table): Add those cases as "nop/reserved".
337 2012-08-07 Jan Beulich <jbeulich@suse.com>
339 * i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
341 2012-08-06 Roland McGrath <mcgrathr@google.com>
343 * i386-dis.c (print_insn): Print spaces between multiple excess
344 prefixes. Return actual number of excess prefixes consumed,
347 * i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
349 2012-08-06 Roland McGrath <mcgrathr@google.com>
350 Victor Khimenko <khim@google.com>
351 H.J. Lu <hongjiu.lu@intel.com>
353 * i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG.
354 (putop): For 'T', 'U', and 'V', treat REX_W like DFLAG.
355 (intel_operand_size): For stack_v_mode, treat REX_W like DFLAG.
356 (OP_E_register): Likewise.
357 (OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
359 2012-08-02 Jan-Benedict Glaw <jbglaw@lug-owl.de>
361 * configure.in: Formatting.
362 * configure: Regenerate.
364 2012-08-01 Alan Modra <amodra@gmail.com>
366 * h8300-dis.c: Fix printf arg warnings.
367 * i960-dis.c: Likewise.
368 * mips-dis.c: Likewise.
369 * pdp11-dis.c: Likewise.
370 * sh-dis.c: Likewise.
371 * v850-dis.c: Likewise.
372 * configure.in: Formatting.
373 * configure: Regenerate.
374 * rl78-decode.c: Regenerate.
375 * po/POTFILES.in: Regenerate.
377 2012-07-31 Chao-Ying Fu <fu@mips.com>
378 Catherine Moore <clm@codesourcery.com>
379 Maciej W. Rozycki <macro@codesourcery.com>
381 * micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
382 (DSP_VOLA): Likewise.
383 (D32, D33): Likewise.
384 (micromips_opcodes): Add DSP ASE instructions.
385 * mips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
386 <'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
388 2012-07-31 Jan Beulich <jbeulich@suse.com>
390 * i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2
391 instruction group. Mark as requiring AVX2.
392 * i386-tbl.h: Re-generate.
394 2012-07-30 Nick Clifton <nickc@redhat.com>
396 * po/opcodes.pot: Updated template.
397 * po/es.po: Updated Spanish translation.
398 * po/fi.po: Updated Finnish translation.
400 2012-07-27 Mike Frysinger <vapier@gentoo.org>
402 * configure.in (BFD_VERSION): Run bfd/configure --version and
403 parse the output of that.
404 * configure: Regenerate.
406 2012-07-25 James Lemke <jwlemke@codesourcery.com>
408 * ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
410 2012-07-24 Stephan McCamant <smcc@cs.berkeley.edu>
411 Dr David Alan Gilbert <dave@treblig.org>
414 * arm-dis.c: Add necessary casts for printing integer values.
415 Use %s when printing string values.
416 * hppa-dis.c: Likewise.
417 * m68k-dis.c: Likewise.
418 * microblaze-dis.c: Likewise.
419 * mips-dis.c: Likewise.
420 * sparc-dis.c: Likewise.
422 2012-07-19 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
425 * i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
426 (VEX_LEN_0FXOP_08_CD): Likewise.
427 (VEX_LEN_0FXOP_08_CE): Likewise.
428 (VEX_LEN_0FXOP_08_CF): Likewise.
429 (VEX_LEN_0FXOP_08_EC): Likewise.
430 (VEX_LEN_0FXOP_08_ED): Likewise.
431 (VEX_LEN_0FXOP_08_EE): Likewise.
432 (VEX_LEN_0FXOP_08_EF): Likewise.
433 (xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
434 vpcomub, vpcomuw, vpcomud, vpcomuq.
435 (vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
436 VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
437 VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
440 2012-07-16 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
442 * i386-dis.c (PREFIX_0F38F6): New.
443 (prefix_table): Add adcx, adox instructions.
444 (three_byte_table): Use PREFIX_0F38F6.
445 (mod_table): Add rdseed instruction.
446 * i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
447 (cpu_flags): Likewise.
448 * i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
449 (i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
450 * i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
452 * i386-tbl.h: Regenerate.
453 * i386-init.h: Likewise.
455 2012-07-05 Thomas Schwinge <thomas@codesourcery.com>
457 * mips-dis.c: Remove gratuitous newline.
459 2012-07-05 Sean Keys <skeys@ipdatasys.com>
461 * xgate-dis.c: Removed an IF statement that will
462 always be false due to overlapping operand masks.
463 * xgate-opc.c: Corrected 'com' opcode entry and
466 2012-07-02 Roland McGrath <mcgrathr@google.com>
468 * i386-opc.tbl: Add RepPrefixOk to nop.
469 * i386-tbl.h: Regenerate.
471 2012-06-28 Nick Clifton <nickc@redhat.com>
473 * po/vi.po: Updated Vietnamese translation.
475 2012-06-22 Roland McGrath <mcgrathr@google.com>
477 * i386-opc.tbl: Add RepPrefixOk to ret.
478 * i386-tbl.h: Regenerate.
480 * i386-opc.h (RepPrefixOk): New enum constant.
481 (i386_opcode_modifier): New bitfield 'repprefixok'.
482 * i386-gen.c (opcode_modifiers): Add RepPrefixOk.
483 * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
484 instructions that have IsString.
485 * i386-tbl.h: Regenerate.
487 2012-06-11 Andreas Schwab <schwab@linux-m68k.org>
489 * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
490 (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
491 (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
492 (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
493 (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
494 (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
495 (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
496 (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
497 (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
499 2012-05-19 Alan Modra <amodra@gmail.com>
501 * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
502 (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
504 2012-05-18 Alan Modra <amodra@gmail.com>
506 * ia64-opc.c: Remove #include "ansidecl.h".
507 * z8kgen.c: Include sysdep.h first.
509 * arc-dis.c: Include sysdep.h first, remove some redundant includes.
510 * bfin-dis.c: Likewise.
511 * i860-dis.c: Likewise.
512 * ia64-dis.c: Likewise.
513 * ia64-gen.c: Likewise.
514 * m68hc11-dis.c: Likewise.
515 * mmix-dis.c: Likewise.
516 * msp430-dis.c: Likewise.
517 * or32-dis.c: Likewise.
518 * rl78-dis.c: Likewise.
519 * rx-dis.c: Likewise.
520 * tic4x-dis.c: Likewise.
521 * tilegx-opc.c: Likewise.
522 * tilepro-opc.c: Likewise.
523 * rx-decode.c: Regenerate.
525 2012-05-17 James Lemke <jwlemke@codesourcery.com>
527 * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
529 2012-05-17 James Lemke <jwlemke@codesourcery.com>
531 * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
533 2012-05-17 Daniel Richard G. <skunk@iskunk.org>
534 Nick Clifton <nickc@redhat.com>
537 * configure.in: Add check that sysdep.h has been included before
538 any system header files.
539 * configure: Regenerate.
540 * config.in: Regenerate.
541 * sysdep.h: Generate an error if included before config.h.
542 * alpha-opc.c: Include sysdep.h before any other header file.
543 * alpha-dis.c: Likewise.
544 * avr-dis.c: Likewise.
545 * cgen-opc.c: Likewise.
546 * cr16-dis.c: Likewise.
547 * cris-dis.c: Likewise.
548 * crx-dis.c: Likewise.
549 * d10v-dis.c: Likewise.
550 * d10v-opc.c: Likewise.
551 * d30v-dis.c: Likewise.
552 * d30v-opc.c: Likewise.
553 * h8500-dis.c: Likewise.
554 * i370-dis.c: Likewise.
555 * i370-opc.c: Likewise.
556 * m10200-dis.c: Likewise.
557 * m10300-dis.c: Likewise.
558 * micromips-opc.c: Likewise.
559 * mips-opc.c: Likewise.
560 * mips61-opc.c: Likewise.
561 * moxie-dis.c: Likewise.
562 * or32-opc.c: Likewise.
563 * pj-dis.c: Likewise.
564 * ppc-dis.c: Likewise.
565 * ppc-opc.c: Likewise.
566 * s390-dis.c: Likewise.
567 * sh-dis.c: Likewise.
568 * sh64-dis.c: Likewise.
569 * sparc-dis.c: Likewise.
570 * sparc-opc.c: Likewise.
571 * spu-dis.c: Likewise.
572 * tic30-dis.c: Likewise.
573 * tic54x-dis.c: Likewise.
574 * tic80-dis.c: Likewise.
575 * tic80-opc.c: Likewise.
576 * tilegx-dis.c: Likewise.
577 * tilepro-dis.c: Likewise.
578 * v850-dis.c: Likewise.
579 * v850-opc.c: Likewise.
580 * vax-dis.c: Likewise.
581 * w65-dis.c: Likewise.
582 * xgate-dis.c: Likewise.
583 * xtensa-dis.c: Likewise.
584 * rl78-decode.opc: Likewise.
585 * rl78-decode.c: Regenerate.
586 * rx-decode.opc: Likewise.
587 * rx-decode.c: Regenerate.
589 2012-05-17 Alan Modra <amodra@gmail.com>
591 * ppc_dis.c: Don't include elf/ppc.h.
593 2012-05-16 Meador Inge <meadori@codesourcery.com>
595 * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
598 2012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
599 Stephane Carrez <stcarrez@nerim.fr>
601 * configure.in: Add S12X and XGATE co-processor support to m68hc11
603 * disassemble.c: Likewise.
604 * configure: Regenerate.
605 * m68hc11-dis.c: Make objdump output more consistent, use hex
606 instead of decimal and use 0x prefix for hex.
607 * m68hc11-opc.c: Add S12X and XGATE opcodes.
609 2012-05-14 James Lemke <jwlemke@codesourcery.com>
611 * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
612 (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
613 (vle_opcd_indices): New array.
614 (lookup_vle): New function.
615 (disassemble_init_powerpc): Revise for second (VLE) opcode table.
616 (print_insn_powerpc): Likewise.
617 * ppc-opc.c: Likewise.
619 2012-05-14 Catherine Moore <clm@codesourcery.com>
620 Maciej W. Rozycki <macro@codesourcery.com>
621 Rhonda Wittels <rhonda@codesourcery.com>
622 Nathan Froyd <froydnj@codesourcery.com>
624 * ppc-opc.c (insert_arx, extract_arx): New functions.
625 (insert_ary, extract_ary): New functions.
626 (insert_li20, extract_li20): New functions.
627 (insert_rx, extract_rx): New functions.
628 (insert_ry, extract_ry): New functions.
629 (insert_sci8, extract_sci8): New functions.
630 (insert_sci8n, extract_sci8n): New functions.
631 (insert_sd4h, extract_sd4h): New functions.
632 (insert_sd4w, extract_sd4w): New functions.
633 (insert_vlesi, extract_vlesi): New functions.
634 (insert_vlensi, extract_vlensi): New functions.
635 (insert_vleui, extract_vleui): New functions.
636 (insert_vleil, extract_vleil): New functions.
637 (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
638 (BI16, BI32, BO32, B8): New.
639 (B15, B24, CRD32, CRS): New.
640 (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
641 (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
642 (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
643 (SH6_MASK): Use PPC_OPSHIFT_INV.
644 (SI8, UI5, OIMM5, UI7, BO16): New.
645 (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
646 (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
648 (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
649 (OPVUP, OPVUP_MASK OPVUP): New
650 (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
651 (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
652 (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
653 (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
654 (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
655 (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
656 (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
657 (SE_IM5, SE_IM5_MASK): New.
658 (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
659 (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
660 (BO32DNZ, BO32DZ): New.
661 (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
663 (powerpc_opcodes): Add new VLE instructions. Update existing
664 instruction to include PPCVLE if supported.
665 * ppc-dis.c (ppc_opts): Add vle entry.
666 (get_powerpc_dialect): New function.
667 (powerpc_init_dialect): VLE support.
668 (print_insn_big_powerpc): Call get_powerpc_dialect.
669 (print_insn_little_powerpc): Likewise.
670 (operand_value_powerpc): Handle negative shift counts.
671 (print_insn_powerpc): Handle 2-byte instruction lengths.
673 2012-05-11 Daniel Richard G. <skunk@iskunk.org>
676 * configure.in: Invoke ACX_HEADER_STRING.
677 * configure: Regenerate.
678 * config.in: Regenerate.
679 * sysdep.h: If STRINGS_WITH_STRING is defined then include both
680 string.h and strings.h.
682 2012-05-11 Nick Clifton <nickc@redhat.com>
685 * arm-dis.c (print_insn): Fix detection of instruction mode in
686 files containing multiple executable sections.
688 2012-05-03 Sean Keys <skeys@ipdatasys.com>
690 * Makefile.in, configure: regenerate
691 * disassemble.c (disassembler): Recognize ARCH_XGATE.
692 * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
694 * configure.in: Recognize xgate.
695 * xgate-dis.c, xgate-opc.c: New files for support of xgate
696 * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
697 and opcode generation for xgate.
699 2012-04-30 DJ Delorie <dj@redhat.com>
701 * rx-decode.opc (MOV): Do not sign-extend immediates which are
702 already the maximum bit size.
703 * rx-decode.c: Regenerate.
705 2012-04-27 David S. Miller <davem@davemloft.net>
707 * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
708 * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
710 * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
711 * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
713 * sparc-opc.c (CBCOND): New define.
714 (CBCOND_XCC): Likewise.
715 (cbcond): New helper macro.
716 (sparc_opcodes): Add compare-and-branch instructions.
718 * sparc-dis.c (print_insn_sparc): Handle ')'.
719 * sparc-opc.c (sparc_opcodes): Add crypto instructions.
721 * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
722 into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
724 2012-04-12 David S. Miller <davem@davemloft.net>
726 * sparc-dis.c (X_DISP10): Define.
727 (print_insn_sparc): Handle '='.
729 2012-04-01 Mike Frysinger <vapier@gentoo.org>
731 * bfin-dis.c (fmtconst): Replace decimal handling with a single
732 sprintf call and the '*' field width.
734 2012-03-23 Maxim Kuvyrkov <maxim@codesourcery.com>
736 * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
738 2012-03-16 Alan Modra <amodra@gmail.com>
740 * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
741 (powerpc_opcd_indices): Bump array size.
742 (disassemble_init_powerpc): Set powerpc_opcd_indices entries
743 corresponding to unused opcodes to following entry.
744 (lookup_powerpc): New function, extracted and optimised from..
745 (print_insn_powerpc): ..here.
747 2012-03-15 Alan Modra <amodra@gmail.com>
748 James Lemke <jwlemke@codesourcery.com>
750 * disassemble.c (disassemble_init_for_target): Handle ppc init.
751 * ppc-dis.c (private): New var.
752 (powerpc_init_dialect): Don't return calloc failure, instead use
754 (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
755 (powerpc_opcd_indices): New array.
756 (disassemble_init_powerpc): New function.
757 (print_insn_big_powerpc): Don't init dialect here.
758 (print_insn_little_powerpc): Likewise.
759 (print_insn_powerpc): Start search using powerpc_opcd_indices.
761 2012-03-10 Edmar Wienskoski <edmar@freescale.com>
763 * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
764 * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
765 (PPCVEC2, PPCTMR, E6500): New short names.
766 (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
767 mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
768 lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
769 lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
770 lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
771 optional operands on sync instruction for E6500 target.
773 2012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
775 * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
777 2012-02-27 Alan Modra <amodra@gmail.com>
779 * mt-dis.c: Regenerate.
781 2012-02-27 Alan Modra <amodra@gmail.com>
783 * v850-opc.c (extract_v8): Rearrange to make it obvious this
784 is the inverse of corresponding insert function.
785 (extract_d22, extract_u9, extract_r4): Likewise.
786 (extract_d9): Correct sign extension.
787 (extract_d16_15): Don't assume "long" is 32 bits, and don't
788 rely on implementation defined behaviour for shift right of
790 (extract_d16_16, extract_d17_16, extract_i9): Likewise.
791 (extract_d23): Likewise, and correct mask.
793 2012-02-27 Alan Modra <amodra@gmail.com>
795 * crx-dis.c (print_arg): Mask constant to 32 bits.
796 * crx-opc.c (cst4_map): Use int array.
798 2012-02-27 Alan Modra <amodra@gmail.com>
800 * arc-dis.c (BITS): Don't use shifts to mask off bits.
801 (FIELDD): Sign extend with xor,sub.
803 2012-02-25 Walter Lee <walt@tilera.com>
805 * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
806 * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
807 TILEPRO_OPC_LW_TLS_SN.
809 2012-02-21 H.J. Lu <hongjiu.lu@intel.com>
811 * i386-opc.h (HLEPrefixNone): New.
812 (HLEPrefixLock): Likewise.
813 (HLEPrefixAny): Likewise.
814 (HLEPrefixRelease): Likewise.
816 2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
818 * i386-dis.c (HLE_Fixup1): New.
819 (HLE_Fixup2): Likewise.
820 (HLE_Fixup3): Likewise.
827 (MOD_C6_REG_7): Likewise.
828 (MOD_C7_REG_7): Likewise.
829 (RM_C6_REG_7): Likewise.
830 (RM_C7_REG_7): Likewise.
831 (XACQUIRE_PREFIX): Likewise.
832 (XRELEASE_PREFIX): Likewise.
833 (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
834 cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
835 Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
836 (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
837 not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
838 MOD_C6_REG_7 and MOD_C7_REG_7.
839 (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
840 (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
842 (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
843 (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
845 * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
847 (cpu_flags): Add CpuHLE and CpuRTM.
848 (opcode_modifiers): Add HLEPrefixOk.
850 * i386-opc.h (CpuHLE): New.
852 (HLEPrefixOk): Likewise.
853 (i386_cpu_flags): Add cpuhle and cpurtm.
854 (i386_opcode_modifier): Add hleprefixok.
856 * i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
857 add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
858 sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
859 operand. Add xacquire, xrelease, xabort, xbegin, xend and
861 * i386-init.h: Regenerated.
862 * i386-tbl.h: Likewise.
864 2012-01-24 DJ Delorie <dj@redhat.com>
866 * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
867 * rl78-decode.c: Regenerate.
869 2012-01-17 James Murray <jsm@jsm-net.demon.co.uk>
872 * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
874 2012-01-17 Andreas Schwab <schwab@linux-m68k.org>
876 * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
877 register and move them after pmove with PSR/PCSR register.
879 2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
881 * i386-dis.c (mod_table): Add vmfunc.
883 * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
884 (cpu_flags): CpuVMFUNC.
886 * i386-opc.h (CpuVMFUNC): New.
887 (i386_cpu_flags): Add cpuvmfunc.
889 * i386-opc.tbl: Add vmfunc.
890 * i386-init.h: Regenerated.
891 * i386-tbl.h: Likewise.
893 For older changes see ChangeLog-2011
899 version-control: never