opcodes/ChangeLog

   1 2006-12-15  H.J. Lu  <hongjiu.lu@intel.com>
   2
   3         * i386-dis.c (o_mode): New for 16-byte operand.
   4         (intel_operand_size): Generate "OWORD PTR " for o_mode.
   5         (CMPXCHG8B_Fixup): Set bytemode to o_mode instead of x_mode.
   6
   7 2006-12-14  H.J. Lu  <hongjiu.lu@intel.com>
   8
   9         * i386-dis.c (CMPXCHG8B_Fixup): New.
  10         (grps): Use CMPXCHG8B_Fixup for cmpxchg8b.
  11
  12 2006-12-11  H.J. Lu  <hongjiu.lu@intel.com>
  13
  14         * i386-dis.c (Eq): Replaced by ...
  15         (Mq): New. This.
  16         (Ma): Defined with OP_M instead of OP_E.
  17         (grps): Updated cmpxchg8b and vmptrst for Eq -> Mq.
  18         (OP_M): Added bound, cmpxchg8b and vmptrst to bad modrm list.
  19
  20 2006-12-11  Daniel Jacobowitz  <dan@codesourcery.com>
  21
  22         * po/Make-in (.po.gmo): Put gmo files in objdir.
  23
  24 2006-12-09  H.J. Lu  <hongjiu.lu@intel.com>
  25
  26         * i386-dis.c (X86_64_1): New.
  27         (X86_64_2): Likewise.
  28         (X86_64_3): Likewise.
  29         (dis386): Replace 0x60, 0x61 and 0x62 entries with x86-64
  30         tables.
  31         (x86_64_table): Add entries for 0x60, 0x61 and 0x62.
  32
  33 2006-12-09  H.J. Lu  <hongjiu.lu@intel.com>
  34
  35         * i386-dis.c: Adjust white spaces.
  36
  37 2006-12-04  Jan Beulich  <jbeulich@novell.com>
  38
  39         * i386-dis.c (OP_J): Update used_prefixes in v_mode.
  40
  41 2006-11-30  Jan Beulich  <jbeulich@novell.com>
  42
  43         * i386-dis.c (SEG_Fixup): Delete.
  44         (Sv): Use OP_SEG.
  45         (putop): New suffix character 'D'.
  46         (dis386): Use it.
  47         (grps): Likewise.
  48         (OP_SEG): Handle bytemode other than w_mode.
  49
  50 2006-11-30  Jan Beulich  <jbeulich@novell.com>
  51
  52         * i386-dis.c (zAX): New.
  53         (Xz): New.
  54         (Yzr): New.
  55         (z_mode): New.
  56         (z_mode_ax_reg): New.
  57         (putop): New suffix character 'G'.
  58         (dis386): Use it for in, out, ins, and outs.
  59         (intel_operand_size): Handle z_mode.
  60         (OP_REG): Delete unreachable case indir_dx_reg.
  61         (OP_IMREG): Fix Intel syntax output for case indir_dx_reg. Handle
  62         z_mode_ax_reg.
  63         (OP_ESreg): Fix Intel syntax operand size handling.
  64         (OP_DSreg): Likewise.
  65
  66 2006-11-30  Jan Beulich  <jbeulich@novell.com>
  67
  68         * i386-dis.c (dis386): Use 'R' and 'O' for cbw/cwd unconditionally.
  69         (putop): For 'O' suffix, print 'q' in Intel mode, and mark data prefix
  70         used. For 'R' and 'W' suffix, simplify and fix Intel mode.
  71
  72 2006-11-29  Paul Brook  <paul@codesourcery.com>
  73
  74         * arm-dis.c (coprocessor_opcodes): Fix bitfields for fconstd/fconstd.
  75
  76 2006-11-22  Daniel Jacobowitz  <dan@codesourcery.com>
  77
  78         * arm-dis.c (last_is_thumb): Delete.
  79         (enum map_type, last_type): New.
  80         (print_insn_data): New.
  81         (get_sym_code_type): Take MAP_TYPE argument.  Check the type of
  82         the right symbol.  Handle $d.
  83         (print_insn): Check for mapping symbols even without a normal
  84         symbol.  Adjust searching.  If $d is found see how much data
  85         to print.  Handle data.
  86
  87 2006-11-16  Nathan Sidwell  <nathan@codesourcery.com>
  88
  89         * m68k-opc.c (m68k_opcodes): Place trap instructions before set
  90         conditionals.  Add tpf coldfire instruction as alias for trapf.
  91
  92 2006-11-09  H.J. Lu  <hongjiu.lu@intel.com>
  93
  94         * i386-dis.c (print_insn): Check PREFIX_REPNZ before
  95         PREFIX_DATA when prefix user table is used.
  96
  97 2006-11-09  H.J. Lu  <hongjiu.lu@intel.com>
  98
  99         * i386-dis.c (twobyte_uses_SSE_prefix): Renamed to ...
 100         (twobyte_uses_DATA_prefix): This.
 101         (twobyte_uses_REPNZ_prefix): New.
 102         (twobyte_uses_REPZ_prefix): Likewise.
 103         (threebyte_0x38_uses_DATA_prefix): Likewise.
 104         (threebyte_0x38_uses_REPNZ_prefix): Likewise.
 105         (threebyte_0x38_uses_REPZ_prefix): Likewise.
 106         (threebyte_0x3a_uses_DATA_prefix): Likewise.
 107         (threebyte_0x3a_uses_REPNZ_prefix): Likewise.
 108         (threebyte_0x3a_uses_REPZ_prefix): Likewise.
 109         (print_insn): Updated checking usages of DATA/REPNZ/REPZ
 110         prefixes.
 111
 112 2006-11-06  Troy Rollo  <troy@corvu.com.au>
 113
 114         * ppc-opc.c: Restore COM to mfcr wrongly removed 2003-07-04.
 115
 116 2006-11-01  Mei Ligang  <ligang@sunnorth.com.cn>
 117
 118         * score-opc.h (score_opcodes): Delete modifier '0x'.
 119
 120 2006-10-30  Paul Brook  <paul@codesourcery.com>
 121
 122         * arm-dis.c (last_is_thumb, last_mapping_sym, last_mapping_addr): New.
 123         (get_sym_code_type): New function.
 124         (print_insn): Search for mapping symbols.
 125
 126 2006-10-31  Mei Ligang  <ligang@sunnorth.com.cn>
 127
 128         * score-dis.c (print_insn): Correct the error code to print
 129         correct PCE instruction disassembly.
 130
 131 2006-10-26  Ben Elliston  <bje@au.ibm.com>
 132             Anton Blanchard  <anton@samba.org>
 133             Peter Bergner  <bergner@vnet.ibm.com>
 134
 135         * ppc-opc.c (A_L, DCM, DGM, TE, RMC, R, SP, S, SH16, XRT_L, EH,
 136         AFRALFRC_MASK, Z, ZRC, Z_MASK, XLRT_MASK, XEH_MASK): Define.
 137         (POWER6): Define.
 138         (powerpc_opcodes): Extend "lwarx", "ldarx", "dcbf", "fres", "fres.",
 139         "frsqrtes", "frsqrtes." "fre", "fre.", "frsqrte" and "frsqrte.".
 140         Add "doze", "nap", "sleep", "rvwinkle", "dcbfl", "prtyw", "prtyd",
 141         "mfcfar", "cmpb", "lfdpx", "stfdpx", "mtcfar", "mffgpr", "mftgpr",
 142         "lwzcix", "lhzcix", "lbzcix", "ldcix", "lfiwax", "stwcix", "sthcix",
 143         "stbcix", "stdcix", "lfdp", "dadd", "dadd.", "dqua", "dqua.", "dmul",
 144         "dmul.", "drrnd", "drrnd.", "dscli", "dscli.", "dquai", "dquai.",
 145         "dscri", "dscri.", "drintx", "drintx.", "dcmpo", "dtstex", "dtstdc",
 146         "dtstdg", "dtstsf", "drintn", "drintn.", "dctdp", "dctdp.", "dctfix",
 147         "dctfix.", "ddedpd", "ddedpd.", "dxex", "dxex.", "dsub", "dsub.",
 148         "ddiv", "ddiv.", "dcmpu", "drsp", "drsp.", "dcffix", "dcffix.",
 149         "denbcd", "denbcd.", "diex", "diex.", "stfdp", "daddq", "daddq.",
 150         "dquaq", "dquaq.", "fcpsgn", "fcpsgn.", "dmulq", "dmulq.",
 151         "drrndq", "drrndq.", "dscliq", "dscliq.", "dquaiq", "dquaiq.",
 152         "dscriq", "dscriq.", "drintxq", "drintxq.", "dcmpoq", "dtstexq",
 153         "dtstdcq", "dtstdgq", "dtstsfq", "drintnq", "drintnq.",
 154         "dctqpq", "dctqpq.", "dctfixq", "dctfixq.", "ddedpdq", "ddedpdq.",
 155         "dxexq", "dxexq.", "dsubq", "dsubq.", "ddivq", "ddivq.", "dcmpuq",
 156         "drdpq", "drdpq.", "dcffixq", "dcffixq.", "denbcdq", "denbcdq.",
 157         "diexq" and "diexq." opcodes.
 158
 159 2006-10-26  Daniel Jacobowitz  <dan@codesourcery.com>
 160
 161         * h8300-dis.c (bfd_h8_disassemble): Add missing consts.
 162
 163 2006-10-25  Trevor Smigiel  <Trevor_Smigiel@playstation.sony.com>
 164             Yukishige Shibata  <shibata@rd.scei.sony.co.jp>
 165             Nobuhisa Fujinami  <fnami@rd.scei.sony.co.jp>
 166             Takeaki Fukuoka  <fukuoka@rd.scei.sony.co.jp>
 167             Alan Modra  <amodra@bigpond.net.au>
 168
 169         * spu-dis.c: New file.
 170         * spu-opc.c: New file.
 171         * configure.in: Add SPU support.
 172         * disassemble.c: Likewise.
 173         * Makefile.am: Likewise.  Run "make dep-am".
 174         * Makefile.in: Regenerate.
 175         * configure: Regenerate.
 176         * po/POTFILES.in: Regenerate.
 177
 178 2006-10-24  Andrew Pinski  <andrew_pinski@playstation.sony.com>
 179
 180         * ppc-opc.c (CELL): New define.
 181         (powerpc_opcodes): Enable hrfid for Cell.  Add ldbrx and stdbrx,
 182         cell specific instructions.  Add {st,l}x{r,l}{,l} cell specific
 183         VMX instructions.
 184         * ppc-dis.c (powerpc_dialect): Handle cell.
 185
 186 2006-10-23  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
 187
 188         * i386-dis.c (dis386): Add support for the change in POPCNT opcode in
 189         amdfam10 architecture.
 190         (PREGRP37): NEW.
 191         (print_insn): Disallow REP prefix for POPCNT.
 192
 193 2006-10-20  Andrew Stubbs  <andrew.stubbs@st.com>
 194
 195         * sh-dis.c (print_insn_sh): Remove 0x from output to prevent GDB
 196         duplicating it.
 197
 198 2006-10-18  Dave Brolley  <brolley@redhat.com>
 199
 200         * configure.in (BFD_MACHINES): Add cgen-bitset.lo for bfd_sh_arch.
 201         * configure: Regenerated.
 202
 203 2006-09-29  Alan Modra  <amodra@bigpond.net.au>
 204
 205         * po/POTFILES.in: Regenerate.
 206
 207 2006-09-26  Mark Shinwell  <shinwell@codesourcery.com>
 208             Joseph Myers  <joseph@codesourcery.com>
 209             Ian Lance Taylor  <ian@wasabisystems.com>
 210             Ben Elliston  <bje@wasabisystems.com>
 211
 212         * arm-dis.c (coprocessor_opcodes): The X-qualifier to WMADD may
 213         only be used with the default multiply-add operation, so if N is
 214         set, don't bother printing X.  Add new iwmmxt instructions.
 215         (IWMMXT_INSN_COUNT): Update.
 216         (iwmmxt_wwssnames): Qualify "wwss" names at index 2, 6, 10 and 14
 217         with a 'c' suffix.
 218         (print_insn_coprocessor): Check for iWMMXt2.  Handle format
 219         specifiers 'r', 'i'.
 220
 221 2006-09-24  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
 222
 223         PR binutils/3100
 224         * i386-dis.c (prefix_user_table): Fix the second operand of
 225         maskmovdqu instruction to allow only %xmm register instead of
 226         both %xmm register and memory.
 227
 228 2006-09-23  H.J. Lu  <hongjiu.lu@intel.com>
 229
 230         PR binutils/3235
 231         * i386-dis.c (OP_OFF64): Get 32bit offset if there is an
 232         address size prefix.
 233
 234 2006-09-17  Mei Ligang  <ligang@sunnorth.com.cn>
 235
 236         * score-dis.c: New file.
 237         * score-opc.h: New file.
 238         * Makefile.am: Add Score files.
 239         * Makefile.in: Regenerate.
 240         * configure.in: Add support for Score target.
 241         * configure: Regenerate.
 242         * disassemble.c: Add support for Score target.
 243
 244 2006-09-16  Nick Clifton  <nickc@redhat.com>
 245             Pedro Alves  <pedro_alves@portugalmail.pt>
 246
 247         * arm-dis.c: Make use of new STRING_COMMA_LEN and CONST_STRNEQ
 248         macros defined in bfd.h.
 249         * cris-dis.c: Likewise.
 250         * h8300-dis.c: Likewise.
 251         * i386-dis.c: Likewise.
 252         * ia64-gen.c: Likewise.
 253         * mips-dis: Likewise.
 254
 255 2006-09-04  Paul Brook  <paul@codesourcery.com>
 256
 257         * arm-dis.c (neon_opcode): Fix suffix on VMOVN.
 258
 259 2006-08-23  H.J. Lu  <hongjiu.lu@intel.com>
 260
 261         * i386-dis.c (three_byte_table): Expand to 256 elements.
 262
 263 2006-08-04  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
 264
 265         PR binutils/3000
 266         * i386-dis.c (MXC,EMC): Define.
 267         (OP_MXC): New function to handle cvt* (convert instructions) between
 268         %xmm and %mm register correctly.
 269         (OP_EMC): ditto.
 270         (prefix_user_table): Modified cvtpi2pd,cvtpd2pi and cvttpd2pi
 271         instruction operands in PREGRP2,PREGRP3,PREGRP4 appropriately
 272         with EMC/MXC.
 273
 274 2006-07-29  Richard Sandiford  <richard@codesourcery.com>
 275
 276         * m68k-opc.c (m68k_opcodes): Fix operand specificer in the Coldfire
 277         "fdaddl" entry.
 278
 279 2006-07-19  Paul Brook  <paul@codesourcery.com>
 280
 281         * armd-dis.c (arm_opcodes): Fix rbit opcode.
 282
 283 2006-07-18  H.J. Lu  <hongjiu.lu@intel.com>
 284
 285         * i386-dis.c (grps): Change "sldtQ", "strQ" and "smswQ" to
 286         "sldt", "str" and "smsw".
 287
 288 2006-07-15  H.J. Lu  <hongjiu.lu@intel.com>
 289
 290         PR binutils/2829
 291         * i386-dis.c (GRP11_C6): NEW.
 292         (GRP11_C7): Likewise.
 293         (GRP12): Updated.
 294         (GRP13): Likewise.
 295         (GRP14): Likewise.
 296         (GRP15): Likewise.
 297         (GRP16): Likewise.
 298         (GRPAMD): Likewise.
 299         (GRPPADLCK1): Likewise.
 300         (GRPPADLCK2): Likewise.
 301         (dis386): Use GRP11_C6 and GRP11_C7 for entres 0xc6 and 0xc7,
 302         respectively.
 303         (grps): Add entries for GRP11_C6 and GRP11_C7.
 304
 305 2006-07-10 Dwarakanath Rajagopal        <dwarak.rajagopal@amd.com>
 306            Michael Meissner             <michael.meissner@amd.com>
 307
 308         * i386-dis.c (dis386): Add support for 4 operand instructions. Add
 309         support for amdfam10 SSE4a/ABM instructions. Modify all
 310         initializer macros to have additional arguments. Disallow REP
 311         prefix for non-string instructions.
 312         (print_insn): Ditto.
 313
 314 2006-07-05  Julian Brown  <julian@codesourcery.com>
 315
 316         * arm-dis.c (coprocessor): Alter fmsrr disassembly syntax.
 317
 318 2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>
 319
 320         * i386-dis.c (dis386_twobyte): Use "nopQ" for 0x1f.
 321         (twobyte_has_modrm): Set 1 for 0x1f.
 322
 323 2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>
 324
 325         * i386-dis.c (NOP_Fixup): Removed.
 326         (NOP_Fixup1): New.
 327         (NOP_Fixup2): Likewise.
 328         (dis386): Use NOP_Fixup1 and NOP_Fixup2 on 0x90.
 329
 330 2006-06-12  Julian Brown  <julian@codesourcery.com>
 331
 332         * arm-dis.c (print_insn_neon): Disassemble 32-bit immediates as signed
 333         on 64-bit hosts.
 334
 335 2006-06-10  H.J. Lu  <hongjiu.lu@intel.com>
 336
 337         * i386.c (GRP10): Renamed to ...
 338         (GRP12): This.
 339         (GRP11): Renamed to ...
 340         (GRP13): This.
 341         (GRP12): Renamed to ...
 342         (GRP14): This.
 343         (GRP13): Renamed to ...
 344         (GRP15): This.
 345         (GRP14): Renamed to ...
 346         (GRP16): This.
 347         (dis386_twobyte): Updated.
 348         (grps): Likewise.
 349
 350 2006-06-09  Nick Clifton  <nickc@redhat.com>
 351
 352         * po/fi.po: Updated Finnish translation.
 353
 354 2006-06-07  Joseph S. Myers  <joseph@codesourcery.com>
 355
 356         * po/Make-in (pdf, ps): New dummy targets.
 357
 358 2006-06-06  Paul Brook  <paul@codesourcery.com>
 359
 360         * arm-dis.c (coprocessor_opcodes): Add %c to unconditional arm
 361         instructions.
 362         (neon_opcodes): Add conditional execution specifiers.
 363         (thumb_opcodes): Ditto.
 364         (thumb32_opcodes): Ditto.
 365         (arm_conditional): Change 0xe to "al" and add "" to end.
 366         (ifthen_state, ifthen_next_state, ifthen_address): New.
 367         (IFTHEN_COND): Define.
 368         (print_insn_coprocessor, print_insn_neon): Print thumb conditions.
 369         (print_insn_arm): Change %c to use new values of arm_conditional.
 370         (print_insn_thumb16): Print thumb conditions.  Add %I.
 371         (print_insn_thumb32): Print thumb conditions.
 372         (find_ifthen_state): New function.
 373         (print_insn): Track IT block state.
 374
 375 2006-06-06  Ben Elliston  <bje@au.ibm.com>
 376             Anton Blanchard  <anton@samba.org>
 377             Peter Bergner  <bergner@vnet.ibm.com>
 378
 379         * ppc-dis.c (powerpc_dialect): Handle power6 option.
 380         (print_ppc_disassembler_options): Mention power6.
 381
 382 2006-06-06  Thiemo Seufer  <ths@mips.com>
 383             Chao-ying Fu  <fu@mips.com>
 384
 385         * mips-dis.c: Disassemble DSP64 instructions for MIPS64R2.
 386         * mips-opc.c: Add DSP64 instructions.
 387
 388 2006-06-06  Alan Modra  <amodra@bigpond.net.au>
 389
 390         * m68hc11-dis.c (print_insn): Warning fix.
 391
 392 2006-06-05  Daniel Jacobowitz  <dan@codesourcery.com>
 393
 394         * po/Make-in (top_builddir): Define.
 395
 396 2006-06-05  Alan Modra  <amodra@bigpond.net.au>
 397
 398         * Makefile.am: Run "make dep-am".
 399         * Makefile.in: Regenerate.
 400         * config.in: Regenerate.
 401
 402 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
 403
 404         * Makefile.am (INCLUDES): Use @INCINTL@.
 405         * acinclude.m4: Include new gettext macros.
 406         * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
 407         Remove local code for po/Makefile.
 408         * Makefile.in, aclocal.m4, configure: Regenerated.
 409
 410 2006-05-30  Nick Clifton  <nickc@redhat.com>
 411
 412         * po/es.po: Updated Spanish translation.
 413
 414 2006-05-25  Richard Sandiford  <richard@codesourcery.com>
 415
 416         * m68k-opc.c (m68k_opcodes): Fix the masks of the Coldfire fmovemd
 417         and fmovem entries.  Put register list entries before immediate
 418         mask entries.  Use "l" rather than "L" in the fmovem entries.
 419         * m68k-dis.c (match_insn_m68k): Remove the PRIV argument and work it
 420         out from INFO.
 421         (m68k_scan_mask): New function, split out from...
 422         (print_insn_m68k): ...here.  If no architecture has been set,
 423         first try printing an m680x0 instruction, then try a Coldfire one.
 424
 425 2006-05-24  Nick Clifton  <nickc@redhat.com>
 426
 427         * po/ga.po: Updated Irish translation.
 428
 429 2006-05-22  Nick Clifton  <nickc@redhat.com>
 430
 431         * crx-dis.c (EXTRACT): Make macro work on 64-bit hosts.
 432
 433 2006-05-22  Nick Clifton  <nickc@redhat.com>
 434
 435         * po/nl.po: Updated translation.
 436
 437 2006-05-18  Alan Modra  <amodra@bigpond.net.au>
 438
 439         * avr-dis.c: Formatting fix.
 440
 441 2006-05-14  Thiemo Seufer  <ths@mips.com>
 442
 443         * mips16-opc.c (I1, I32, I64): New shortcut defines.
 444         (mips16_opcodes): Change membership of instructions to their
 445         lowest baseline ISA.
 446
 447 2006-05-09  H.J. Lu  <hongjiu.lu@intel.com>
 448
 449         * i386-dis.c (grps): Update sgdt/sidt for 64bit.
 450
 451 2006-05-05  Julian Brown  <julian@codesourcery.com>
 452
 453         * arm-dis.c (coprocessor_opcodes): Don't interpret fldmx/fstmx as
 454         vldm/vstm.
 455
 456 2006-05-05  Thiemo Seufer  <ths@mips.com>
 457             David Ung  <davidu@mips.com>
 458
 459         * mips-opc.c: Add macro for cache instruction.
 460
 461 2006-05-04  Thiemo Seufer  <ths@mips.com>
 462             Nigel Stephens  <nigel@mips.com>
 463             David Ung  <davidu@mips.com>
 464
 465         * mips-dis.c (mips_arch_choices): Add smartmips instruction
 466         decoding to MIPS32 and MIPS32R2.  Limit DSP decoding to release
 467         2 ISAs.  Add MIPS3D decoding to MIPS32R2.  Add MT decoding to
 468         MIPS64R2.
 469         * mips-opc.c: fix random typos in comments.
 470         (INSN_SMARTMIPS): New defines.
 471         (mips_builtin_opcodes): Add paired single support for MIPS32R2.
 472         Move bc3f, bc3fl, bc3t, bc3tl downwards.  Move flushi, flushd,
 473         flushid, wb upwards.  Move cfc3, ctc3 downwards.  Rework the
 474         FP_S and FP_D flags to denote single and double register
 475         accesses separately.  Move dmfc3, dmtc3, mfc3, mtc3 downwards.
 476         Allow jr.hb and jalr.hb for release 1 ISAs.  Allow luxc1, suxc1
 477         for MIPS32R2.  Add SmartMIPS instructions.  Add two-argument
 478         variants of bc2f, bc2fl, bc2t, bc2tl.  Add mfhc2, mthc2 to
 479         release 2 ISAs.
 480         * mips16-opc.c (mips16_opcodes): Add sdbbp instruction.
 481
 482 2006-05-03  Thiemo Seufer  <ths@mips.com>
 483
 484         * mips-opc.c (mips_builtin_opcodes): Fix mftr argument order.
 485
 486 2006-05-02  Thiemo Seufer  <ths@mips.com>
 487             Nigel Stephens  <nigel@mips.com>
 488             David Ung  <davidu@mips.com>
 489
 490         * mips-dis.c (print_insn_args): Force mips16 to odd addresses.
 491         (print_mips16_insn_arg): Force mips16 to odd addresses.
 492
 493 2006-04-30  Thiemo Seufer  <ths@mips.com>
 494             David Ung  <davidu@mips.com>
 495
 496         * mips-opc.c (mips_builtin_opcodes): Add udi instructions
 497         "udi0" to "udi15".
 498         * mips-dis.c (print_insn_args): Adds udi argument handling.
 499
 500 2006-04-28  James E Wilson  <wilson@specifix.com>
 501
 502         * m68k-dis.c (match_insn_m68k): Restore fprintf_func before printing
 503         error message.
 504
 505 2006-04-28  Thiemo Seufer  <ths@mips.com>
 506             David Ung  <davidu@mips.com>
 507             Nigel Stephens  <nigel@mips.com>
 508
 509         * mips-dis.c (mips_cp0sel_names_mips3264r2): Add MT register
 510         names.
 511
 512 2006-04-28  Thiemo Seufer  <ths@mips.com>
 513             Nigel Stephens  <nigel@mips.com>
 514             David Ung  <davidu@mips.com>
 515
 516         * mips-dis.c (print_insn_args): Add mips_opcode argument.
 517         (print_insn_mips):  Adjust print_insn_args call.
 518
 519 2006-04-28  Thiemo Seufer  <ths@mips.com>
 520             Nigel Stephens  <nigel@mips.com>
 521
 522         * mips-dis.c (print_insn_args): Print $fcc only for FP
 523         instructions, use $cc elsewise.
 524
 525 2006-04-28  Thiemo Seufer  <ths@mips.com>
 526             Nigel Stephens  <nigel@mips.com>
 527
 528         * opcodes/mips-dis.c (mips16_to_32_reg_map, mips16_reg_names):
 529         Map MIPS16 registers to O32 names.
 530         (print_mips16_insn_arg): Use mips16_reg_names.
 531
 532 2006-04-26  Julian Brown  <julian@codesourcery.com>
 533
 534         * arm-dis.c (print_insn_neon): Disassemble floating-point constant
 535         VMOV.
 536
 537 2006-04-26  Nathan Sidwell  <nathan@codesourcery.com>
 538             Julian Brown  <julian@codesourcery.com>
 539
 540         * opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert
 541         %<code>[zy] into %[zy]<code>.  Expand meaning of %<bitfield>['`?].
 542         Add unified load/store instruction names.
 543         (neon_opcode_table): New.
 544         (arm_opcodes): Expand meaning of %<bitfield>['`?].
 545         (arm_decode_bitfield): New.
 546         (print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
 547         Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
 548         (print_insn_neon): New.
 549         (print_insn_arm): Adjust print_insn_coprocessor call. Call
 550         print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
 551         (print_insn_thumb32): Likewise.
 552
 553 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 554
 555         * Makefile.am: Run "make dep-am".
 556         * Makefile.in: Regenerate.
 557
 558 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 559
 560         * avr-dis.c (avr_operand): Warning fix.
 561
 562         * configure: Regenerate.
 563
 564 2006-04-16  Daniel Jacobowitz  <dan@codesourcery.com>
 565
 566         * po/POTFILES.in: Regenerated.
 567
 568 2006-04-12   Hochstein  <hochstein@algo.informatik.tu-darmstadt.de>
 569
 570         PR binutils/2454
 571         * avr-dis.c (avr_operand): Arrange for a comment to appear before
 572         the symolic form of an address, so that the output of objdump -d
 573         can be reassembled.
 574
 575 2006-04-10  DJ Delorie  <dj@redhat.com>
 576
 577         * m32c-asm.c: Regenerate.
 578
 579 2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>
 580
 581         * Makefile.am: Add install-html target.
 582         * Makefile.in: Regenerate.
 583
 584 2006-04-06  Nick Clifton  <nickc@redhat.com>
 585
 586         * po/vi/po: Updated Vietnamese translation.
 587
 588 2006-03-31  Paul Koning  <ni1d@arrl.net>
 589
 590         * pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.
 591
 592 2006-03-16  Bernd Schmidt  <bernd.schmidt@analog.com>
 593
 594         * bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
 595         logic to identify halfword shifts.
 596
 597 2006-03-16  Paul Brook  <paul@codesourcery.com>
 598
 599         * arm-dis.c (arm_opcodes): Rename swi to svc.
 600         (thumb_opcodes): Ditto.
 601
 602 2006-03-13  DJ Delorie  <dj@redhat.com>
 603
 604         * m32c-asm.c: Regenerate.
 605         * m32c-desc.c: Likewise.
 606         * m32c-desc.h: Likewise.
 607         * m32c-dis.c: Likewise.
 608         * m32c-ibld.c: Likewise.
 609         * m32c-opc.c: Likewise.
 610         * m32c-opc.h: Likewise.
 611
 612 2006-03-10  DJ Delorie  <dj@redhat.com>
 613
 614         * m32c-desc.c: Regenerate with mul.l, mulu.l.
 615         * m32c-opc.c: Likewise.
 616         * m32c-opc.h: Likewise.
 617
 618
 619 2006-03-09  Nick Clifton  <nickc@redhat.com>
 620
 621         * po/sv.po: Updated Swedish translation.
 622
 623 2006-03-07  H.J. Lu  <hongjiu.lu@intel.com>
 624
 625         PR binutils/2428
 626         * i386-dis.c (REP_Fixup): New function.
 627         (AL): Remove duplicate.
 628         (Xbr): New.
 629         (Xvr): Likewise.
 630         (Ybr): Likewise.
 631         (Yvr): Likewise.
 632         (indirDXr): Likewise.
 633         (ALr): Likewise.
 634         (eAXr): Likewise.
 635         (dis386): Updated entries of ins, outs, movs, lods and stos.
 636
 637 2006-03-05  Nick Clifton  <nickc@redhat.com>
 638
 639         * cgen-ibld.in (insert_normal): Cope with attempts to insert a
 640         signed 32-bit value into an unsigned 32-bit field when the host is
 641         a 64-bit machine.
 642         * fr30-ibld.c: Regenerate.
 643         * frv-ibld.c: Regenerate.
 644         * ip2k-ibld.c: Regenerate.
 645         * iq2000-asm.c: Regenerate.
 646         * iq2000-ibld.c: Regenerate.
 647         * m32c-ibld.c: Regenerate.
 648         * m32r-ibld.c: Regenerate.
 649         * openrisc-ibld.c: Regenerate.
 650         * xc16x-ibld.c: Regenerate.
 651         * xstormy16-ibld.c: Regenerate.
 652
 653 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
 654
 655         * xc16x-asm.c: Regenerate.
 656         * xc16x-dis.c: Regenerate.
 657
 658 2006-02-27  Carlos O'Donell  <carlos@codesourcery.com>
 659
 660         * po/Make-in: Add html target.
 661
 662 2006-02-27  H.J. Lu <hongjiu.lu@intel.com>
 663
 664         * i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
 665         Intel Merom New Instructions.
 666         (THREE_BYTE_0): Likewise.
 667         (THREE_BYTE_1): Likewise.
 668         (three_byte_table): Likewise.
 669         (dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
 670         THREE_BYTE_1 for entry 0x3a.
 671         (twobyte_has_modrm): Updated.
 672         (twobyte_uses_SSE_prefix): Likewise.
 673         (print_insn): Handle 3-byte opcodes used by Intel Merom New
 674         Instructions.
 675
 676 2006-02-24  David S. Miller  <davem@sunset.davemloft.net>
 677
 678         * sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
 679         (v9_hpriv_reg_names): New table.
 680         (print_insn_sparc): Allow values up to 16 for '?' and '!'.
 681         New cases '$' and '%' for read/write hyperprivileged register.
 682         * sparc-opc.c (sparc_opcodes): Add new entries for UA2005
 683         window handling and rdhpr/wrhpr instructions.
 684
 685 2006-02-24  DJ Delorie  <dj@redhat.com>
 686
 687         * m32c-desc.c: Regenerate with linker relaxation attributes.
 688         * m32c-desc.h: Likewise.
 689         * m32c-dis.c: Likewise.
 690         * m32c-opc.c: Likewise.
 691
 692 2006-02-24  Paul Brook  <paul@codesourcery.com>
 693
 694         * arm-dis.c (arm_opcodes): Add V7 instructions.
 695         (thumb32_opcodes): Ditto.  Handle V7M MSR/MRS variants.
 696         (print_arm_address): New function.
 697         (print_insn_arm): Use it.  Add 'P' and 'U' cases.
 698         (psr_name): New function.
 699         (print_insn_thumb32): Add 'U', 'C' and 'D' cases.
 700
 701 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 702
 703         * ia64-opc-i.c (bXc): New.
 704         (mXc): Likewise.
 705         (OpX2TaTbYaXcC): Likewise.
 706         (TF). Likewise.
 707         (TFCM). Likewise.
 708         (ia64_opcodes_i): Add instructions for tf.
 709
 710         * ia64-opc.h (IMMU5b): New.
 711
 712         * ia64-asmtab.c: Regenerated.
 713
 714 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 715
 716         * ia64-gen.c: Update copyright years.
 717         * ia64-opc-b.c: Likewise.
 718
 719 2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>
 720
 721         * ia64-gen.c (lookup_regindex): Handle ".vm".
 722         (print_dependency_table): Handle '\"'.
 723
 724         * ia64-ic.tbl: Updated from SDM 2.2.
 725         * ia64-raw.tbl: Likewise.
 726         * ia64-waw.tbl: Likewise.
 727         * ia64-asmtab.c: Regenerated.
 728
 729         * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
 730
 731 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 732             Anil Paranjape   <anilp1@kpitcummins.com>
 733             Shilin Shakti    <shilins@kpitcummins.com>
 734
 735         * xc16x-desc.h: New file
 736         * xc16x-desc.c: New file
 737         * xc16x-opc.h: New file
 738         * xc16x-opc.c: New file
 739         * xc16x-ibld.c: New file
 740         * xc16x-asm.c: New file
 741         * xc16x-dis.c: New file
 742         * Makefile.am: Entries for xc16x
 743         * Makefile.in: Regenerate
 744         * cofigure.in: Add xc16x target information.
 745         * configure: Regenerate.
 746         * disassemble.c: Add xc16x target information.
 747
 748 2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 749
 750         * i386-dis.c (dis386_twobyte): Use "movZ" for debug register
 751         moves.
 752
 753 2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 754
 755         * i386-dis.c ('Z'): Add a new macro.
 756         (dis386_twobyte): Use "movZ" for control register moves.
 757
 758 2006-02-10  Nick Clifton  <nickc@redhat.com>
 759
 760         * iq2000-asm.c: Regenerate.
 761
 762 2006-02-07  Nathan Sidwell  <nathan@codesourcery.com>
 763
 764         * m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
 765
 766 2006-01-26  David Ung  <davidu@mips.com>
 767
 768         * mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
 769         ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
 770         floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
 771         nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
 772         rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
 773
 774 2006-01-18  Arnold Metselaar  <arnoldm@sourceware.org>
 775
 776         * z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
 777         ld_d_r, pref_xd_cb): Use signed char to hold data to be
 778         disassembled.
 779         * z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
 780         buffer overflows when disassembling instructions like
 781         ld (ix+123),0x23
 782         * z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
 783         operand, if the offset is negative.
 784
 785 2006-01-17  Arnold Metselaar  <arnoldm@sourceware.org>
 786
 787         * z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
 788         unsigned char to hold data to be disassembled.
 789
 790 2006-01-17  Andreas Schwab  <schwab@suse.de>
 791
 792         PR binutils/1486
 793         * disassemble.c (disassemble_init_for_target): Set
 794         disassembler_needs_relocs for bfd_arch_arm.
 795
 796 2006-01-16  Paul Brook  <paul@codesourcery.com>
 797
 798         * m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
 799         f?add?, and f?sub? instructions.
 800
 801 2006-01-16  Nick Clifton  <nickc@redhat.com>
 802
 803         * po/zh_CN.po: New Chinese (simplified) translation.
 804         * configure.in (ALL_LINGUAS): Add "zh_CH".
 805         * configure: Regenerate.
 806
 807 2006-01-05  Paul Brook  <paul@codesourcery.com>
 808
 809         * m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
 810
 811 2006-01-06  DJ Delorie  <dj@redhat.com>
 812
 813         * m32c-desc.c: Regenerate.
 814         * m32c-opc.c: Regenerate.
 815         * m32c-opc.h: Regenerate.
 816
 817 2006-01-03  DJ Delorie  <dj@redhat.com>
 818
 819         * cgen-ibld.in (extract_normal): Avoid memory range errors.
 820         * m32c-ibld.c: Regenerated.
 821
 822 For older changes see ChangeLog-2005
 823 \f
 824 Local Variables:
 825 mode: change-log
 826 left-margin: 8
 827 fill-column: 74
 828 version-control: never
 829 End: