1 2005-09-30 H.J. Lu <hongjiu.lu@intel.com>
3 * Makefile.am: Run "make dep-am".
4 * Makefile.in: Regenerated.
5 * aclocal.m4: Likewise.
8 2005-09-30 Catherine Moore <clm@cm00re.com>
10 * Makefile.am: Bfin support.
11 * Makefile.in: Regenerated.
12 * aclocal.m4: Regenerated.
13 * bfin-dis.c: New file.
14 * configure.in: Bfin support.
15 * configure: Regenerated.
16 * disassemble.c (ARCH_bfin): Define.
17 (disassembler): Add case for bfd_arch_bfin.
19 2005-09-28 Jan Beulich <jbeulich@novell.com>
21 * i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
24 (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
25 (dis386): Document and use new 'V' meta character. Use it for
26 single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
27 opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
28 (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
29 data prefix as used whenever DFLAG was examined. Handle 'V'.
30 (intel_operand_size): Use stack_v_mode.
31 (OP_E): Use stack_v_mode, but handle only the special case of
32 64-bit mode without operand size override here; fall through to
33 v_mode case otherwise.
34 (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
35 and no operand size override is present.
36 (OP_J): Use get32s for obtaining the displacement also when rex64
39 2005-09-08 Paul Brook <paul@codesourcery.com>
41 * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
43 2005-09-06 Chao-ying Fu <fu@mips.com>
45 * mips-opc.c (MT32): New define.
46 (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
47 bottom to avoid opcode collision with "mftr" and "mttr".
49 * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
50 (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
53 2005-09-02 Paul Brook <paul@codesourcery.com>
55 * arm-dis.c (coprocessor_opcodes): Add null terminator.
57 2005-09-02 Paul Brook <paul@codesourcery.com>
59 * arm-dis.c (coprocessor_opcodes): New.
60 (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
61 (print_insn_coprocessor): New function.
62 (print_insn_arm): Use print_insn_coprocessor. Remove coprocessor
64 (print_insn_thumb32): Use print_insn_coprocessor.
66 2005-08-30 Paul Brook <paul@codesourcery.com>
68 * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
70 2005-08-26 Jan Beulich <jbeulich@novell.com>
72 * i386-dis.c (intel_operand_size): New, broken out from OP_E for
74 (OP_E): Call intel_operand_size, move call site out of mode
76 (OP_OFF): Call intel_operand_size if suffix_always. Remove
77 ATTRIBUTE_UNUSED from parameters.
79 (OP_ESreg): Call intel_operand_size.
81 (OP_DIR): Use colon rather than semicolon as separator of far
84 2005-08-25 Chao-ying Fu <fu@mips.com>
86 * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
87 (mips_builtin_opcodes): Add DSP instructions.
88 * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
90 (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
93 2005-08-23 David Ung <davidu@mips.com>
95 * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
96 instructions to the table.
98 2005-08-18 Alan Modra <amodra@bigpond.net.au>
100 * a29k-dis.c: Delete.
101 * Makefile.am: Remove a29k support.
102 * configure.in: Likewise.
103 * disassemble.c: Likewise.
104 * Makefile.in: Regenerate.
105 * configure: Regenerate.
106 * po/POTFILES.in: Regenerate.
108 2005-08-15 Daniel Jacobowitz <dan@codesourcery.com>
110 * ppc-dis.c (powerpc_dialect): Handle e300.
111 (print_ppc_disassembler_options): Likewise.
112 * ppc-opc.c (PPCE300): Define.
113 (powerpc_opcodes): Mark icbt as available for the e300.
115 2005-08-13 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
117 * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
118 Use "rp" instead of "%r2" in "b,l" insns.
120 2005-08-12 Martin Schwidefsky <schwidefsky@de.ibm.com>
122 * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
123 * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
125 * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
126 and 4 bit optional masks.
127 (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
128 INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
129 (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
130 MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
131 (s390_opformats): Likewise.
132 * s390-opc.txt: Add new instructions for cpu type z9-109.
134 2005-08-05 John David Anglin <dave.anglin@nrc-crnc.gc.ca>
136 * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
138 2005-07-29 Paul Brook <paul@codesourcery.com>
140 * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
142 2005-07-29 Paul Brook <paul@codesourcery.com>
144 * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
145 (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
147 2005-07-25 DJ Delorie <dj@redhat.com>
149 * m32c-asm.c Regenerate.
150 * m32c-dis.c Regenerate.
152 2005-07-20 DJ Delorie <dj@redhat.com>
154 * disassemble.c (disassemble_init_for_target): M32C ISAs are
155 enums, so convert them to bit masks, which attributes are.
157 2005-07-18 Nick Clifton <nickc@redhat.com>
159 * configure.in: Restore alpha ordering to list of arches.
160 * configure: Regenerate.
161 * disassemble.c: Restore alpha ordering to list of arches.
163 2005-07-18 Nick Clifton <nickc@redhat.com>
165 * m32c-asm.c: Regenerate.
166 * m32c-desc.c: Regenerate.
167 * m32c-desc.h: Regenerate.
168 * m32c-dis.c: Regenerate.
169 * m32c-ibld.h: Regenerate.
170 * m32c-opc.c: Regenerate.
171 * m32c-opc.h: Regenerate.
173 2005-07-18 H.J. Lu <hongjiu.lu@intel.com>
175 * i386-dis.c (PNI_Fixup): Update comment.
176 (VMX_Fixup): Properly handle the suffix check.
178 2005-07-16 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
180 * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
183 2005-07-16 Alan Modra <amodra@bigpond.net.au>
185 * Makefile.am: Run "make dep-am".
186 (stamp-m32c): Fix cpu dependencies.
187 * Makefile.in: Regenerate.
188 * ip2k-dis.c: Regenerate.
190 2007-07-15 H.J. Lu <hongjiu.lu@intel.com>
192 * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
193 (VMX_Fixup): New. Fix up Intel VMX Instructions.
197 (dis386_twobyte): Updated entries 0x78 and 0x79.
198 (twobyte_has_modrm): Likewise.
199 (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
200 (OP_G): Handle m_mode.
202 2005-07-14 Jim Blandy <jimb@redhat.com>
204 Add support for the Renesas M32C and M16C.
205 * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
206 * m32c-desc.h, m32c-opc.h: New.
207 * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
208 (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
210 (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
211 m32c-ibld.lo, m32c-opc.lo.
212 (CLEANFILES): List stamp-m32c.
213 (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
214 (CGEN_CPUS): Add m32c.
215 (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
216 (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
217 (m32c_opc_h): New variable.
218 (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
219 (m32c-opc.lo): New rules.
220 * Makefile.in: Regenerated.
221 * configure.in: Add case for bfd_m32c_arch.
222 * configure: Regenerated.
223 * disassemble.c (ARCH_m32c): New.
224 [ARCH_m32c]: #include "m32c-desc.h".
225 (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
226 (disassemble_init_for_target) [ARCH_m32c]: Same.
228 * cgen-ops.h, cgen-types.h: New files.
229 * Makefile.am (HFILES): List them.
230 * Makefile.in: Regenerated.
232 2005-07-07 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
234 * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
235 d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
236 ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
237 m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
238 ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
239 v850-dis.c: Fix format bugs.
240 * ia64-gen.c (fail, warn): Add format attribute.
241 * or32-opc.c (debug): Likewise.
243 2005-07-07 Khem Raj <kraj@mvista.com>
245 * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
248 2005-07-06 Alan Modra <amodra@bigpond.net.au>
250 * Makefile.am (stamp-m32r): Fix path to cpu files.
251 (stamp-m32r, stamp-iq2000): Likewise.
252 * Makefile.in: Regenerate.
253 * m32r-asm.c: Regenerate.
254 * po/POTFILES.in: Remove arm-opc.h. Add ms1-asm.c, ms1-desc.c,
255 ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
257 2005-07-05 Nick Clifton <nickc@redhat.com>
259 * iq2000-asm.c: Regenerate.
260 * ms1-asm.c: Regenerate.
262 2005-07-05 Jan Beulich <jbeulich@novell.com>
264 * i386-dis.c (SVME_Fixup): New.
265 (grps): Use it for the lidt entry.
266 (PNI_Fixup): Call OP_M rather than OP_E.
267 (INVLPG_Fixup): Likewise.
269 2005-07-04 H.J. Lu <hongjiu.lu@intel.com>
271 * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
273 2005-07-01 Nick Clifton <nickc@redhat.com>
275 * a29k-dis.c: Update to ISO C90 style function declarations and
277 * alpha-opc.c: Likewise.
278 * arc-dis.c: Likewise.
279 * arc-opc.c: Likewise.
280 * avr-dis.c: Likewise.
281 * cgen-asm.in: Likewise.
282 * cgen-dis.in: Likewise.
283 * cgen-ibld.in: Likewise.
284 * cgen-opc.c: Likewise.
285 * cris-dis.c: Likewise.
286 * d10v-dis.c: Likewise.
287 * d30v-dis.c: Likewise.
288 * d30v-opc.c: Likewise.
289 * dis-buf.c: Likewise.
290 * dlx-dis.c: Likewise.
291 * h8300-dis.c: Likewise.
292 * h8500-dis.c: Likewise.
293 * hppa-dis.c: Likewise.
294 * i370-dis.c: Likewise.
295 * i370-opc.c: Likewise.
296 * m10200-dis.c: Likewise.
297 * m10300-dis.c: Likewise.
298 * m68k-dis.c: Likewise.
299 * m88k-dis.c: Likewise.
300 * mips-dis.c: Likewise.
301 * mmix-dis.c: Likewise.
302 * msp430-dis.c: Likewise.
303 * ns32k-dis.c: Likewise.
304 * or32-dis.c: Likewise.
305 * or32-opc.c: Likewise.
306 * pdp11-dis.c: Likewise.
307 * pj-dis.c: Likewise.
308 * s390-dis.c: Likewise.
309 * sh-dis.c: Likewise.
310 * sh64-dis.c: Likewise.
311 * sparc-dis.c: Likewise.
312 * sparc-opc.c: Likewise.
313 * sysdep.h: Likewise.
314 * tic30-dis.c: Likewise.
315 * tic4x-dis.c: Likewise.
316 * tic80-dis.c: Likewise.
317 * v850-dis.c: Likewise.
318 * v850-opc.c: Likewise.
319 * vax-dis.c: Likewise.
320 * w65-dis.c: Likewise.
321 * z8kgen.c: Likewise.
323 * fr30-*: Regenerate.
325 * ip2k-*: Regenerate.
326 * iq2000-*: Regenerate.
327 * m32r-*: Regenerate.
329 * openrisc-*: Regenerate.
330 * xstormy16-*: Regenerate.
332 2005-06-23 Ben Elliston <bje@gnu.org>
334 * m68k-dis.c: Use ISC C90.
335 * m68k-opc.c: Formatting fixes.
337 2005-06-16 David Ung <davidu@mips.com>
339 * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
340 instructions to the table; seb/seh/sew/zeb/zeh/zew.
342 2005-06-15 Dave Brolley <brolley@redhat.com>
344 Contribute Morpho ms1 on behalf of Red Hat
345 * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
346 ms1-opc.h: New files, Morpho ms1 target.
348 2004-05-14 Stan Cox <scox@redhat.com>
350 * disassemble.c (ARCH_ms1): Define.
351 (disassembler): Handle bfd_arch_ms1
353 2004-05-13 Michael Snyder <msnyder@redhat.com>
355 * Makefile.am, Makefile.in: Add ms1 target.
356 * configure.in: Ditto.
358 2005-06-08 Zack Weinberg <zack@codesourcery.com>
360 * arm-opc.h: Delete; fold contents into ...
361 * arm-dis.c: ... here. Move includes of internal COFF headers
362 next to includes of internal ELF headers.
363 (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
364 (struct arm_opcode): Rename struct opcode32. Make 'assembler' const.
365 (struct thumb_opcode): Rename struct opcode16. Make 'assembler' const.
366 (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
367 (iwmmxt_wwnames, iwmmxt_wwssnames):
369 (regnames): Remove iWMMXt coprocessor register sets.
370 (iwmmxt_regnames, iwmmxt_cregnames): New statics.
371 (get_arm_regnames): Adjust fourth argument to match above changes.
372 (set_iwmmxt_regnames): Delete.
373 (print_insn_arm): Constify 'c'. Use ISO syntax for function
374 pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames
375 and iwmmxt_cregnames, not set_iwmmxt_regnames.
376 (print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use
377 ISO syntax for function pointer calls.
379 2005-06-07 Zack Weinberg <zack@codesourcery.com>
381 * arm-dis.c: Split up the comments describing the format codes, so
382 that the ARM and 16-bit Thumb opcode tables each have comments
383 preceding them that describe all the codes, and only the codes,
384 valid in those tables. (32-bit Thumb table is already like this.)
385 Reorder the lists in all three comments to match the order in
386 which the codes are implemented.
387 Remove all forward declarations of static functions. Convert all
388 function definitions to ISO C format.
389 (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
391 (print_insn_thumb16): Remove unused case 'I'.
392 (print_insn): Update for changed calling convention of subroutines.
394 2005-05-25 Jan Beulich <jbeulich@novell.com>
396 * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
397 hex (but retain it being displayed as signed). Remove redundant
398 checks. Add handling of displacements for 16-bit addressing in Intel
401 2005-05-25 Jan Beulich <jbeulich@novell.com>
403 * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
404 (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
405 masking of 'rm' in 16-bit memory address handling.
407 2005-05-19 Anton Blanchard <anton@samba.org>
409 * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
410 (print_ppc_disassembler_options): Document it.
411 * ppc-opc.c (SVC_LEV): Define.
412 (LEV): Allow optional operand.
414 (powerpc_opcodes): Extend "sc". Adjust "svc" and "svcl". Add
415 "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
417 2005-05-19 Kelley Cook <kcook@gcc.gnu.org>
419 * Makefile.in: Regenerate.
421 2005-05-17 Zack Weinberg <zack@codesourcery.com>
423 * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
424 instructions. Adjust disassembly of some opcodes to match
426 (thumb32_opcodes): New table.
427 (print_insn_thumb): Rename print_insn_thumb16; don't handle
428 two-halfword branches here.
429 (print_insn_thumb32): New function.
430 (print_insn): Choose among print_insn_arm, print_insn_thumb16,
431 and print_insn_thumb32. Be consistent about order of
432 halfwords when printing 32-bit instructions.
434 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
437 * i386-dis.c (branch_v_mode): New.
438 (indirEv): Use branch_v_mode instead of v_mode.
439 (OP_E): Handle branch_v_mode.
441 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
443 * d10v-dis.c (dis_2_short): Support 64bit host.
445 2005-05-07 Nick Clifton <nickc@redhat.com>
447 * po/nl.po: Updated translation.
449 2005-05-07 Nick Clifton <nickc@redhat.com>
451 * Update the address and phone number of the FSF organization in
452 the GPL notices in the following files:
453 a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
454 arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
455 avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
456 cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
457 crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
458 d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
459 fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
460 fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
461 frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
462 h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
463 i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
464 ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
465 ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
466 ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
467 ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
468 iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
469 iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
470 m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
471 m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
472 m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
473 maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
474 mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
475 openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
476 openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
477 or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
478 pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
479 s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
480 sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
481 tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
482 v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
483 xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
484 xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
485 xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
487 2005-05-05 James E Wilson <wilson@specifixinc.com>
489 * ia64-opc.c: Include sysdep.h before libiberty.h.
491 2005-05-05 Nick Clifton <nickc@redhat.com>
493 * configure.in (ALL_LINGUAS): Add vi.
494 * configure: Regenerate.
497 2005-04-26 Jerome Guitton <guitton@gnat.com>
499 * configure.in: Fix the check for basename declaration.
500 * configure: Regenerate.
502 2005-04-19 Alan Modra <amodra@bigpond.net.au>
504 * ppc-opc.c (RTO): Define.
505 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
506 entries to suit PPC440.
508 2005-04-18 Mark Kettenis <kettenis@gnu.org>
510 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
513 2005-04-14 Nick Clifton <nickc@redhat.com>
515 * po/fi.po: New translation: Finnish.
516 * configure.in (ALL_LINGUAS): Add fi.
517 * configure: Regenerate.
519 2005-04-14 Alan Modra <amodra@bigpond.net.au>
521 * Makefile.am (NO_WERROR): Define.
522 * configure.in: Invoke AM_BINUTILS_WARNINGS.
523 * Makefile.in: Regenerate.
524 * aclocal.m4: Regenerate.
525 * configure: Regenerate.
527 2005-04-04 Nick Clifton <nickc@redhat.com>
529 * fr30-asm.c: Regenerate.
530 * frv-asm.c: Regenerate.
531 * iq2000-asm.c: Regenerate.
532 * m32r-asm.c: Regenerate.
533 * openrisc-asm.c: Regenerate.
535 2005-04-01 Jan Beulich <jbeulich@novell.com>
537 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
538 visible operands in Intel mode. The first operand of monitor is
541 2005-04-01 Jan Beulich <jbeulich@novell.com>
543 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
544 easier future additions.
546 2005-03-31 Jerome Guitton <guitton@gnat.com>
548 * configure.in: Check for basename.
549 * configure: Regenerate.
552 2005-03-29 H.J. Lu <hongjiu.lu@intel.com>
554 * i386-dis.c (SEG_Fixup): New.
556 (dis386): Use "Sv" for 0x8c and 0x8e.
558 2005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
559 Nick Clifton <nickc@redhat.com>
561 * vax-dis.c: (entry_addr): New varible: An array of user supplied
562 function entry mask addresses.
563 (entry_addr_occupied_slots): New variable: The number of occupied
564 elements in entry_addr.
565 (entry_addr_total_slots): New variable: The total number of
566 elements in entry_addr.
567 (parse_disassembler_options): New function. Fills in the entry_addr
569 (free_entry_array): New function. Release the memory used by the
570 entry addr array. Suppressed because there is no way to call it.
571 (is_function_entry): Check if a given address is a function's
572 start address by looking at supplied entry mask addresses and
573 symbol information, if available.
574 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
576 2005-03-23 H.J. Lu <hongjiu.lu@intel.com>
578 * cris-dis.c (print_with_operands): Use ~31L for long instead
581 2005-03-20 H.J. Lu <hongjiu.lu@intel.com>
583 * mmix-opc.c (O): Revert the last change.
586 2005-03-19 H.J. Lu <hongjiu.lu@intel.com>
588 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
591 2005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
593 * mmix-opc.c (O, Z): Force expression as unsigned long.
595 2005-03-18 Nick Clifton <nickc@redhat.com>
597 * ip2k-asm.c: Regenerate.
598 * op/opcodes.pot: Regenerate.
600 2005-03-16 Nick Clifton <nickc@redhat.com>
601 Ben Elliston <bje@au.ibm.com>
603 * configure.in (werror): New switch: Add -Werror to the
604 compiler command line. Enabled by default. Disable via
606 * configure: Regenerate.
608 2005-03-16 Alan Modra <amodra@bigpond.net.au>
610 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
613 2005-03-15 Alan Modra <amodra@bigpond.net.au>
615 * po/es.po: Commit new Spanish translation.
617 * po/fr.po: Commit new French translation.
619 2005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
621 * vax-dis.c: Fix spelling error
622 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
623 of just "Entry mask: < r1 ... >"
625 2005-03-12 Zack Weinberg <zack@codesourcery.com>
627 * arm-dis.c (arm_opcodes): Document %E and %V.
628 Add entries for v6T2 ARM instructions:
629 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
630 (print_insn_arm): Add support for %E and %V.
631 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
633 2005-03-10 Jeff Baker <jbaker@qnx.com>
634 Alan Modra <amodra@bigpond.net.au>
636 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
637 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
639 (XSPRG_MASK): Mask off extra bits now part of sprg field.
640 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
641 mfsprg4..7 after msprg and consolidate.
643 2005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
645 * vax-dis.c (entry_mask_bit): New array.
646 (print_insn_vax): Decode function entry mask.
648 2005-03-07 Aldy Hernandez <aldyh@redhat.com>
650 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
652 2005-03-05 Alan Modra <amodra@bigpond.net.au>
654 * po/opcodes.pot: Regenerate.
656 2005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
658 * arc-dis.c (a4_decoding_class): New enum.
659 (dsmOneArcInst): Use the enum values for the decoding class.
660 Remove redundant case in the switch for decodingClass value 11.
662 2005-03-02 Jan Beulich <jbeulich@novell.com>
664 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
666 (OP_C): Consider lock prefix in non-64-bit modes.
668 2005-02-24 Alan Modra <amodra@bigpond.net.au>
670 * cris-dis.c (format_hex): Remove ineffective warning fix.
671 * crx-dis.c (make_instruction): Warning fix.
672 * frv-asm.c: Regenerate.
674 2005-02-23 Nick Clifton <nickc@redhat.com>
676 * cgen-dis.in: Use bfd_byte for buffers that are passed to
679 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
681 * crx-dis.c (make_instruction): Move argument structure into inner
682 scope and ensure that all of its fields are initialised before
685 * fr30-asm.c: Regenerate.
686 * fr30-dis.c: Regenerate.
687 * frv-asm.c: Regenerate.
688 * frv-dis.c: Regenerate.
689 * ip2k-asm.c: Regenerate.
690 * ip2k-dis.c: Regenerate.
691 * iq2000-asm.c: Regenerate.
692 * iq2000-dis.c: Regenerate.
693 * m32r-asm.c: Regenerate.
694 * m32r-dis.c: Regenerate.
695 * openrisc-asm.c: Regenerate.
696 * openrisc-dis.c: Regenerate.
697 * xstormy16-asm.c: Regenerate.
698 * xstormy16-dis.c: Regenerate.
700 2005-02-22 Alan Modra <amodra@bigpond.net.au>
702 * arc-ext.c: Warning fixes.
703 * arc-ext.h: Likewise.
704 * cgen-opc.c: Likewise.
705 * ia64-gen.c: Likewise.
706 * maxq-dis.c: Likewise.
707 * ns32k-dis.c: Likewise.
708 * w65-dis.c: Likewise.
709 * ia64-asmtab.c: Regenerate.
711 2005-02-22 Alan Modra <amodra@bigpond.net.au>
713 * fr30-desc.c: Regenerate.
714 * fr30-desc.h: Regenerate.
715 * fr30-opc.c: Regenerate.
716 * fr30-opc.h: Regenerate.
717 * frv-desc.c: Regenerate.
718 * frv-desc.h: Regenerate.
719 * frv-opc.c: Regenerate.
720 * frv-opc.h: Regenerate.
721 * ip2k-desc.c: Regenerate.
722 * ip2k-desc.h: Regenerate.
723 * ip2k-opc.c: Regenerate.
724 * ip2k-opc.h: Regenerate.
725 * iq2000-desc.c: Regenerate.
726 * iq2000-desc.h: Regenerate.
727 * iq2000-opc.c: Regenerate.
728 * iq2000-opc.h: Regenerate.
729 * m32r-desc.c: Regenerate.
730 * m32r-desc.h: Regenerate.
731 * m32r-opc.c: Regenerate.
732 * m32r-opc.h: Regenerate.
733 * m32r-opinst.c: Regenerate.
734 * openrisc-desc.c: Regenerate.
735 * openrisc-desc.h: Regenerate.
736 * openrisc-opc.c: Regenerate.
737 * openrisc-opc.h: Regenerate.
738 * xstormy16-desc.c: Regenerate.
739 * xstormy16-desc.h: Regenerate.
740 * xstormy16-opc.c: Regenerate.
741 * xstormy16-opc.h: Regenerate.
743 2005-02-21 Alan Modra <amodra@bigpond.net.au>
745 * Makefile.am: Run "make dep-am"
746 * Makefile.in: Regenerate.
748 2005-02-15 Nick Clifton <nickc@redhat.com>
750 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
751 compile time warnings.
752 (print_keyword): Likewise.
753 (default_print_insn): Likewise.
755 * fr30-desc.c: Regenerated.
756 * fr30-desc.h: Regenerated.
757 * fr30-dis.c: Regenerated.
758 * fr30-opc.c: Regenerated.
759 * fr30-opc.h: Regenerated.
760 * frv-desc.c: Regenerated.
761 * frv-dis.c: Regenerated.
762 * frv-opc.c: Regenerated.
763 * ip2k-asm.c: Regenerated.
764 * ip2k-desc.c: Regenerated.
765 * ip2k-desc.h: Regenerated.
766 * ip2k-dis.c: Regenerated.
767 * ip2k-opc.c: Regenerated.
768 * ip2k-opc.h: Regenerated.
769 * iq2000-desc.c: Regenerated.
770 * iq2000-dis.c: Regenerated.
771 * iq2000-opc.c: Regenerated.
772 * m32r-asm.c: Regenerated.
773 * m32r-desc.c: Regenerated.
774 * m32r-desc.h: Regenerated.
775 * m32r-dis.c: Regenerated.
776 * m32r-opc.c: Regenerated.
777 * m32r-opc.h: Regenerated.
778 * m32r-opinst.c: Regenerated.
779 * openrisc-desc.c: Regenerated.
780 * openrisc-desc.h: Regenerated.
781 * openrisc-dis.c: Regenerated.
782 * openrisc-opc.c: Regenerated.
783 * openrisc-opc.h: Regenerated.
784 * xstormy16-desc.c: Regenerated.
785 * xstormy16-desc.h: Regenerated.
786 * xstormy16-dis.c: Regenerated.
787 * xstormy16-opc.c: Regenerated.
788 * xstormy16-opc.h: Regenerated.
790 2005-02-14 H.J. Lu <hongjiu.lu@intel.com>
792 * dis-buf.c (perror_memory): Use sprintf_vma to print out
795 2005-02-11 Nick Clifton <nickc@redhat.com>
797 * iq2000-asm.c: Regenerate.
799 * frv-dis.c: Regenerate.
801 2005-02-07 Jim Blandy <jimb@redhat.com>
803 * Makefile.am (CGEN): Load guile.scm before calling the main
805 * Makefile.in: Regenerated.
806 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
807 Simply pass the cgen-opc.scm path to ${cgen} as its first
808 argument; ${cgen} itself now contains the '-s', or whatever is
809 appropriate for the Scheme being used.
811 2005-01-31 Andrew Cagney <cagney@gnu.org>
813 * configure: Regenerate to track ../gettext.m4.
815 2005-01-31 Jan Beulich <jbeulich@novell.com>
817 * ia64-gen.c (NELEMS): Define.
818 (shrink): Generate alias with missing second predicate register when
819 opcode has two outputs and these are both predicates.
820 * ia64-opc-i.c (FULL17): Define.
821 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
822 here to generate output template.
823 (TBITCM, TNATCM): Undefine after use.
824 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
825 first input. Add ld16 aliases without ar.csd as second output. Add
826 st16 aliases without ar.csd as second input. Add cmpxchg aliases
827 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
828 ar.ccv as third/fourth inputs. Consolidate through...
829 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
830 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
831 * ia64-asmtab.c: Regenerate.
833 2005-01-27 Andrew Cagney <cagney@gnu.org>
835 * configure: Regenerate to track ../gettext.m4 change.
837 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
839 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
840 * frv-asm.c: Rebuilt.
841 * frv-desc.c: Rebuilt.
842 * frv-desc.h: Rebuilt.
843 * frv-dis.c: Rebuilt.
844 * frv-ibld.c: Rebuilt.
845 * frv-opc.c: Rebuilt.
846 * frv-opc.h: Rebuilt.
848 2005-01-24 Andrew Cagney <cagney@gnu.org>
850 * configure: Regenerate, ../gettext.m4 was updated.
852 2005-01-21 Fred Fish <fnf@specifixinc.com>
854 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
855 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
856 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
859 2005-01-20 Alan Modra <amodra@bigpond.net.au>
861 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
863 2005-01-19 Fred Fish <fnf@specifixinc.com>
865 * mips-dis.c (no_aliases): New disassembly option flag.
866 (set_default_mips_dis_options): Init no_aliases to zero.
867 (parse_mips_dis_option): Handle no-aliases option.
868 (print_insn_mips): Ignore table entries that are aliases
869 if no_aliases is set.
870 (print_insn_mips16): Ditto.
871 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
872 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
873 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
874 * mips16-opc.c (mips16_opcodes): Ditto.
876 2005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
878 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
879 (inheritance diagram): Add missing edge.
880 (arch_sh1_up): Rename arch_sh_up to match external name to make life
881 easier for the testsuite.
882 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
883 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
884 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
885 arch_sh2a_or_sh4_up child.
886 (sh_table): Do renaming as above.
887 Correct comment for ldc.l for gas testsuite to read.
888 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
889 Correct comments for movy.w and movy.l for gas testsuite to read.
890 Correct comments for fmov.d and fmov.s for gas testsuite to read.
892 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
894 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
896 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
898 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
900 2005-01-10 Andreas Schwab <schwab@suse.de>
902 * disassemble.c (disassemble_init_for_target) <case
903 bfd_arch_ia64>: Set skip_zeroes to 16.
904 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
906 2004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
908 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
910 2004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
912 * avr-dis.c: Prettyprint. Added printing of symbol names in all
913 memory references. Convert avr_operand() to C90 formatting.
915 2004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
917 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
919 2004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
921 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
922 (no_op_insn): Initialize array with instructions that have no
924 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
926 2004-11-29 Richard Earnshaw <rearnsha@arm.com>
928 * arm-dis.c: Correct top-level comment.
930 2004-11-27 Richard Earnshaw <rearnsha@arm.com>
932 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
933 architecuture defining the insn.
934 (arm_opcodes, thumb_opcodes): Delete. Move to ...
935 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
937 Also include opcode/arm.h.
938 * Makefile.am (arm-dis.lo): Update dependency list.
939 * Makefile.in: Regenerate.
941 2004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
943 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
944 reflect the change to the short immediate syntax.
946 2004-11-19 Alan Modra <amodra@bigpond.net.au>
948 * or32-opc.c (debug): Warning fix.
949 * po/POTFILES.in: Regenerate.
951 * maxq-dis.c: Formatting.
952 (print_insn): Warning fix.
954 2004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
956 * arm-dis.c (WORD_ADDRESS): Define.
957 (print_insn): Use it. Correct big-endian end-of-section handling.
959 2004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
960 Vineet Sharma <vineets@noida.hcltech.com>
962 * maxq-dis.c: New file.
963 * disassemble.c (ARCH_maxq): Define.
964 (disassembler): Add 'print_insn_maxq_little' for handling maxq
966 * configure.in: Add case for bfd_maxq_arch.
967 * configure: Regenerate.
968 * Makefile.am: Add support for maxq-dis.c
969 * Makefile.in: Regenerate.
970 * aclocal.m4: Regenerate.
972 2004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
974 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
976 * crx-dis.c: Likewise.
978 2004-11-04 Hans-Peter Nilsson <hp@axis.com>
980 Generally, handle CRISv32.
981 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
982 (struct cris_disasm_data): New type.
983 (format_reg, format_hex, cris_constraint, print_flags)
984 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
986 (format_sup_reg, print_insn_crisv32_with_register_prefix)
987 (print_insn_crisv32_without_register_prefix)
988 (print_insn_crisv10_v32_with_register_prefix)
989 (print_insn_crisv10_v32_without_register_prefix)
990 (cris_parse_disassembler_options): New functions.
991 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
992 parameter. All callers changed.
993 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
995 (cris_constraint) <case 'Y', 'U'>: New cases.
996 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
998 (print_with_operands) <case 'Y'>: New case.
999 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
1000 <case 'N', 'Y', 'Q'>: New cases.
1001 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
1002 (print_insn_cris_with_register_prefix)
1003 (print_insn_cris_without_register_prefix): Call
1004 cris_parse_disassembler_options.
1005 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
1006 for CRISv32 and the size of immediate operands. New v32-only
1007 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
1008 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
1009 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
1010 Change brp to be v3..v10.
1011 (cris_support_regs): New vector.
1012 (cris_opcodes): Update head comment. New format characters '[',
1013 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
1014 Add new opcodes for v32 and adjust existing opcodes to accommodate
1015 differences to earlier variants.
1016 (cris_cond15s): New vector.
1018 2004-11-04 Jan Beulich <jbeulich@novell.com>
1020 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
1022 (Mp): Use f_mode rather than none at all.
1023 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
1024 replaces what previously was x_mode; x_mode now means 128-bit SSE
1026 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
1027 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
1028 pinsrw's second operand is Edqw.
1029 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
1030 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
1031 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
1032 mode when an operand size override is present or always suffixing.
1033 More instructions will need to be added to this group.
1034 (putop): Handle new macro chars 'C' (short/long suffix selector),
1035 'I' (Intel mode override for following macro char), and 'J' (for
1036 adding the 'l' prefix to far branches in AT&T mode). When an
1037 alternative was specified in the template, honor macro character when
1038 specified for Intel mode.
1039 (OP_E): Handle new *_mode values. Correct pointer specifications for
1040 memory operands. Consolidate output of index register.
1041 (OP_G): Handle new *_mode values.
1042 (OP_I): Handle const_1_mode.
1043 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
1044 respective opcode prefix bits have been consumed.
1045 (OP_EM, OP_EX): Provide some default handling for generating pointer
1048 2004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
1050 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
1053 2004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
1055 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
1056 (getregliststring): Support HI/LO and user registers.
1057 * crx-opc.c (crx_instruction): Update data structure according to the
1058 rearrangement done in CRX opcode header file.
1059 (crx_regtab): Likewise.
1060 (crx_optab): Likewise.
1061 (crx_instruction): Reorder load/stor instructions, remove unsupported
1063 support new Co-Processor instruction 'cpi'.
1065 2004-10-27 Nick Clifton <nickc@redhat.com>
1067 * opcodes/iq2000-asm.c: Regenerate.
1068 * opcodes/iq2000-desc.c: Regenerate.
1069 * opcodes/iq2000-desc.h: Regenerate.
1070 * opcodes/iq2000-dis.c: Regenerate.
1071 * opcodes/iq2000-ibld.c: Regenerate.
1072 * opcodes/iq2000-opc.c: Regenerate.
1073 * opcodes/iq2000-opc.h: Regenerate.
1075 2004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
1077 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1078 us4, us5 (respectively).
1079 Remove unsupported 'popa' instruction.
1080 Reverse operands order in store co-processor instructions.
1082 2004-10-15 Alan Modra <amodra@bigpond.net.au>
1084 * Makefile.am: Run "make dep-am"
1085 * Makefile.in: Regenerate.
1087 2004-10-12 Bob Wilson <bob.wilson@acm.org>
1089 * xtensa-dis.c: Use ISO C90 formatting.
1091 2004-10-09 Alan Modra <amodra@bigpond.net.au>
1093 * ppc-opc.c: Revert 2004-09-09 change.
1095 2004-10-07 Bob Wilson <bob.wilson@acm.org>
1097 * xtensa-dis.c (state_names): Delete.
1098 (fetch_data): Use xtensa_isa_maxlength.
1099 (print_xtensa_operand): Replace operand parameter with opcode/operand
1100 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
1101 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
1102 instruction bundles. Use xmalloc instead of malloc.
1104 2004-10-07 David Gibson <david@gibson.dropbear.id.au>
1106 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1109 2004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
1111 * crx-opc.c (crx_instruction): Support Co-processor insns.
1112 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1113 (getregliststring): Change function to use the above enum.
1114 (print_arg): Handle CO-Processor insns.
1115 (crx_cinvs): Add 'b' option to invalidate the branch-target
1118 2004-10-06 Aldy Hernandez <aldyh@redhat.com>
1120 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1121 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1122 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1123 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1124 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1126 2004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
1128 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1131 2004-09-30 Paul Brook <paul@codesourcery.com>
1133 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1134 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
1136 2004-09-17 H.J. Lu <hongjiu.lu@intel.com>
1138 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1139 (CONFIG_STATUS_DEPENDENCIES): New.
1140 (Makefile): Removed.
1141 (config.status): Likewise.
1142 * Makefile.in: Regenerated.
1144 2004-09-17 Alan Modra <amodra@bigpond.net.au>
1146 * Makefile.am: Run "make dep-am".
1147 * Makefile.in: Regenerate.
1148 * aclocal.m4: Regenerate.
1149 * configure: Regenerate.
1150 * po/POTFILES.in: Regenerate.
1151 * po/opcodes.pot: Regenerate.
1153 2004-09-11 Andreas Schwab <schwab@suse.de>
1155 * configure: Rebuild.
1157 2004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
1159 * ppc-opc.c (L): Make this field not optional.
1161 2004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
1163 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1164 Fix parameter to 'm[t|f]csr' insns.
1166 2004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
1168 * configure.in: Autoupdate to autoconf 2.59.
1169 * aclocal.m4: Rebuild with aclocal 1.4p6.
1170 * configure: Rebuild with autoconf 2.59.
1171 * Makefile.in: Rebuild with automake 1.4p6 (picking up
1172 bfd changes for autoconf 2.59 on the way).
1173 * config.in: Rebuild with autoheader 2.59.
1175 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
1177 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1179 2004-07-30 Michal Ludvig <mludvig@suse.cz>
1181 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1182 (GRPPADLCK2): New define.
1183 (twobyte_has_modrm): True for 0xA6.
1184 (grps): GRPPADLCK2 for opcode 0xA6.
1186 2004-07-29 Alexandre Oliva <aoliva@redhat.com>
1188 Introduce SH2a support.
1189 * sh-opc.h (arch_sh2a_base): Renumber.
1190 (arch_sh2a_nofpu_base): Remove.
1191 (arch_sh_base_mask): Adjust.
1192 (arch_opann_mask): New.
1193 (arch_sh2a, arch_sh2a_nofpu): Adjust.
1194 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1195 (sh_table): Adjust whitespace.
1196 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
1197 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
1198 instruction list throughout.
1199 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
1200 of arch_sh2a in instruction list throughout.
1201 (arch_sh2e_up): Accomodate above changes.
1202 (arch_sh2_up): Ditto.
1203 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
1204 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1205 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
1206 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1207 * sh-opc.h (arch_sh2a_nofpu): New.
1208 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1209 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1211 2004-01-20 DJ Delorie <dj@redhat.com>
1212 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1213 2003-12-29 DJ Delorie <dj@redhat.com>
1214 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1215 sh_opcode_info, sh_table): Add sh2a support.
1216 (arch_op32): New, to tag 32-bit opcodes.
1217 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1218 2003-12-02 Michael Snyder <msnyder@redhat.com>
1219 * sh-opc.h (arch_sh2a): Add.
1220 * sh-dis.c (arch_sh2a): Handle.
1221 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1223 2004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
1225 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1227 2004-07-22 Nick Clifton <nickc@redhat.com>
1230 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1231 insns - this is done by objdump itself.
1232 * h8500-dis.c (print_insn_h8500): Likewise.
1234 2004-07-21 Jan Beulich <jbeulich@novell.com>
1236 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1237 regardless of address size prefix in effect.
1238 (ptr_reg): Size or address registers does not depend on rex64, but
1239 on the presence of an address size override.
1240 (OP_MMX): Use rex.x only for xmm registers.
1241 (OP_EM): Use rex.z only for xmm registers.
1243 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1245 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1246 move/branch operations to the bottom so that VR5400 multimedia
1247 instructions take precedence in disassembly.
1249 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1251 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1252 ISA-specific "break" encoding.
1254 2004-07-13 Elvis Chiang <elvisfb@gmail.com>
1256 * arm-opc.h: Fix typo in comment.
1258 2004-07-11 Andreas Schwab <schwab@suse.de>
1260 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1262 2004-07-09 Andreas Schwab <schwab@suse.de>
1264 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1266 2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
1268 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1269 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1270 (crx-dis.lo): New target.
1271 (crx-opc.lo): Likewise.
1272 * Makefile.in: Regenerate.
1273 * configure.in: Handle bfd_crx_arch.
1274 * configure: Regenerate.
1275 * crx-dis.c: New file.
1276 * crx-opc.c: New file.
1277 * disassemble.c (ARCH_crx): Define.
1278 (disassembler): Handle ARCH_crx.
1280 2004-06-29 James E Wilson <wilson@specifixinc.com>
1282 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1283 * ia64-asmtab.c: Regnerate.
1285 2004-06-28 Alan Modra <amodra@bigpond.net.au>
1287 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1288 (extract_fxm): Don't test dialect.
1289 (XFXFXM_MASK): Include the power4 bit.
1290 (XFXM): Add p4 param.
1291 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
1293 2004-06-27 Alexandre Oliva <aoliva@redhat.com>
1295 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
1296 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1298 2004-06-26 Alan Modra <amodra@bigpond.net.au>
1300 * ppc-opc.c (BH, XLBH_MASK): Define.
1301 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1303 2004-06-24 Alan Modra <amodra@bigpond.net.au>
1305 * i386-dis.c (x_mode): Comment.
1306 (two_source_ops): File scope.
1307 (float_mem): Correct fisttpll and fistpll.
1308 (float_mem_mode): New table.
1310 (OP_E): Correct intel mode PTR output.
1311 (ptr_reg): Use open_char and close_char.
1312 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
1313 operands. Set two_source_ops.
1315 2004-06-15 Alan Modra <amodra@bigpond.net.au>
1317 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1318 instead of _raw_size.
1320 2004-06-08 Jakub Jelinek <jakub@redhat.com>
1322 * ia64-gen.c (in_iclass): Handle more postinc st
1324 * ia64-asmtab.c: Rebuilt.
1326 2004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
1328 * s390-opc.txt: Correct architecture mask for some opcodes.
1329 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1330 in the esa mode as well.
1332 2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
1334 * sh-dis.c (target_arch): Make unsigned.
1335 (print_insn_sh): Replace (most of) switch with a call to
1336 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1337 * sh-opc.h: Redefine architecture flags values.
1338 Add sh3-nommu architecture.
1339 Reorganise <arch>_up macros so they make more visual sense.
1340 (SH_MERGE_ARCH_SET): Define new macro.
1341 (SH_VALID_BASE_ARCH_SET): Likewise.
1342 (SH_VALID_MMU_ARCH_SET): Likewise.
1343 (SH_VALID_CO_ARCH_SET): Likewise.
1344 (SH_VALID_ARCH_SET): Likewise.
1345 (SH_MERGE_ARCH_SET_VALID): Likewise.
1346 (SH_ARCH_SET_HAS_FPU): Likewise.
1347 (SH_ARCH_SET_HAS_DSP): Likewise.
1348 (SH_ARCH_UNKNOWN_ARCH): Likewise.
1349 (sh_get_arch_from_bfd_mach): Add prototype.
1350 (sh_get_arch_up_from_bfd_mach): Likewise.
1351 (sh_get_bfd_mach_from_arch_set): Likewise.
1352 (sh_merge_bfd_arc): Likewise.
1354 2004-05-24 Peter Barada <peter@the-baradas.com>
1356 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1357 into new match_insn_m68k function. Loop over canidate
1358 matches and select first that completely matches.
1359 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1360 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1361 to verify addressing for MAC/EMAC.
1362 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1363 reigster halves since 'fpu' and 'spl' look misleading.
1364 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1365 * m68k-opc.c: Rearragne mac/emac cases to use longest for
1366 first, tighten up match masks.
1367 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
1368 'size' from special case code in print_insn_m68k to
1369 determine decode size of insns.
1371 2004-05-19 Alan Modra <amodra@bigpond.net.au>
1373 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1374 well as when -mpower4.
1376 2004-05-13 Nick Clifton <nickc@redhat.com>
1378 * po/fr.po: Updated French translation.
1380 2004-05-05 Peter Barada <peter@the-baradas.com>
1382 * m68k-dis.c(print_insn_m68k): Add new chips, use core
1383 variants in arch_mask. Only set m68881/68851 for 68k chips.
1384 * m68k-op.c: Switch from ColdFire chips to core variants.
1386 2004-05-05 Alan Modra <amodra@bigpond.net.au>
1389 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1391 2004-04-29 Ben Elliston <bje@au.ibm.com>
1393 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1394 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1396 2004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
1398 * sh-dis.c (print_insn_sh): Print the value in constant pool
1399 as a symbol if it looks like a symbol.
1401 2004-04-22 Peter Barada <peter@the-baradas.com>
1403 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1404 appropriate ColdFire architectures.
1405 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1407 Add EMAC instructions, fix MAC instructions. Remove
1408 macmw/macml/msacmw/msacml instructions since mask addressing now
1411 2004-04-20 Jakub Jelinek <jakub@redhat.com>
1413 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1414 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1415 suffix. Use fmov*x macros, create all 3 fpsize variants in one
1416 macro. Adjust all users.
1418 2004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
1420 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1423 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1425 * m32r-asm.c: Regenerate.
1427 2004-03-29 Stan Shebs <shebs@apple.com>
1429 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1432 2004-03-19 Alan Modra <amodra@bigpond.net.au>
1434 * aclocal.m4: Regenerate.
1435 * config.in: Regenerate.
1436 * configure: Regenerate.
1437 * po/POTFILES.in: Regenerate.
1438 * po/opcodes.pot: Regenerate.
1440 2004-03-16 Alan Modra <amodra@bigpond.net.au>
1442 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
1444 * ppc-opc.c (RA0): Define.
1445 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1446 (RAOPT): Rename from RAO. Update all uses.
1447 (powerpc_opcodes): Use RA0 as appropriate.
1449 2004-03-15 Aldy Hernandez <aldyh@redhat.com>
1451 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1453 2004-03-15 Alan Modra <amodra@bigpond.net.au>
1455 * sparc-dis.c (print_insn_sparc): Update getword prototype.
1457 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1459 * i386-dis.c (GRPPLOCK): Delete.
1460 (grps): Delete GRPPLOCK entry.
1462 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1464 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1466 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1467 (GRPPADLCK): Define.
1468 (dis386): Use NOP_Fixup on "nop".
1469 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1470 (twobyte_has_modrm): Set for 0xa7.
1471 (padlock_table): Delete. Move to..
1472 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
1474 (print_insn): Revert PADLOCK_SPECIAL code.
1475 (OP_E): Delete sfence, lfence, mfence checks.
1477 2004-03-12 Jakub Jelinek <jakub@redhat.com>
1479 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1480 (INVLPG_Fixup): New function.
1481 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1483 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1485 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1486 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1487 (padlock_table): New struct with PadLock instructions.
1488 (print_insn): Handle PADLOCK_SPECIAL.
1490 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1492 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1493 (OP_E): Twiddle clflush to sfence here.
1495 2004-03-08 Nick Clifton <nickc@redhat.com>
1497 * po/de.po: Updated German translation.
1499 2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
1501 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1502 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
1503 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1506 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1508 * frv-asm.c: Regenerate.
1509 * frv-desc.c: Regenerate.
1510 * frv-desc.h: Regenerate.
1511 * frv-dis.c: Regenerate.
1512 * frv-ibld.c: Regenerate.
1513 * frv-opc.c: Regenerate.
1514 * frv-opc.h: Regenerate.
1516 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1518 * frv-desc.c, frv-opc.c: Regenerate.
1520 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1522 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1524 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1526 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1527 Also correct mistake in the comment.
1529 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1531 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1532 ensure that double registers have even numbers.
1533 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1534 that reserved instruction 0xfffd does not decode the same
1536 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1537 REG_N refers to a double register.
1538 Add REG_N_B01 nibble type and use it instead of REG_NM
1540 Adjust the bit patterns in a few comments.
1542 2004-02-25 Aldy Hernandez <aldyh@redhat.com>
1544 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1546 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1548 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1550 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1552 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1554 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1556 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1557 mtivor32, mtivor33, mtivor34.
1559 2004-02-19 Aldy Hernandez <aldyh@redhat.com>
1561 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1563 2004-02-10 Petko Manolov <petkan@nucleusys.com>
1565 * arm-opc.h Maverick accumulator register opcode fixes.
1567 2004-02-13 Ben Elliston <bje@wasabisystems.com>
1569 * m32r-dis.c: Regenerate.
1571 2004-01-27 Michael Snyder <msnyder@redhat.com>
1573 * sh-opc.h (sh_table): "fsrra", not "fssra".
1575 2004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1577 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1580 2004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1582 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1584 2004-01-19 Alan Modra <amodra@bigpond.net.au>
1586 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1587 1. Don't print scale factor on AT&T mode when index missing.
1589 2004-01-16 Alexandre Oliva <aoliva@redhat.com>
1591 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1592 when loaded into XR registers.
1594 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
1596 * frv-desc.h: Regenerate.
1597 * frv-desc.c: Regenerate.
1598 * frv-opc.c: Regenerate.
1600 2004-01-13 Michael Snyder <msnyder@redhat.com>
1602 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1604 2004-01-09 Paul Brook <paul@codesourcery.com>
1606 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1609 2004-01-07 Daniel Jacobowitz <drow@mvista.com>
1611 * Makefile.am (libopcodes_la_DEPENDENCIES)
1612 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1613 comment about the problem.
1614 * Makefile.in: Regenerate.
1616 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
1618 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1619 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1620 cut&paste errors in shifting/truncating numerical operands.
1621 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1622 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1623 (parse_uslo16): Likewise.
1624 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1625 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1626 (parse_s12): Likewise.
1627 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1628 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1629 (parse_uslo16): Likewise.
1630 (parse_uhi16): Parse gothi and gotfuncdeschi.
1631 (parse_d12): Parse got12 and gotfuncdesc12.
1632 (parse_s12): Likewise.
1634 2004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1636 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1637 instruction which looks similar to an 'rla' instruction.
1639 For older changes see ChangeLog-0203
1645 version-control: never